DE10135557A1 - Halbleiter-Vorrichtung, Verfahren zur Herstellung derselben und CMOS-Transistor - Google Patents

Halbleiter-Vorrichtung, Verfahren zur Herstellung derselben und CMOS-Transistor

Info

Publication number
DE10135557A1
DE10135557A1 DE10135557A DE10135557A DE10135557A1 DE 10135557 A1 DE10135557 A1 DE 10135557A1 DE 10135557 A DE10135557 A DE 10135557A DE 10135557 A DE10135557 A DE 10135557A DE 10135557 A1 DE10135557 A1 DE 10135557A1
Authority
DE
Germany
Prior art keywords
film
metal
atoms
silicide
conductive silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE10135557A
Other languages
German (de)
English (en)
Inventor
Kiyoshi Hayashi
Yasuo Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE10135557A1 publication Critical patent/DE10135557A1/de
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
    • H10D64/664—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures the additional layers comprising a barrier layer between the layer of silicon and an upper metal or metal silicide layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0174—Manufacturing their gate conductors the gate conductors being silicided
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE10135557A 2000-07-21 2001-07-20 Halbleiter-Vorrichtung, Verfahren zur Herstellung derselben und CMOS-Transistor Ceased DE10135557A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2000220770 2000-07-21
JP2001122998A JP4651848B2 (ja) 2000-07-21 2001-04-20 半導体装置およびその製造方法並びにｃｍｏｓトランジスタ

Publications (1)

Publication Number Publication Date
DE10135557A1 true DE10135557A1 (de) 2002-02-07

Family

ID=26596432

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10135557A Ceased DE10135557A1 (de) 2000-07-21 2001-07-20 Halbleiter-Vorrichtung, Verfahren zur Herstellung derselben und CMOS-Transistor

Country Status (4)

Country Link
JP (1) JP4651848B2 (enExample)
KR (1) KR100433437B1 (enExample)
DE (1) DE10135557A1 (enExample)
TW (1) TWI237851B (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004004864B4 (de) * 2004-01-30 2008-09-11 Qimonda Ag Verfahren zur Herstellung einer Gate-Struktur und Gate-Struktur für einen Transistor

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3781666B2 (ja) 2001-11-29 2006-05-31 エルピーダメモリ株式会社 ゲート電極の形成方法及びゲート電極構造
KR100806138B1 (ko) * 2002-06-29 2008-02-22 주식회사 하이닉스반도체 금속 게이트전극을 구비한 반도체소자의 제조 방법
US7112485B2 (en) * 2002-08-28 2006-09-26 Micron Technology, Inc. Systems and methods for forming zirconium and/or hafnium-containing layers
US7534709B2 (en) 2003-05-29 2009-05-19 Samsung Electronics Co., Ltd. Semiconductor device and method of manufacturing the same
KR100693878B1 (ko) * 2004-12-08 2007-03-12 삼성전자주식회사 낮은 저항을 갖는 반도체 장치 및 그 제조 방법
KR100618895B1 (ko) * 2005-04-27 2006-09-01 삼성전자주식회사 폴리메탈 게이트 전극을 가지는 반도체 소자 및 그 제조방법
JP4690120B2 (ja) 2005-06-21 2011-06-01 エルピーダメモリ株式会社 半導体装置及びその製造方法
KR100683488B1 (ko) 2005-06-30 2007-02-15 주식회사 하이닉스반도체 폴리메탈 게이트전극 및 그의 제조 방법
KR100673902B1 (ko) * 2005-06-30 2007-01-25 주식회사 하이닉스반도체 텅스텐폴리메탈게이트 및 그의 제조 방법
KR100654358B1 (ko) 2005-08-10 2006-12-08 삼성전자주식회사 반도체 집적 회로 장치와 그 제조 방법
US7781333B2 (en) * 2006-12-27 2010-08-24 Hynix Semiconductor Inc. Semiconductor device with gate structure and method for fabricating the semiconductor device
KR100844940B1 (ko) * 2006-12-27 2008-07-09 주식회사 하이닉스반도체 다중 확산방지막을 구비한 반도체소자 및 그의 제조 방법
DE102007045074B4 (de) 2006-12-27 2009-06-18 Hynix Semiconductor Inc., Ichon Halbleiterbauelement mit Gatestapelstruktur
KR100914283B1 (ko) 2006-12-28 2009-08-27 주식회사 하이닉스반도체 반도체소자의 폴리메탈게이트 형성방법
KR100843230B1 (ko) 2007-01-17 2008-07-02 삼성전자주식회사 금속층을 가지는 게이트 전극을 구비한 반도체 소자 및 그제조 방법
KR100824132B1 (ko) 2007-04-24 2008-04-21 주식회사 하이닉스반도체 반도체 소자의 제조 방법
KR100972220B1 (ko) * 2008-01-23 2010-07-23 이동훈 전기자극치료기용 도자컵 패드
JP2015177187A (ja) 2014-03-12 2015-10-05 株式会社東芝 不揮発性半導体記憶装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0687501B2 (ja) * 1988-09-29 1994-11-02 シャープ株式会社 半導体装置のゲート電極の製造方法
JP3183793B2 (ja) * 1994-01-18 2001-07-09 松下電器産業株式会社 半導体装置及びその製造方法
JPH0964200A (ja) * 1995-08-26 1997-03-07 Ricoh Co Ltd 半導体装置およびその製造方法
KR100240880B1 (ko) * 1997-08-16 2000-01-15 윤종용 반도체 장치의 게이트 전극 형성 방법
JPH11195621A (ja) * 1997-11-05 1999-07-21 Tokyo Electron Ltd バリアメタル、その形成方法、ゲート電極及びその形成方法
JP2000036593A (ja) * 1998-07-17 2000-02-02 Fujitsu Ltd 半導体装置
JP2002544658A (ja) * 1998-08-21 2002-12-24 マイクロン テクノロジー， インク． 電界効果トランジスタ、集積回路、電界効果トランジスタのゲートを形成する方法、及び集積回路を形成する方法
JP3264324B2 (ja) * 1998-08-26 2002-03-11 日本電気株式会社 半導体装置の製造方法および半導体装置
JP2001298186A (ja) * 2000-04-14 2001-10-26 Hitachi Ltd 半導体装置およびその製造方法
KR100351907B1 (ko) * 2000-11-17 2002-09-12 주식회사 하이닉스반도체 반도체 소자의 게이트 전극 형성방법

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004004864B4 (de) * 2004-01-30 2008-09-11 Qimonda Ag Verfahren zur Herstellung einer Gate-Struktur und Gate-Struktur für einen Transistor

Also Published As

Publication number Publication date
JP4651848B2 (ja) 2011-03-16
KR100433437B1 (ko) 2004-05-31
TWI237851B (en) 2005-08-11
JP2002100760A (ja) 2002-04-05
KR20020008771A (ko) 2002-01-31

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