CN1984533A - 具有嵌入式电子元件的印刷电路板及其制造方法 - Google Patents
具有嵌入式电子元件的印刷电路板及其制造方法 Download PDFInfo
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- CN1984533A CN1984533A CNA2006101672694A CN200610167269A CN1984533A CN 1984533 A CN1984533 A CN 1984533A CN A2006101672694 A CNA2006101672694 A CN A2006101672694A CN 200610167269 A CN200610167269 A CN 200610167269A CN 1984533 A CN1984533 A CN 1984533A
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10507—Involving several components
- H05K2201/10515—Stacked components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
- H05K3/4608—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated comprising an electrically conductive base or core
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
Abstract
本发明披露了一种具有嵌入式电子元件的印刷电路板及其制造方法。对于包括型芯片、安装在型芯片的一个侧面上的第一电子元件、安装在型芯片的另一个侧面上并与第一电子元件重叠的第二电子元件、堆叠在型芯片的一个侧面上并覆盖第一电子元件的第一绝缘层、堆叠在型芯片的另一个侧面上并覆盖第二电子元件的第二绝缘层、以及形成在第一绝缘层或第二绝缘层上的电路图样的具有嵌入式电子元件的印刷电路板来说,由于多个电子元件是同时嵌入的,所以具有嵌入式元件的印刷电路板的密度得以改进,以及当薄CCL基板或金属基板用作型芯时,尤其是金属基板用作型芯时,由于电子元件安装在型芯片的两个侧面上,所以放热特性和机械强度均得以改进,包括在热应力环境下增加的弯曲强度。
Description
相关申请的交叉参考
本申请要求于2005年12月13日向韩国知识产权局提交的韩国专利申请第2005-0122289号的优先权,其全部内容结合于此作为参考。
技术领域
本发明涉及一种印刷电路板,更具体的,涉及一种具有嵌入式电子元件的印刷电路板及其制造方法。
背景技术
作为下一代多功能小型包装技术的一部分,注意力集中在了具有嵌入式电子元件的印刷电路板的开发上。具有了多功能和小型化的优点,具有嵌入式元件的印刷电路板在一定程度上还允许了更加复杂的功能,由于可以在100MHz或更高的高频范围内最小化布线距离,并且在一些情况下,在FC(倒装芯片组装)或BGA(球状矩阵阵列)中使用引线接合或焊球,可以解决元件之间连接可靠性的问题。
然而,在传统的具有嵌入式电子元件的印刷电路板中,由于嵌入诸如高密度IC的电子元件而产生的关于发热的问题、或者诸如分层的问题等等有很大可能会影响到生产,并且存在整个工艺中增加制造成本的困难。因此,需要一种技术,能够提供用于最小化薄印刷电路板中的热变形的力,并且提供热释放特性的改进。
同样,嵌入电子元件的工艺迄今为止包括一种结构,其中,电子元件仅被嵌入到型芯基板的一个侧面中、或内置层的一个侧面中,不可避免的缺点在于会在热应力环境中弯曲。因而,增加所嵌入的电子元件的数量就存在基本的限制。
在现有技术中具有嵌入式电子元件的印刷电路板的实例包括:第一,如图1所示,使用带子和模塑料(molding compound)来嵌入电子元件的方法。在这个发明中,在蚀刻绝缘基板之后嵌入元件的过程中使用了液态环氧材料,从而最小化由于热膨胀系数以及在嵌入电子元件(诸如IC)与基板之间的弹性系数的不同所带来的热影响和机械影响。然而,其受限于基板本身的强度和放热特性无法改变,并且其包括不对称结构。
第二实例包括一个发明,其中,在型芯基板的两个侧面上均堆叠用于高密度堆叠的冷凝器。然而,这仅考虑到了较高密度堆叠的问题,但是其受限于没有考虑到基板的放热特性,以及没有通过形成对称结构来弥补弯曲强度。
发明内容
本发明的各个方面旨在提供一种具有嵌入式元件的印刷电路板及其制造方法,其能够维持强度,即使是厚度比传统型芯基板的厚度更小,并且其能够通过改进放热来增加嵌入式电子元件的数量。
本发明的一个方面提供了一种具有嵌入式电子元件的印刷电路板,其包括:型芯片;第一电子元件,安装在型芯片的一个侧面上;第二电子元件,安装在型芯片的另一个侧面上并且与第一电子元件重叠;第一绝缘层,堆叠在型芯片的一个侧面上并且覆盖第一电子元件;第二绝缘层,堆叠在型芯片的另一个侧面上并且覆盖第二电子元件;以及电路图样,形成在第一绝缘层或者第二绝缘层的表面上。
优选地,型芯片是金属基板,其可以包括铝(Al)或铜(Cu)或不锈钢(SS)。优选地,型芯片是敷铜箔板(CCL)。
优选地,第一电子元件和第二电子元件的尺寸和形状是相同的。同样优选地,相对于型芯片对称地安装第一电子元件和第二电子元件。优选地,第一电子元件或者第二电子元件是通过应用于第一电子元件与型芯片之间和第二电子元件与型芯片之间的芯片粘合剂而安装在型芯片上的。
第一绝缘层或者第二绝缘层可以包括以下至少之一:半固化片(PPG)、背胶铜箔(RCC)、和层间绝缘膜(ABF)。
在一个实施例中,印刷电路板还可以包括穿透第一绝缘层、第二绝缘层、和型芯片的IVH(局部层间导通孔:interstitial via hole),其中,优选地,具有比IVH的横截面大的横截面的铸孔形成在型芯片中,以使得IVH穿过型芯片。优选地,金属层可以形成在IVH的内圆周上,并且金属层可以与电路图样电连接。
本发明的另一个方面提供了一种制造具有嵌入式电子元件的印刷电路板的方法,其包括:(a)将第一电子元件安装在型芯片的一个侧面上;(b)将第一绝缘层堆叠在型芯片的一个侧面上,以使第一绝缘层覆盖第一电子元件;(c)将第二电子元件安装在型芯片的另一个侧面上,以使第二电子元件与第一电子元件重叠;(d)将第二绝缘层堆叠在型芯片的另一个侧面上,以使第二绝缘层覆盖第二电子元件;以及(e)在第一绝缘层或第二绝缘层的表面上形成电路图样。
在一个实施例中,制造具有嵌入式电子元件的印刷电路板的方法还可以包括:在堆叠第一绝缘层的操作(b)和安装第二电子元件的操作(c)之间,翻转型芯片,以使型芯片的另一个侧面转向面对型芯片的一个侧面。
同样,这个方法还可以包括:在堆叠第二绝缘层的操作(d)之前,将型芯片的一部分穿孔,以形成铸孔;以及在堆叠第二绝缘层的操作(d)之后,形成穿透第一绝缘层、第二绝缘层、和型芯片的IVH。
这个方法还可以包括:在堆叠第二绝缘层的操作(d)之后,对应于第一电子元件的电极的位置,在第一绝缘层中形成第一BVH(盲孔),以及对应于第二电子元件的电极的位置,在第二绝缘层中形成第二BVH。
本发明的另外一个方面提供了一种制造具有嵌入式电子元件的印刷电路板的方法,其包括:(a)在型芯片的一个侧面上安装第一电子元件,以及在型芯片的另一个侧面上安装第二电子元件,以使第二电子元件与第一电子元件重叠;(b)在型芯片的一个侧面上堆叠第一绝缘层,以使第一绝缘层覆盖第一电子元件,以及在型芯片的另一个侧面上堆叠第二绝缘层,以使第二绝缘层覆盖第二电子元件;以及(c)在第一绝缘层或第二绝缘层的表面上形成电路图样。
在一个实施例中,制造具有嵌入式电子元件的印刷电路板的方法还可以包括:在堆叠第一绝缘层和堆叠第二绝缘层的操作(b)之前,将型芯片的一部分穿孔,以形成铸孔;以及在堆叠第一绝缘层和堆叠第二绝缘层的操作(b)之后,形成穿透第一绝缘层、第二绝缘层、和型芯片的IVH。
这个方法还可以包括:在堆叠第一绝缘层和堆叠第二绝缘层的操作(b)之后,对应于第一电子元件的电极的位置,在第一绝缘层中形成第一BVH(盲孔),已经对应于第二电子元件的电极的位置,在第二绝缘层中形成第二BVH。
型芯片可以是金属基板,其可以包括铝(Al)或铜(Cu)或不锈钢(SS)。优选地,型芯片是敷铜箔板(CCL)。
优选地,第一电子元件和第二电子元件的尺寸和形状是相同的。同样优选地,相对于型芯片对称地安装第一电子元件和第二电子元件。优选地,第一电子元件或第二电子元件是通过应用于第一电子元件与型芯片之间和第二电子元件与型芯片之间的芯片粘合剂而安装在型芯片上的。
第一绝缘层或第二绝缘层可以是半固化片(PPG)或层间绝缘膜(ABF),其中,电路图样是可以通过在第一绝缘层或第二绝缘层的表面上堆叠铜箔层而形成的。优选地,第一绝缘层和第二绝缘层是RCC。
优选地,铸孔可以具有比IVH的横截面大的横截面,以使得IVH能够穿透型芯片。优选地,在IVH的内圆周上形成金属层,并且金属层与电路图样电连接。
电镀层可以在第一BVH和第二BVH的表面上形成。这个方法还可以包括:在电路图样上堆叠绝缘层和电镀层,并且在电镀层上形成外层电路。
本发明其他方面和优点将在以下描述中部分描述,并且可以从描述中部分显而易见,或者可以通过实践本发明而了解。
附图说明
图1是根据现有技术的具有嵌入式电子元件的印刷电路板的横截面视图;
图2是基于本发明的第一披露实施例的具有嵌入式电子元件的印刷电路板的横截面视图;
图3是基于本发明的第二披露实施例的具有嵌入式电子元件的印刷电路板的横截面视图;
图4是基于本发明的第三披露实施例的具有嵌入式电子元件的印刷电路板的横截面视图;
图5是示出了制造基于本发明的第一披露实施例的具有嵌入式电子元件的印刷电路板的方法的流程图;
图6是示出了制造基于本发明的第一披露实施例的具有嵌入式电子元件的印刷电路板的工艺的生产过程图解;
图7是示出了制造基于本发明的第二披露实施例的具有嵌入式电子元件的印刷电路板的方法的流程图;以及
图8是示出了制造基于本发明的第二披露实施例的具有嵌入式电子元件的印刷电路板的工艺的生产过程图解。
具体实施方式
下文中将结合附图来详细描述本发明的实施例,贯穿全文,相同的参考标号表示相同的元件,并且视需要省略重复的描述。
图2是基于本发明的第一披露实施例的具有嵌入式电子元件的印刷电路板的横截面视图。在图2中示出了型芯基板1、型芯片10、铸孔12、第一电子元件20、第二电子元件30、芯片粘合剂22,32、第一绝缘层40、IVH42、第二绝缘层50、电路图样60、BVH62、和外层电路70。
本发明的特征在于型芯基板1的结构,其中,嵌入了若干电子元件,同时相对于型芯片10保持对称,从而最小化在引入材料(在以前的制造具有嵌入式元件的印刷电路板的工艺中未使用过)过程中的复杂化,保持了机械强度(即使厚度等于或小于现有技术中所使用的厚度),并且提高了放热效率。
基于本发明实施例的型芯基板1结构总共具有三个金属层,是通过以下步骤实现的:在由金属薄片(诸如铝(Al)、铜(Cu)、或不锈钢(SS)等)、或者薄敷铜箔板(CCL)制成的型芯片10中形成与IVH42绝缘的孔;在型芯片10上以芯片的形式,安装诸如有源或无源元件的电子元件,并且之后堆叠诸如RCC等的材料;以及在型芯片10的相对侧面上再次安装电子元件并且堆叠RCC等。
这不仅提高了型芯基板1的导热性,还由于电子元件是相对于型芯片10以对称结构安装的,最小化热应力环境中的弯曲并且改进了薄基板的结构强度。
然而,在本发明的实施例中,电子元件具有对称结构的描述并不仅仅意味着完美数学对称地安装相同的电子元件,而是意味着与传统型芯基板的结构相比更加对称。本领域技术人员应理解,本发明并不受限于安装在型芯片10的两个侧面上的两个电子元件的尺寸相同的情况,而且还包括元件重叠以显示结构强度的那些情况。
基于本发明的第一披露实施例的印刷电路板包括:型芯片10;安装在型芯片10的两个侧面上的第一电子元件20和第二电子元件30;堆叠用于覆盖电子元件的绝缘层;以及形成在绝缘层的表面上的电路图样60,其中,第一电子元件20和第二电子元件30被安装为彼此相互重叠。
就是说,本实施例具有安装在型芯片10的两个侧面上的电子元件,以使它们彼此相互重叠,以最小化不对称结构的弯曲现象并增加结构强度。
因而,为了增加基板的结构强度,期望使用金属基板用于型芯片10,在其两个侧面上可以安装电子元件,其中,可以使用诸如铝(Al)、铜(Cu)、或不锈钢(SS)等的材料。同样,在确保结构强度的范围内,可以使用薄敷铜箔板(CCL)。
然而,由于型芯片10不仅具有增加基板的结构强度的作用,而且还具有有效放热的作用,所以考虑到强度和导热性,需要选择合适的金属。
理论上,如果安装在型芯片10的两个侧面上的第一电子元件20和第二电子元件30的尺寸和形状相同,并且相对于型芯片10对称地安装是最好的。然而,由于本发明的一个方面是最小化由仅在传统型芯基板的一个侧面上安装电子元件而引起的不对称结构的弯曲问题,本发明并不受限于数学地对称安装相同的电子元件,并且很明显地,还包括基本对称地在型芯片10的两个侧面上安装电子元件从而表现强度的那些情况。
可以通过在电子元件和型芯片之间应用芯片粘合剂22、32来将电子元件安装在型芯片10上。然而,本发明并不受限于使用芯片粘合剂22、32来将电子元件安装在基板上,并且明显地,可应用本领域技术人员显而易见范围内的其他方法。
典型的芯片粘合剂22、32使用环氧树脂。在将芯片粘合剂22、32分配到型芯片10上并且将电子元件放置其上之后,通过加热来使芯片粘合剂22、32硬化,以便将电子元件安装到型芯片10上。
因此,芯片粘合剂22、32的触变性影响了放置在芯片粘合剂22、32上的电子元件的对称和位置。在本发明的实施例中,使用了触变性很高的芯片粘合剂22、32,以使放置在电子元件和基板之间的芯片粘合剂22、32的厚度均匀,并且使电子元件稳定对准在期望位置。
虽然优选地,当用于安装电子元件的芯片粘合剂22、32等的材料接近液体时,使用具有触变性(指数值高)的材料,但是仍需要警告,表面能可以在安装过程中对电子元件产生机械影响。
为了增加触变性,可以将SiO2作为填充料添加在传统环氧树脂中,但是本发明并不受限于使用包括SiO2填充料的芯片粘合剂22、32,并且显而易见地,在本领域技术人员显而易见的范围内,可以使用任意合成物来提供高触变性。
在将芯片粘合剂22、32分配在型芯片10上并且放置电子元件之后,对芯片粘合剂22、32加热以硬化,从而将电子元件安装至型芯片10。在本发明的一些实施例中,由于金属基板被用作型芯片10,它的导热性较高,所以通过对金属基板加热,可以比现有技术更加容易地硬化芯片粘合剂22、32。
就是说,基于本发明的一些实施例的金属基板可以用于使用芯片粘合剂22、32来布置电子元件。具体地,由于不仅在将电子元件布置在芯片粘合剂22、32上之后,而且视需要,在分配芯片粘合剂22、32并布置电子元件之后,可以通过金属基板来更容易地传送热,所以可以很容易调节芯片粘合剂22、32的硬化程度,以达到改进电子元件的布置的目的。
同时,当如上所述使用具有较高触变性的芯片粘合剂22、32时,在本领域技术人员显而易见的范围内,可以使用硬化剂,以通过加热来促进硬化。
因而,在使用高触变性芯片粘合剂22、32放置电子元件之后,通过加热金属基板来硬化芯片焊接粘合剂,来改进将电子元件安装在印刷电路板中的布置工艺。
在安装电子元件之后,堆叠诸如半固化片(PPG)、背胶铜箔(RCC)、或层间绝缘膜(ABF)等的绝缘层。在堆叠绝缘层之后,可以应用加减法来形成电路图样60。可以重复以上程序来形成多层的印刷电路板。
如上所述,可以在绝缘层的表面上形成电路图样60,并且为了形成在型芯基板1的两个侧面上的电路图样60之间的电互相连接,可以形成穿透第一绝缘层40、第二绝缘层50、和型芯片10的IVH42。
因为诸如金属基板或CCL等的导电元件用于基于本发明实施例的型芯片10,所以通过钻孔等方式形成穿透型芯片10的IVH42,以及在IVH42的内圆周上形成诸如电镀等的金属层导致在IVH42和型芯片10之间短路的风险。为了防止,需要预先形成铸孔12,它具有比IVH42的横截面更大的横截面,使得IVH42能够穿透型芯片10。
可以在安装电子元件之前,在型芯片10中形成铸孔12,或者可以在安装电子元件之后并且在堆叠绝缘层之前形成。
同样,在第一披露实施例中,通过将电子元件安装在型芯片10的两个侧面上以及堆叠绝缘层来形成型芯基板1、在其上形成附加的外层电路70、然后执行阻焊剂(SR)涂覆、表面处理、和焊球连接等工艺,来形成多层BGA(球状矩阵阵列)。
通常,对于具有嵌入式电子元件的印刷电路板来说,嵌入式电子元件的成本要远远高于基板的成本,同时嵌入式元件的差错会导致整个板不能用。因而,在经济方面,将本发明的实施例应用于BGA板可以比应用于规则多层印刷电路板更加有效,BGA的焦点在于高密度。
图3是基于本发明的第二披露实施例的具有嵌入式电子元件的印刷电路板的横截面视图。在图3中示出了型芯基板1、型芯片10、铸孔12、第一电子元件20、第二电子元件30、芯片粘合剂22,32、第一绝缘层40、IVH42、第二绝缘层50、电路图样60、和BVH62。
不同于第一披露实施例,在第二披露实施例中,在形成型芯基板1之后,立即执行阻焊剂(SR)涂覆、表面处理、和焊球连接等工艺,以形成具有总共两个电路图样60的BGA(球状矩阵阵列)板。
可以将在型芯基板1上直接执行表面处理而无需形成多层电路的这种情况应用于最新的PoP(层叠封装)存储器领域中,其中,需要高密度以及厚度的减小。传统的PoP存储器,存在由于堆叠而厚度增加的问题,并且随着厚度的减小成为作为PoP的一个应用领域的薄型蜂窝电话等中的重要问题,本发明的实施例可以提供一种减小厚度的方案同时在基板中嵌入电子元件。
图4是基于本发明的第三披露实施例的具有嵌入式电子元件的印刷电路板的横截面视图。在图4中示出了型芯基板1、型芯片11、铸孔12、第一电子元件20、第二电子元件30、芯片粘合剂22,32、第一绝缘层40、IVH42、第二绝缘层50、电路图样60、和BVH62。
不同于第一披露实施例,在第三实施例中,一薄层的敷铜箔板(CCL)用于型芯片11。如图4所示,在本领域技术人员显而易见的范围内,本发明并不限于使用金属基板用于型芯片11,并且显而易见地可以使用诸如敷铜箔板等的其他基板,其能够保持放热和热应力环境中的弯曲强度。
图5是示出了基于本发明第一披露实施例的具有嵌入式电子元件的印刷电路板的制造方法的流程图。图6是示出了制造基于本发明的第一披露实施例的具有嵌入式电子元件的印刷电路板的工艺的生产过程图解。在图6中示出了型芯片10、铸孔12、第一电子元件20、第二电子元件30、芯片粘合剂22,32、第一绝缘层40、IVH42、第二绝缘层50、电路图样60、BVH62、和外层电路70。
为了制造具有改进的抗弯曲强度以及允许高密度堆叠的印刷电路板,通过如上所述对称地在型芯片10的两个侧面上嵌入电子元件,首先,如图6中的(a)所示,将第一电子元件20安装在型芯片10(100)的一个侧面上,然后如图6中的(b)所示,堆叠第一绝缘层40(110)来覆盖第一电子元件20。
本发明的一个方面是增强具有嵌入式元件的印刷电路板的弯曲强度和放热特性,并且如上所述,在确保结构强度的范围内,铝(Al)、铜(Cu)、或不锈钢(SS)等的金属基板、或者薄敷铜箔板(CCL)可以用于型芯片10。
由于通常使用安放在硬化剂上的型芯片10来安装电子元件并堆叠绝缘层,所以在堆叠第一绝缘层40之后,为翻转型芯片10的过程(120),如图6中的(c)所示,以将第二电子元件30安装在型芯片10的另一个侧面上。
当然,当可以将电子元件安装在型芯片10的另一个侧面上而无需翻转型芯片10时,诸如通过使用夹具等,尤其为这个目的而设计的,可以省略返翻转型芯片10的过程。在这样情况下,如下将讨论的,可以同时在型芯片10的两个侧面上执行电子元件的安装和绝缘层的堆叠。
在转动型芯片10之后,将第二电子元件30安装在型芯片10的另一个侧面上(130),如图6中的(d)所示,并且堆叠第二绝缘层50(140),以覆盖第二电子元件30,如图6中的(e)所示。安装第二电子元件30来与第一电子元件20重叠,因而,如上所述,形成了电子元件对称布置的结构,从而改进了反抗弯曲应力的力。
虽然对于相对于型芯片10对称地嵌入电子元件来说,第一电子元件20和第二电子元件30的尺寸和形状相同可能是最优选的,但是,如上所述,本发明并不限于数学意义上的对称。
通过在电子元件和型芯片之间应用芯片粘合剂22、32来将电子元件安装在型芯片10上,其中使用了触变性高的产品可以将电子元件稳定地对准在理想位置,用于改进定位。
因而,与将基板的一部分穿孔来形成孔,然后将电子元件嵌入在孔中的传统工艺相比,通过将电子元件安装在型芯片10上,然后用绝缘层覆盖来嵌入电子元件使得过程减少。同样,在由于现有技术的孔而未被设计的电路图样60的部分上设计电路图样60,以便增加布线密度。
诸如半固化片(PPG)、ABF等等的材料可以用作绝缘层,然后通过电镀等将铜箔层堆叠在绝缘层上,以便可以应用形成电路图样60的后续过程。同时,由于堆叠铜箔层的过程可以省略,所以当使用RCC用于绝缘层时,可以更加有效地形成电路图样60。
为了电互连形成在绝缘层表面上的电路图样60,形成穿透第一绝缘层40、第二绝缘层50、和型芯片10的IVH42,如图6中的(f)所示。由于金属层形成在IVH42的内圆周上,所以在型芯片10(使用诸如金属基板等的导电件)和IVH42之间可能发生电短路的风险。
因而,如图6中的(c)所示,将部分型芯片10穿孔,然后预先形成铸孔12(122),铸孔具有比IVH42更大的横截面,以使得IVH42能够穿过型芯片10。
对应于形成IVH42的位置形成铸孔12,并且铸孔形成有比IVH42更大的横截面,以使IVH42可以通过而不接触,从而IVH42和型芯片10电绝缘。
最后,如图6中的(h)所示,在第一绝缘层40和/或第二绝缘层50的表面上形成电路图样60(170),以完成型芯基板1。传统的加法工艺或减法工艺可以应用于在绝缘层的表面上形成电路图样60的方法。
为了电连接电路图样60和电子元件,在形成电路图样60之前,对应于电子元件的电极的位置在绝缘层中形成BVH(盲孔)62,如图6中的(g)所示。在形成电路图样60的过程中,通过在BVH62的表面上执行电镀等来实现电子元件和电路图样60的电极之间的电互连。就是说,对应于第一电子元件20的位置在第一绝缘层40中形成第一BVH62,并且对应于第二电子元件30的位置在第二绝缘层50中形成第二BVH62(160)。
通过将电子元件安装在型芯片10的两个侧面上、在其上堆叠绝缘层、然后在绝缘层的表面上形成电路图样60完成本发明的一些实施例的型芯基板1,同时可以执行后续的进一步将绝缘层和铜箔层堆叠在电路图样60上以及在铜箔层上形成外层电路70的步骤,以制造多层印刷电路板。
图7是示出了制造基于本发明的第二披露实施例的具有嵌入式电子元件的印刷电路板的方法的流程图,以及图8是示出了制造基于本发明的第二披露实施例的具有嵌入式电子元件的印刷电路板的工艺的生产过程图解。在图8中示出了型芯片10、铸孔12、第一电子元件20、第二电子元件30、芯片粘合剂22,32、第一绝缘层40、IVH42、第二绝缘层50、电路图样60、和BVH62。
与第一披露实施例不同,第二披露实施例的特性在于电子元件被同时安装在型芯片10的两个侧面上。对于型芯片10,一个侧面对应于顶侧,以及另一个侧面对应于底侧,因此在本领域技术人员显而易见的范围内,诸如使用为该目的所特别设计的夹具,需要在不转动型芯片10的情况下将电子元件安装到底侧上的方法。
为了制造基于第二披露实施例的印刷电路板,首先,将第一电子元件20安装在型芯片10的一个侧面上,然后将第二电子元件30安装在型芯片10的另一个侧面上,以与第一电子元件20重叠(200),如图8中的(a)所示。
为了提高印刷电路板的结构强度和放热特性,将诸如铝(Al)、铜(Cu)、或不锈钢(SS)等的金属基板、或薄敷铜箔板(CCL)用于型芯片10。
为了最小化在制造印刷电路板的过程中,在热应力环境中所产生的弯曲现象,期望第一电子元件20和第二电子元件30的尺寸和形状相同并且它们是相对于型芯片10对称安装。然而,本领域技术人员显而易见,在确保结构强度的基本对称结构的范围内,电子元件的尺寸、形状和安装位置可以改变。
通过在电子元件和型芯片之间应用芯片粘合剂22、32来将电子元件安装在型芯片10上,其中需要触变性高的芯片粘合剂22、32,用于改进所安装的电子元件的布置。
如上所述,为了实现IVH42和型芯片10之间的电连接,将型芯片10在形成IVH42位置的位置上进行穿孔,以产生具有比IVH42更大的横截面的铸孔12。
接下来,如图8中的(b)所示,将第一绝缘层40堆叠在型芯片10的一个侧面上,以覆盖第一电子元件20,以及将第二绝缘层50堆叠在型芯片10的另一个侧面上,以覆盖第二电子元件30(210)。
诸如半固化片(PPG)、ABF等的材料可以用作绝缘层,并且通过电镀等来将铜箔层形成在绝缘层上,以使得电路图样60能够形成。同时,由于堆叠铜箔层的过程可以省略,所以当使用RCC用于绝缘层时,可以更加有效地形成电路图样60。
接下来,如图8中的(c)所示,形成穿透第一绝缘层40、第二绝缘层50、和型芯片10的IVH42,以及通过电镀等将金属层安装在IVH42的内圆周上,用于电路图样60之间的电互连(220)。
在绝缘层的表面上形成电路图样60之前,对应于第一电子元件20的电极的位置,在第一绝缘层40中形成第一BVH(盲孔)62,以及对应于第二电子元件30的电极的位置,在第二绝缘层50中形成第二BVH62(230),如图8中的(d)所示,以实现电路图样60和嵌入式电子元件之间的电连接。通过电镀在BVH62的表面上形成金属层,以电连接电子元件和电路图样60。
最后,如图8中的(e)所示,在绝缘层的表面上形成电路图样60,以完成型芯基板1(240)。如上所述,为了制造多层的印刷电路板,可以将附加的绝缘层和铜箔层堆叠在电路图样60上,其中,外层电路70形成在铜箔层上。
根据如上所述的本发明的一些方面,由于同时嵌入多个电子元件,所以改进了具有嵌入式元件的印刷电路板的密度,并且由于电子元件被安装在为金属基板的型芯片的两个侧面上,所以改进了放热特性和机械强度,包括增加了在热应力环境下的弯曲强度。
同时,由于在嵌入电子元件的过程中省略了形成孔的过程,所以减少了处理,并且可以在现有技术中的孔的部分中设计电路图样,以改进线密度。
另外,各个BVH过程和诸如为在型芯片的两个侧面上安装的两个电子元件的进行电镀的过程可以通过统一集中处理来执行,以改进处理效率并降低成本。
尽管已经示出并描述了本发明的多个实施例,但是对于本领域技术人员而言显而易见的是,可以对这些实施例进行改变,而不偏离本发明的精神和范围。
Claims (29)
1.一种具有嵌入式电子元件的印刷电路板,所述印刷电路板包括:
型芯片;
第一电子元件,安装在所述型芯片的一个侧面上;
第二电子元件,安装在所述型芯片的另一个侧面上并且与所述第一电子元件重叠;
第一绝缘层,堆叠在所述型芯片的一个侧面上并且覆盖所述第一电子元件;
第二绝缘层,堆叠在所述型芯片的另一个侧面上并且覆盖所述第二电子元件;以及
电路图样,形成在所述第一绝缘层或者所述第二绝缘层的表面上。
2.根据权利要求1所述的印刷电路板,其中,所述型芯片是金属基板。
3.根据权利要求2所述的印刷电路板,其中,所述金属基板包括铝(Al)或铜(Cu)或不锈钢(SS)。
4.根据权利要求1所述的印刷电路板,其中,所述型芯片是敷铜箔板(CCL)。
5.根据权利要求1所述的印刷电路板,其中,所述第一电子元件和所述第二电子元件的尺寸和形状是相同的。
6.根据权利要求1所述的印刷电路板,其中,所述第一电子元件和所述第二电子元件相对于所述型芯片对称安装。
7.根据权利要求1所述的印刷电路板,其中,所述第一电子元件或者所述第二电子元件是通过应用于所述第一电子元件与所述型芯片之间和所述第二电子元件与所述型芯片之间的芯片粘合剂而安装在所述型芯片上的。
8.根据权利要求1所述的印刷电路板,其中,所述第一绝缘层或者所述第二绝缘层包括以下至少之一:半固化片(PPG)、背胶铜箔(RCC)、和层间绝缘膜(ABF)。
9.根据权利要求1所述的印刷电路板,还包括穿透所述第一绝缘层、所述第二绝缘层、和所述型芯片的IVH(局部层间导通孔),其中,具有比所述IVH的横截面大的横截面的铸孔形成在所述型芯片中,以使得所述IVH穿透所述型芯片。
10.根据权利要求9所述的印刷电路板,其中,金属层形成在所述IVH的内圆周上,并且所述金属层与所述电路图样电连接。
11.一种制造具有嵌入式电子元件的印刷电路板的方法,所述方法包括:
(a)将第一电子元件安装在型芯片的一个侧面上;
(b)将第一绝缘层堆叠在所述型芯片的一个侧面上,以使所述第一绝缘层覆盖所述第一电子元件;
(c)将第二电子元件安装在所述型芯片的另一个侧面上,以使所述第二电子元件与所述第一电子元件重叠;
(d)将第二绝缘层堆叠在所述型芯片的所述另一个侧面上,以使所述第二绝缘层覆盖所述第二电子元件;以及
(e)在所述第一绝缘层或所述第二绝缘层的表面上形成电路图样。
12.一种制造具有嵌入式电子元件的印刷电路板的方法,所述方法包括:
(a)在型芯片的一个侧面上安装第一电子元件并且在所述型芯片的另一个侧面上安装第二电子元件,以使所述第二电子元件与所述第一电子元件重叠;
(b)在所述型芯片的一个侧面上堆叠第一绝缘层,以使所述第一绝缘层覆盖所述第一电子元件,并且在所述型芯片的另一个侧面上堆叠第二绝缘层,以使所述第二绝缘层覆盖所述第二电子元件;以及
(c)在所述第一绝缘层或所述第二绝缘层的表面上形成电路图样。
13.根据权利要求11所述的方法,还包括在堆叠所述第一绝缘层的所述操作(b)和安装所述第二电子元件的所述操作(c)之间,翻转所述型芯片,以使所述型芯片的所述另一个侧面转为面对所述型芯片的一个侧面。
14.根据权利要求11或12所述的方法,其中,所述型芯片是金属基板。
15.根据权利要求14所述的方法,其中,所述金属基板包括铝(Al)或铜(Cu)或不锈钢(SS)。
16.根据权利要求11或12所述的方法,其中,所述型芯片是敷铜箔板(CCL)。
17.根据权利要求11或12所述的方法,其中,所述第一电子元件和所述第二电子元件的尺寸和形状是相同的。
18.根据权利要求11或12所述的方法,其中,相对于所述型芯片对称地安装所述第一电子元件和所述第二电子元件。
19.根据权利要求11或12所述的方法,其中,所述第一电子元件或所述第二电子元件是通过应用于所述第一电子元件与所述型芯片之间和所述第二电子元件与所述型芯片之间的芯片粘合剂而安装在所述型芯片上的。
20.根据权利要求11或12所述的方法,其中,所述第一绝缘层或所述第二绝缘层是半固化片(PPG)或层间绝缘膜(ABF),并且所述电路图样是通过在所述第一绝缘层或所述第二绝缘层的表面上堆叠铜箔层而形成的。
21.根据权利要求11或12所述的方法,其中,所述第一绝缘层和所述第二绝缘层是RCC。
22.根据权利要求11所述的方法,还包括:在堆叠所述第二绝缘层的所述操作(d)之前,将所述型芯片的至少一部分穿孔,以形成至少一个铸孔,并且还包括:在堆叠所述第二绝缘层的所述操作(d)之后,形成穿透所述第一绝缘层、所述第二绝缘层、和所述型芯片的至少一个IVH。
23.根据权利要求12所述的方法,还包括:在堆叠所述第一绝缘层和堆叠所述第二绝缘层的所述操作(b)之前,将所述型芯片的至少一部分穿孔,以形成至少一个铸孔,并且还包括:在堆叠所述第一绝缘层和堆叠所述第二绝缘层的所述操作(b)之后,形成穿透所述第一绝缘层、所述第二绝缘层、和所述型芯片的至少一个IVH。
24.根据权利要求22或23所述的方法,其中,所述铸孔具有比所述IVH的横截面大的横截面,以使得所述IVH穿透所述型芯片。
25.根据权利要求24所述的方法,其中,在所述IVH的内圆周上形成金属层,并且所述金属层与所述电路图样电连接。
26.根据权利要求11所述的方法,还包括:对应于所述第一电子元件的至少一个电极的位置,在所述第一绝缘层中形成至少一个第一BVH(盲孔),并且在堆叠所述第二绝缘层的所述操作(d)之后,对应于所述第二电子元件的至少一个电极的位置,在所述第二绝缘层中形成至少一个第二BVH。
27.根据权利要求12所述的方法,还包括:对应于所述第一电子元件的至少一个电极的位置,在所述第一绝缘层中形成至少一个第一BVH(盲孔),并且在堆叠所述第一绝缘层和堆叠所述第二绝缘层的所述操作(b)之后,对应于所述第二电子元件的至少一个电极的位置,在所述第二绝缘层中形成至少一个第二BVH。
28.根据权利要求26或27所述的方法,其中,在所述至少一个第一BVH和所述至少一个第二BVH的至少一个表面上形成电镀层。
29.根据权利要求11或12所述的方法,还包括:在所述电路图样上堆叠绝缘层和电镀层,并且在所述电镀层上形成外层电路。
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- 2006-12-06 DE DE102006057542A patent/DE102006057542A1/de not_active Ceased
- 2006-12-08 JP JP2006332078A patent/JP2007165888A/ja active Pending
- 2006-12-12 CN CN2006101672694A patent/CN1984533B/zh not_active Expired - Fee Related
- 2006-12-13 US US11/637,664 patent/US7697301B2/en not_active Expired - Fee Related
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2010
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US20070132536A1 (en) | 2007-06-14 |
US20100154210A1 (en) | 2010-06-24 |
US20130042472A1 (en) | 2013-02-21 |
JP2007165888A (ja) | 2007-06-28 |
KR100656751B1 (ko) | 2006-12-13 |
CN1984533B (zh) | 2011-09-21 |
US7697301B2 (en) | 2010-04-13 |
DE102006057542A1 (de) | 2007-07-05 |
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