CN1877834B - 半导体集成电路器件及其制造方法 - Google Patents

半导体集成电路器件及其制造方法 Download PDF

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Publication number
CN1877834B
CN1877834B CN2006100916013A CN200610091601A CN1877834B CN 1877834 B CN1877834 B CN 1877834B CN 2006100916013 A CN2006100916013 A CN 2006100916013A CN 200610091601 A CN200610091601 A CN 200610091601A CN 1877834 B CN1877834 B CN 1877834B
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China
Prior art keywords
layer
vacuum ultraviolet
dielectric layer
semiconductor device
conductive layer
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Chinese (zh)
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CN1877834A (zh
Inventor
张东烈
李泰政
金成焕
李受哲
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Publication of CN1877834A publication Critical patent/CN1877834A/zh
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • H10W42/20Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0181Manufacturing their gate insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0186Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0188Manufacturing their isolation regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/47Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts comprising two or more dielectric layers having different properties, e.g. different dielectric constants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/40Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48Insulating materials thereof

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CN2006100916013A 2005-06-08 2006-06-06 半导体集成电路器件及其制造方法 Active CN1877834B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020050049016A KR100703971B1 (ko) 2005-06-08 2005-06-08 반도체 집적 회로 장치 및 그 제조 방법
KR49016/05 2005-06-08

Publications (2)

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CN1877834A CN1877834A (zh) 2006-12-13
CN1877834B true CN1877834B (zh) 2010-09-29

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US (3) US7304387B2 (https=)
JP (2) JP2006344956A (https=)
KR (1) KR100703971B1 (https=)
CN (1) CN1877834B (https=)
DE (1) DE102006024654A1 (https=)
TW (1) TWI302377B (https=)

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KR100878402B1 (ko) * 2007-07-25 2009-01-13 삼성전기주식회사 다층 배선을 구비한 반도체 장치 및 그 형성 방법
KR100922560B1 (ko) * 2007-09-28 2009-10-21 주식회사 동부하이텍 플래시 메모리 소자 및 그의 제조 방법
US9184097B2 (en) * 2009-03-12 2015-11-10 System General Corporation Semiconductor devices and formation methods thereof
CN101989574B (zh) * 2009-08-06 2012-10-31 中芯国际集成电路制造(上海)有限公司 应变记忆作用的半导体器件制造方法
CN102376754A (zh) * 2010-08-19 2012-03-14 中芯国际集成电路制造(上海)有限公司 半导体器件结构及制作该半导体器件结构的方法
US20120261767A1 (en) * 2011-04-14 2012-10-18 Intersil Americas Inc. Method and structure for reducing gate leakage current and positive bias temperature instability drift
CN103021999B (zh) * 2011-09-27 2015-06-03 中芯国际集成电路制造(上海)有限公司 半导体结构及其制作方法
US8785997B2 (en) * 2012-05-16 2014-07-22 Infineon Technologies Ag Semiconductor device including a silicate glass structure and method of manufacturing a semiconductor device
JP2014165191A (ja) 2013-02-21 2014-09-08 Seiko Instruments Inc 紫外線消去型の不揮発性半導体装置
CN104425542B (zh) * 2013-08-26 2017-08-04 昆山工研院新型平板显示技术中心有限公司 一种有机发光显示装置及其制备方法
CA2932901A1 (en) * 2014-02-26 2015-09-03 Halliburton Energy Services, Inc. Protein-based fibrous bridging material and process and system for treating a wellbore
CN105374740B (zh) * 2014-08-29 2018-10-23 中芯国际集成电路制造(上海)有限公司 一种半导体器件及其制造方法、电子装置
JP2016162848A (ja) * 2015-02-27 2016-09-05 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
KR102258112B1 (ko) * 2015-04-01 2021-05-31 삼성전자주식회사 반도체 소자 및 이의 제조 방법
WO2017111847A1 (en) * 2015-12-24 2017-06-29 Intel Corporation Techniques for forming electrically conductive features with improved alignment and capacitance reduction
CN110021559B (zh) * 2018-01-09 2021-08-24 联华电子股份有限公司 半导体元件及其制作方法
US10916498B2 (en) * 2018-03-28 2021-02-09 Taiwan Semiconductor Manufacturing Co., Ltd. Interconnect structure for logic circuit
JP7719608B2 (ja) * 2021-02-08 2025-08-06 ローム株式会社 半導体素子、当該半導体素子を備えた半導体装置、および、半導体素子の製造方法

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Also Published As

Publication number Publication date
US20080057689A1 (en) 2008-03-06
US7304387B2 (en) 2007-12-04
US20060278949A1 (en) 2006-12-14
US8058185B2 (en) 2011-11-15
JP2006344956A (ja) 2006-12-21
KR20060127687A (ko) 2006-12-13
US20120032269A1 (en) 2012-02-09
TW200721451A (en) 2007-06-01
JP2013145901A (ja) 2013-07-25
KR100703971B1 (ko) 2007-04-06
DE102006024654A1 (de) 2007-02-01
TWI302377B (en) 2008-10-21
CN1877834A (zh) 2006-12-13

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