CN1738002A - 半导体装置的制造方法 - Google Patents
半导体装置的制造方法 Download PDFInfo
- Publication number
- CN1738002A CN1738002A CNA2005100848365A CN200510084836A CN1738002A CN 1738002 A CN1738002 A CN 1738002A CN A2005100848365 A CNA2005100848365 A CN A2005100848365A CN 200510084836 A CN200510084836 A CN 200510084836A CN 1738002 A CN1738002 A CN 1738002A
- Authority
- CN
- China
- Prior art keywords
- dielectric film
- semiconductor substrate
- via hole
- electrode
- pad electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/055—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads having a passage through the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0231—Manufacturing methods of the redistribution layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
- H01L2224/0237—Disposition of the redistribution layers
- H01L2224/02372—Disposition of the redistribution layers connecting to a via connection in the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05541—Structure
- H01L2224/05548—Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (6)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP210216/04 | 2004-07-16 | ||
JP2004210216A JP4373866B2 (ja) | 2004-07-16 | 2004-07-16 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1738002A true CN1738002A (zh) | 2006-02-22 |
CN100514565C CN100514565C (zh) | 2009-07-15 |
Family
ID=35799210
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2005100848365A Active CN100514565C (zh) | 2004-07-16 | 2005-07-18 | 半导体装置的制造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7416963B2 (zh) |
JP (1) | JP4373866B2 (zh) |
KR (2) | KR100679572B1 (zh) |
CN (1) | CN100514565C (zh) |
TW (1) | TW200605282A (zh) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101599477B (zh) * | 2008-06-06 | 2012-10-10 | 瑞萨电子株式会社 | 半导体装置及制造该半导体装置的方法 |
CN102751234A (zh) * | 2011-04-19 | 2012-10-24 | 索尼公司 | 半导体装置及其制造方法、固体摄像装置以及电子设备 |
CN103811328A (zh) * | 2014-03-05 | 2014-05-21 | 上海先进半导体制造股份有限公司 | 防止多层外延生长时背面形成多晶颗粒的方法及背封结构 |
CN106206535A (zh) * | 2015-05-29 | 2016-12-07 | 株式会社东芝 | 半导体装置及半导体装置的制造方法 |
CN108022898A (zh) * | 2017-12-29 | 2018-05-11 | 苏州晶方半导体科技股份有限公司 | 一种半导体器件及其制作方法 |
Families Citing this family (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4850392B2 (ja) * | 2004-02-17 | 2012-01-11 | 三洋電機株式会社 | 半導体装置の製造方法 |
JP2005235860A (ja) | 2004-02-17 | 2005-09-02 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
JP4443379B2 (ja) * | 2004-10-26 | 2010-03-31 | 三洋電機株式会社 | 半導体装置の製造方法 |
TWI303864B (en) * | 2004-10-26 | 2008-12-01 | Sanyo Electric Co | Semiconductor device and method for making the same |
JP4873517B2 (ja) * | 2004-10-28 | 2012-02-08 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置及びその製造方法 |
US7485967B2 (en) * | 2005-03-10 | 2009-02-03 | Sanyo Electric Co., Ltd. | Semiconductor device with via hole for electric connection |
JP4812512B2 (ja) * | 2006-05-19 | 2011-11-09 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置の製造方法 |
JP5143382B2 (ja) * | 2006-07-27 | 2013-02-13 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置及びその製造方法 |
JP5266650B2 (ja) * | 2007-03-05 | 2013-08-21 | セイコーエプソン株式会社 | 半導体装置とその製造方法および電子機器 |
JP4937842B2 (ja) | 2007-06-06 | 2012-05-23 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
FR2930840B1 (fr) * | 2008-04-30 | 2010-08-13 | St Microelectronics Crolles 2 | Procede de reprise de contact sur un circuit eclaire par la face arriere |
JP2009295859A (ja) * | 2008-06-06 | 2009-12-17 | Oki Semiconductor Co Ltd | 半導体装置および半導体装置の製造方法 |
TWI449373B (zh) * | 2008-06-11 | 2014-08-11 | Asustek Comp Inc | 區域網路的管理方法及其裝置 |
KR101002680B1 (ko) | 2008-10-21 | 2010-12-21 | 삼성전기주식회사 | 반도체 패키지 및 그 제조 방법 |
JP5537016B2 (ja) * | 2008-10-27 | 2014-07-02 | 株式会社東芝 | 半導体装置および半導体装置の製造方法 |
JP5424632B2 (ja) | 2008-12-19 | 2014-02-26 | キヤノン株式会社 | インクジェット記録ヘッド用基板の製造方法 |
JP5462524B2 (ja) * | 2009-05-13 | 2014-04-02 | パナソニック株式会社 | 半導体装置 |
JP2011009645A (ja) | 2009-06-29 | 2011-01-13 | Toshiba Corp | 半導体装置及びその製造方法 |
JP5644242B2 (ja) | 2009-09-09 | 2014-12-24 | 大日本印刷株式会社 | 貫通電極基板及びその製造方法 |
US8471367B2 (en) * | 2009-11-12 | 2013-06-25 | Panasonic Corporation | Semiconductor device and method for manufacturing semiconductor device |
KR101732975B1 (ko) | 2010-12-03 | 2017-05-08 | 삼성전자주식회사 | 반도체 장치의 제조 방법 |
KR101049380B1 (ko) | 2010-12-21 | 2011-07-15 | 한국기계연구원 | 전해도금을 이용한 반도체 소자 3차원 패키지용 관통 전극 및 그 제조 방법 |
JP5922915B2 (ja) * | 2011-12-02 | 2016-05-24 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
EP2648214B1 (en) * | 2012-04-05 | 2019-06-12 | ams AG | Methods of producing a semiconductor device with a through-substrate via |
JP5917321B2 (ja) * | 2012-07-12 | 2016-05-11 | 株式会社東芝 | 半導体装置及びその製造方法 |
US9553021B2 (en) * | 2012-09-03 | 2017-01-24 | Infineon Technologies Ag | Method for processing a wafer and method for dicing a wafer |
KR102031908B1 (ko) | 2013-02-06 | 2019-10-14 | 삼성전자주식회사 | 관통 전극을 갖는 반도체 소자 및 그 형성 방법 |
KR102411064B1 (ko) | 2015-03-10 | 2022-06-21 | 삼성전자주식회사 | 관통전극을 갖는 반도체 소자 및 그의 제조방법 |
KR102576062B1 (ko) | 2018-11-07 | 2023-09-07 | 삼성전자주식회사 | 관통 실리콘 비아를 포함하는 반도체 소자 및 그 제조 방법 |
CN110854064A (zh) * | 2019-11-27 | 2020-02-28 | 西安电子科技大学 | 一种tsv硅通孔和单层rdl再布线一次性整体成型方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4212293B2 (ja) | 2002-04-15 | 2009-01-21 | 三洋電機株式会社 | 半導体装置の製造方法 |
KR100457057B1 (ko) | 2002-09-14 | 2004-11-10 | 삼성전자주식회사 | 금속막 형성 방법 |
TWI227050B (en) * | 2002-10-11 | 2005-01-21 | Sanyo Electric Co | Semiconductor device and method for manufacturing the same |
JP2004327910A (ja) * | 2003-04-28 | 2004-11-18 | Sharp Corp | 半導体装置およびその製造方法 |
JP4248928B2 (ja) * | 2003-05-13 | 2009-04-02 | ローム株式会社 | 半導体チップの製造方法、半導体装置の製造方法、半導体チップ、および半導体装置 |
-
2004
- 2004-07-16 JP JP2004210216A patent/JP4373866B2/ja not_active Expired - Lifetime
-
2005
- 2005-06-29 TW TW094121797A patent/TW200605282A/zh unknown
- 2005-07-15 KR KR1020050064029A patent/KR100679572B1/ko active IP Right Grant
- 2005-07-15 US US11/182,055 patent/US7416963B2/en active Active - Reinstated
- 2005-07-18 CN CNB2005100848365A patent/CN100514565C/zh active Active
-
2006
- 2006-10-27 KR KR1020060104791A patent/KR100679573B1/ko active IP Right Grant
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101599477B (zh) * | 2008-06-06 | 2012-10-10 | 瑞萨电子株式会社 | 半导体装置及制造该半导体装置的方法 |
CN102751234A (zh) * | 2011-04-19 | 2012-10-24 | 索尼公司 | 半导体装置及其制造方法、固体摄像装置以及电子设备 |
CN102751234B (zh) * | 2011-04-19 | 2016-12-14 | 索尼公司 | 半导体装置及其制造方法、固体摄像装置以及电子设备 |
CN103811328A (zh) * | 2014-03-05 | 2014-05-21 | 上海先进半导体制造股份有限公司 | 防止多层外延生长时背面形成多晶颗粒的方法及背封结构 |
CN103811328B (zh) * | 2014-03-05 | 2016-06-22 | 上海先进半导体制造股份有限公司 | 防止多层外延生长时背面形成多晶颗粒的方法及背封结构 |
CN106206535A (zh) * | 2015-05-29 | 2016-12-07 | 株式会社东芝 | 半导体装置及半导体装置的制造方法 |
US10269748B2 (en) | 2015-05-29 | 2019-04-23 | Toshiba Memory Corporation | Semiconductor device and manufacturing method of semiconductor device |
CN106206535B (zh) * | 2015-05-29 | 2020-04-10 | 东芝存储器株式会社 | 半导体装置及半导体装置的制造方法 |
CN108022898A (zh) * | 2017-12-29 | 2018-05-11 | 苏州晶方半导体科技股份有限公司 | 一种半导体器件及其制作方法 |
Also Published As
Publication number | Publication date |
---|---|
CN100514565C (zh) | 2009-07-15 |
US20060033168A1 (en) | 2006-02-16 |
KR100679573B1 (ko) | 2007-02-07 |
JP4373866B2 (ja) | 2009-11-25 |
JP2006032699A (ja) | 2006-02-02 |
TW200605282A (en) | 2006-02-01 |
KR20060125644A (ko) | 2006-12-06 |
KR100679572B1 (ko) | 2007-02-07 |
US7416963B2 (en) | 2008-08-26 |
KR20060050201A (ko) | 2006-05-19 |
TWI292610B (zh) | 2008-01-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1738002A (zh) | 半导体装置的制造方法 | |
CN1722370A (zh) | 半导体装置的制造方法 | |
CN1779962A (zh) | 半导体装置及其制造方法 | |
CN1257550C (zh) | 半导体装置及其制造方法 | |
CN1574257A (zh) | 半导体装置及其制造方法 | |
CN1198332C (zh) | 布线基片、半导体器件和布线基片的制造方法 | |
CN1260789C (zh) | 电路板,半导体装置制造方法,及电镀系统 | |
CN1779960A (zh) | 半导体装置及其制造方法 | |
CN1093988C (zh) | 化合物半导体发光器件 | |
CN1658372A (zh) | 半导体装置及其制造方法 | |
CN101064294A (zh) | 电路装置及电路装置的制造方法 | |
CN1187806C (zh) | 电路装置的制造方法 | |
CN1208830C (zh) | 半导体芯片与布线基板及制法、半导体晶片、半导体装置 | |
CN1815728A (zh) | 半导体器件以及其制造方法 | |
CN1658385A (zh) | 半导体装置及其制造方法 | |
CN1967800A (zh) | 半导体集成电路器件的制造方法 | |
CN1523665A (zh) | 半导体装置及其制造方法 | |
CN1658368A (zh) | 半导体装置的制造方法 | |
CN1702853A (zh) | 半导体装置及其制造方法 | |
CN1855467A (zh) | 半导体装置及其制造方法 | |
CN1250951A (zh) | 半导体器件及其制造方法 | |
CN1758431A (zh) | 晶背上具有整合散热座的晶圆级封装以及晶片的散热方法 | |
CN1830097A (zh) | 半导体发光器件及其制造方法 | |
CN1728341A (zh) | 半导体装置的制造方法 | |
CN1497717A (zh) | 电路装置及其制造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C56 | Change in the name or address of the patentee | ||
CP01 | Change in the name or title of a patent holder |
Address after: Osaka Japan Patentee after: Sanyo Electric Co.,Ltd. Patentee after: Rohm Co.,Ltd. Patentee after: NEC Corp. Patentee after: Renesas Electronics Corp. Address before: Osaka Japan Patentee before: Sanyo Electric Co.,Ltd. Patentee before: Rohm Co.,Ltd. Patentee before: NEC Corp. Patentee before: NEC electronics Kabushiki Kaisha Address after: Osaka Japan Patentee after: Sanyo Electric Co.,Ltd. Patentee after: Rohm Co.,Ltd. Patentee after: NEC Corp. Patentee after: NEC electronics Kabushiki Kaisha Address before: Osaka Japan Patentee before: Sanyo Electric Co.,Ltd. Patentee before: Rohm Co.,Ltd. Patentee before: NEC Corp. Patentee before: Renesas Technology Corp. |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20151224 Address after: Osaka Japan Patentee after: Sanyo Electric Co.,Ltd. Patentee after: Renesas Electronics Corp. Address before: Osaka Japan Patentee before: Sanyo Electric Co.,Ltd. Patentee before: Rohm Co.,Ltd. Patentee before: NEC Corp. Patentee before: Renesas Electronics Corp. |