CN1233205C - 电路装置的制造方法 - Google Patents
电路装置的制造方法 Download PDFInfo
- Publication number
- CN1233205C CN1233205C CNB021261245A CN02126124A CN1233205C CN 1233205 C CN1233205 C CN 1233205C CN B021261245 A CNB021261245 A CN B021261245A CN 02126124 A CN02126124 A CN 02126124A CN 1233205 C CN1233205 C CN 1233205C
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- Prior art keywords
- mentioned
- circuit arrangement
- manufacture method
- conductive foil
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Abstract
一种具有以陶瓷基板、柔性薄片等作为支撑基板装配电路元件的电路装置。但是,使电路装置小型薄型化时,存在不能确立批生产的高效率制造的问题。在背面抗蚀剂被覆的工序中,采用对露出导电箔(60)背面的位置对合标志(101)进行位置识别的办法,间接地进行对每个组件或每个导电箔的背面导电图形进行位置识别,在导电图形(51)上除形成预定背面电极(91)的开口部(92)外形成抗蚀剂层(90)。从而能够实现缩短了时间的电路装置的制造方法。
Description
技术领域
本发明涉及一种电路装置的制造方法,特别是涉及不需要支撑基板的薄型电路装置的制造方法。
背景技术
过去,电子设备内配置的电路装置为了在移动电话、便携式计算机等中采用,而要求其小型、薄型、重量轻。
例如,作为电路装置以半导体器件为例来说明时,就一般的半导体器件来说,就有过去通常用传递模塑法密封的封装型半导体器件。该半导体器件如图18所示,被装配到印制电路板PS上。
并且该封装型半导体器件是用树脂层3被覆半导体芯片2的周围,从该树脂层3的侧面引出外部连接用的引线端子4。
然而,该封装型半导体器件1因从树脂层3向外引出引线端子4,使整个尺寸较大,而不能满足小型、薄型和重量轻的要求。
因此,各公司争先恐后要实现小型化、薄型和重量轻,并开发各式各样的构造,最近,在开发一种叫做CSP(电路片尺寸封装)的,与电路片尺寸同等的晶片规模CSP、或比电路片尺寸大一些尺寸的CSP。
图19是表示采用玻璃环氧树脂基板5作为支撑基板的和比电路片尺寸大一些的CSP6。在这里,对把晶体管芯片T装配到玻璃环氧树脂基板5上的CSP6进行说明。
在该玻璃环氧树脂基板5的表面上,形成第1电极7、第2电极8和小片焊盘9,背面上形成第1背面电极10和第2背面电极11。而且经过通孔TH将上述第1电极7和第1背面电极10、第2电极8和第2背面电极11电连接起来。并且在小片焊盘9上,固定上述裸露的晶体管芯片T,通过金属细丝12连接晶体管的发射极和第1电极7,通过金属细丝12连接晶体管基极和第2电极8。进而在玻璃环氧树脂基板5上设置树脂层13,使其覆盖晶体管芯片T。
上述CSP6采用玻璃环氧树脂基板5,然而与晶片规模CSP不同,从芯片T直到外部连接用的背面电极10、11的延伸构造很简单,并具有能够廉价制造的优点。
并且上述CSP6如图18所示,被装配在印制电路板PS上。在印制电路板PS上设置构成电气电路的电极、布线,并在印制电路板PS上进行电连接和固定上述CSP6、封装型半导体器件1、片状电阻CR或片状电容CC等。
然后把由该印制电路板构成的电路安装在各种装置之中。
接着,参照图20和图21说明该CSP的制造方法。
首先,准备玻璃环氧树脂基板5作为基材(支撑基板),在其双面上隔着绝缘性粘合剂压接铜箔20、21。(以上参照图20(A))
接着,在与第1电极7、第2电极8、小片焊盘9、第1背面电极10和第2背面电极11对应的铜箔20、21上,被覆耐蚀刻性的抗蚀剂22,把铜箔20、21制作成图形。另外,也可以正反面分别制作图形。(以上参照图20(B))
接着,利用钻孔器或激光器,在上述玻璃环氧树脂基板上形成用于通孔TH的孔。对该孔进行电镀形成通孔TH。借助于该通孔TH,将第1电极7与第1背面电极10、第2电极8与第2背面电极11电连接起来。(以上参照图20(C))
再者,附图上作了省略,然而对成为焊接点的第1电极7、第2电极8进行镀金(Au),同时对成为焊接点的小片焊盘9进行镀金,并小片焊接晶体管芯片T。
最后,通过金属细丝12连接晶体管芯片T的发射极与第1电极7、晶体管芯片T的基极与第2电极8,并用树脂层13被覆。(参照图20(D))
按照以上的制造方法,完成采用支撑基板5的CSP型电子元件。本制造方法,采用柔性板作为支撑基板也同样。
在图18中,晶体管芯片T、连接手段7~12和树脂层13在与外部的电连接、晶体管的保护方面,都是必要构成要素,然而就是因这些构成要素,才难以提供实现小型、薄型、重量轻的电路元件。
并且,支撑基板的玻璃环氧树脂基板5如上述一样,本来也是不需要的。但是制造方法上,为了粘合电极,而用作支撑基板,所以过去不能丢掉该玻璃环氧树脂基板5。
为此,由于采用该玻璃环氧树脂基板5,成本上升,进而因玻璃环氧树脂基板5较厚,从电路元件来说变厚,就制了小型、薄型、重量轻化。
而且,用玻璃环氧树脂基板或陶瓷基板连接双面电极的通孔形成工序必然不可缺少,因制造工序变长而存在不能面向批生产的问题。
鉴于以上的问题,本申请人在特愿2000-266736中,开发了一种不需要支撑基板的电路装置。但是,在被覆背面抗蚀剂的工序中,为了形成用于焊料电极的开口部而对各个搭载部位进行导电图形的位置识别,存在进行位置识别时花费时间的问题。
发明内容
本发明鉴于上述的许多课题而构成,其特征在于,包括:通过在导电箔的表面形成分离槽形成凸状的导电图形,同时,在与预定形成的位置对合标志对应的区域的上述导电箔上形成确定孔的工序;将电路元件与要求的上述导电图形电连接的工序;用绝缘性树脂进行模塑,以覆盖上述电路元件并充填上述分离槽及上述确定孔的工序;从背面除去上述导电箔直至充填于上述分离槽及上述确定孔中的上述绝缘性树脂露出的工序,以从上述确定孔露出于上述导电箔背面的上述绝缘性树脂的位置作为上述位置对合标志进行识别,识别上述导电图形的背面的位置。
本发明的电路装置的制造方法的特征在于,包括:
通过在导电箔的表面形成分离槽形成凸状的导电图形,同时,包围预定形成的位置对合标志,在所述导电箔的表面形成槽的工序;将电路元件与要求的上述导电图形电连接的工序;用绝缘性树脂进行模塑,以覆盖上述电路元件并充填上述分离槽及上述槽的工序;从背面除去上述导电箔直至充填于上述分离槽及上述槽中的上述绝缘性树脂露出的工序,以由上述槽包围并露出的上述导电箔作为位置对合标志进行识别,识别上述导电图形的背面的位置。
本发明的电路装置的制造方法的特征在于:利用上述位置对合标志间接地识别背面的上述导电图形的位置,在上述导电图形的露出面用抗蚀剂层被覆,但留下用于形成预定的背面电极的开口部。
本发明的电路装置的制造方法的特征在于:在上述抗蚀剂层的开口部上附着导电手段,形成背面电极。
本发明的电路装置的制造方法的特征在于:利用上述位置对合标志间接地识别背面的上述导电图形的位置,进行划片。
本发明的电路装置的制造方法的特征在于:利用上述位置对合标志间接地识别背面电极的位置,并测定上述电路元件的特性。
本发明的电路装置的制造方法的特征在于:上述导电箔是以铝或铁-镍中的任何一种作为主要材料构成。
本发明的电路装置的制造方法的特征在于:用导电薄膜至少部分地被覆上述导电箔的表面。
本发明的电路装置的制造方法的特征在于:上述导电薄膜是由电镀镍、金、银或钯形成的。
本发明的电路装置的制造方法的特征在于:上述导电箔通过蚀刻去除。
本发明的电路装置的制造方法的特征在于:上述电路元件包括有源元件或无源元件。
本发明的电路装置的制造方法的特征在于:由构成一个电路装置的多个上述图形形成搭载部,由矩阵状配置的上述搭载部形成组件,对每个上述组件形成上述位置对合标志。
本发明的电路装置的制造方法的特征在于:上述导电箔上间隔配置多个上述组件。
本发明的电路装置的制造方法的特征在于:上述绝缘性树脂通过同时对上述导电箔的全部上述组件进行传递模塑而形成。
本发明的电路装置的制造方法的特征在于:上述位置对合标志是在上述导电箔的上述组件外部,在上述导电箔背面露出的上述绝缘性树脂。
本发明的电路装置的制造方法的特征在于:上述位置对合标志设置在上述导电箔的周边。
本发明的电路装置的制造方法的特征在于:上述各组件的上述绝缘性树脂背面露出的上述导电图形的位置识别利用上述位置对合标志进行。
本发明的电路装置的制造方法的特征在于:上述导电箔全体的上述绝缘性树脂背面露出的上述导电图形的位置识别利用上述位置对合标志进行。
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图1是说明本发明制造流程的图。
图2是说明本发明电路装置的制造方法图。
图3是说明本发明电路装置的制造方法图。
图4是说明本发明电路装置的制造方法图。
图5是说明本发明电路装置的制造方法图。
图6是说明本发明电路装置的制造方法图。
图7是说明本发明电路装置的制造方法图。
图8是说明本发明电路装置的制造方法图。
图9是说明本发明电路装置的制造方法图。
图10是说明本发明电路装置的制造方法图。
图11是说明本发明电路装置的制造方法图。
图12是说明本发明电路装置的制造方法图。
图13是说明本发明电路装置的制造方法图。
图14是说明本发明电路装置的制造方法图。
图15是说明本发明电路装置的制造方法图。
图16是说明本发明电路装置的制造方法图。
图17是说明本发明电路装置的制造方法图。
图18是说明现有电路装置的装配构造图。
图19是说明现有电路装置的图。
图20是说明现有电路装置的制造方法的图。
图21是说明现有电路装置的制造流程图。
具体实施方式
首先,参照图1说明有关本发明电路装置的制造方法。
本发明包括:准备导电箔并在除了形成预定导电图形的区域和与形成预定的位置对合标志对应的区域的上述导电箔上形成比上述导电箔的厚度浅的隔离槽的工序;在要求的上述导电图形的上述各搭载部上固定电路元件的工序;对上述各搭载部的电路元件电极和要求的上述导电图形进行金属丝焊接的工序;汇总起来被覆各搭载部的上述电路元件,用绝缘性树脂共同模塑以使其充填上述隔离槽中的工序;除去背面全区域上述导电箔直至露出上述绝缘性树脂的工序;利用上述位置对合标志间接地识别背面的上述导电图形位置在上述导电图形上边留下用于形成预定背面电极的开口部并以抗蚀剂层被覆的工序;使钎料焊料粘附于上述抗蚀剂层的开口部并形成背面电极的工序;在粘附于粘着片上的状态进行上述组件的各搭载部的上述电路元件特性测定的工序;以及在粘附于上述粘着片的状态下对各个搭载部用划片法分离上述组件的上述绝缘性树脂的工序。
关于图1中所示的流程图,首先,在准备铜(Cu)箔的工序、进行镀银(Ag)的工序和进行半蚀法的工序等3个流程中,进行导电图形的形成。在装片和金属丝等2个工序中,进行电路元件往各搭载部上的粘附、电路元件电极与导电图形的连接。在传递模塑的工序中,进行用绝缘性树脂的共同模塑。所谓该共同模塑就是利用一个模槽,对设置多个搭载部的组件进行模塑的工序。在背面铜箔除去的工序中,进行蚀刻上述导电箔的背面,直到露出上述绝缘性树脂。在背面抗蚀剂的工序中,在露出了绝缘性树脂背面上的导电图形上形成抗蚀剂层。在背面电极形成的工序中,附着膏状的钎料焊料并加热熔融,形成导电图形的背面电极。在粘着片的工序中,将多个组件贴附到粘着片上。在测定的工序中,对装入各电路装置部的电路元件进行合格品判别或特性分类。在划片的工序中,用划片器从绝缘性树脂上分离出各个电路装置。
以下,参照图2~图17,说明本发明的各工序。
本发明的第1工序,如图2~图4所示,在于准备导电箔60,在除了形成多个至少电路元件52搭载部的导电图形51的区域和与位置对合标志对应的区域的导电箔60上,形成比导电箔60厚度浅的隔离槽61并形成每个组件的导电图形51。
本工序中,首先如图2(A),准备薄板状的导电箔60。该导电箔60,其材料选择应该考虑钎料焊料的粘合性、焊接性、电镀性,从材料来说,采用以铜为主要材料的导电箔、以铝为主要材料的导电箔或铁-镍等合金组成的导电箔等。
如果考虑以后的蚀刻,导电箔的厚度约10μm~300μm是理想的,这里采用125μm的铜箔。但是无论300μm以上,无论10μm以下基本上都是可以的。如以后所述,只要可以形成比导电箔60厚度要浅的隔离槽61就行。
另外,薄板状的导电箔60,也可以按规定的宽度,例如45mm卷成筒状备用,在后述的工序中加以传送,也可以剪切成规定大小的窄长方形的导电箔60备用,在后述的工序中进行传送。
具体点说,如图2(B)所示,在窄长方形的导电箔60上,断取4~6个排列形成多个搭载部的组件62。各组件62之间设置狭缝63。该狭缝具有吸收模塑工序等中因加热处理发生导电箔60的应力的作用。并且在导电箔60的上下边缘,以一定间隔设置标记孔64,用于各工序的定位。
接着,进行每个组件形成导电图形51的工序。
首先,如图3所示,在导电箔60上形成光抗蚀剂(耐蚀刻掩模)PR,并将光抗蚀剂P R制成图形,使其露出除变成导电图形51的区域以外的导电箔60。而且,如图4(A)所示,通过光抗蚀剂PR,有选择地蚀刻导电箔60。
用蚀刻法形成的隔离槽61深度,例如为50μm,其侧面因为变成粗糙面而提高了与绝缘性树脂50的粘接性。
并且,该隔离槽61的侧壁典型地以直线图解表示,但随除去方法而有不同构造。该除去工序可采用湿式蚀刻法、干式蚀刻法、用激光蒸发法、切割法。湿式蚀刻的场合,蚀刻剂主要采用氯化铁或氯化铜,将上述导电箔或浸渍到该蚀刻剂中,或用该蚀刻剂进行喷射。在这里,湿式蚀刻法,通常是非各向异性蚀刻,因而侧面成为弯曲构造。
另外,在图3中,也可以有选择地被覆对蚀刻液有抗蚀性的导电薄膜(图未示出),以代替光抗蚀剂。只要选择性附着于导电电路的部分,该导电薄膜就成为蚀刻保护膜,不用抗蚀剂也能蚀刻隔离槽。作为该导电薄膜,可以考虑的材料是Ag、Ni、Au、Pt或Pd等。但是这些抗蚀性的导电薄膜具有照样可用作小片焊盘、焊接焊盘的特征。
例如Ag薄膜既与Au焊接,也与钎料焊料焊接。因而芯片背面被覆Au薄膜的话,可以照样在导电图形51的Ag薄膜上热压焊芯片,并且通过焊锡等的钎料焊料就可以固定芯片。并且为了能够把Au细丝连接到Ag的导电薄膜上,金属丝焊接法也可以。因此,具有原封不动地把这些导电薄膜用作小片焊盘、焊接焊盘的优点。
图4(B)表示具体的导电图形51。本图对应于放大图2(B)中所示一个组件62的图。涂黑部分的一个是一个搭载部65,并构成导电图形51,就一个组件62而言,将多个搭载部65排列成5行10列的矩阵状,每个搭载部65上设置同样的导电图形51。在各组件的周边设置框状的图形66,与框状的图形66少许隔开,在该图形66内侧设置划片时的位置对合标志67。框状图形66是用作与模具,特别是上模的对接部分。
并且,如图4(B)所示,标志孔64附近,设有背面抗蚀剂被覆时使用的位置识别用的确定孔100。
图4(C)是在图4(B)的A-A线的剖面图,确定孔100在形成隔离槽61的同时设置,大约具有相同的深度,在背面被覆的工序中间接地用于背面的导电图形的位置识别。
本发明的第2工序如图5所示,在于在所要的导电图形51的各搭载部上固定电路元件52,形成电连接各搭载部65的电路元件52电极与所要导电图形51的连接手段。
作为电路元件52是晶体管、二极管、IC芯片等半导体器件、片状电容、片状电阻等的无源元件。并且倒装的半导体器件、进而也可以装配CSP、BGA等封装处理后的半导体元件。
这里,将裸露的晶体管芯片52A装到导电图形51A上,通过用球焊法或超声波楔焊法等粘附的金属细丝55A,把发射极与导电图形51B、基极与导电图形51B连接起来。并且52B是片状电容或无源元件,用焊锡等的钎料焊料或导电膏55B进行粘附。
本工序中,各组件62内集成了多个导电图形51,因而有极其有效地进行电路元件52的粘附和丝焊的优点。
本发明的第3工序如图6所示,在于汇总起来被覆各搭载部63的电路元件52,并以绝缘性树脂50共同模塑使其充填到隔离槽61内。
本工序中,如图6(A)所示,绝缘性树脂50完全被覆电路元件52A、52B和多个导电图形51A、51B、51C,并与在导电图形51间的隔离槽61内充填了绝缘性树脂50的导电图形51A、51B、51C侧面的弯曲构造嵌合而坚固结合。而且借助于绝缘性树脂50,支撑导电图形51。
并且本工序可采用传递模塑法、注入模塑法或浸渍法来实现。作为树脂材料,环氧树脂等的热硬化性树脂可用传递模塑法来实现,聚酰亚胺树脂、聚苯硫醚等的热可塑性树脂可用注入模塑法来实现。
再者,本工序中,进行传递模塑或注入模塑的时候,如图6(B)所示,用模具的一个模槽,对每个组件以一种绝缘性树脂50共同进行模塑。因此,各组件62用一个模具一次进行模塑,形成由框状图形66对接的上模槽和由导电图形密封区域。因此,如现有的传递模塑法等的一样,与分别对各个搭载部进行模塑的方法比较,流道数少,因而达到大幅度削减树脂量。
而且,本工序中,模具不是对各个搭载部进行模塑,而是对组件共同进行模塑,因而与制成的电路元件的种类或大小无关而共同使用模具。
导电箔60表面被覆的绝缘性树脂50厚度要调整到使其距电路元件52的金属细丝55A最顶部约100μm左右。这个厚度,考虑到强度既可以加厚,也可以减薄。
本工序的特征是,在被覆绝缘性树脂50之前,一直将导电图形51的导电箔60作为支撑基板。现有技术中,如图19的那样采用本来不需要的支撑基板5形成导电线路,然而本发明中,将变成支撑基板的导电箔60作为电极材料是必须的材料。因此,具有极其节省构成材料完成作业的优点,也能实现降低成本。
并且,由于形成的隔离槽61比导电箔厚度要浅,导电箔60作为导电图形51并没有一个一个地分离。因此作为片状的导电箔60整体进行处理,模塑绝缘性树脂50时,向金属模传送、向金属模的装配作业具有非常轻松的特点。
并且,本工序中,汇总起来进行多个电路元件的模塑,而且重要的一点也是,不会发生分别对电路元件进行模塑时发生的树脂毛刺。
并且图6(C)是图6(B)A-A线上的剖面图,本工序中10确定孔100也被模塑,并充填绝缘性树脂50。
本发明的第4工序如图7(A)、(B)所示,除去导电箔60的背面全部区域直至绝缘性树脂露出。
本工序是用化学的和/或物理的方法除去背面全部导电箔60,并作为导电图形51进行分离。本工序采用研磨、抛光、蚀刻、激光蒸发金属等方法加以实施。
就实验而言,对导电箔60进行全面干式蚀刻,从隔离槽61露出绝缘性树脂50。其结果,分开成约40μm厚度的导电图形51。
并且,如图7(B)所示,本工序中,确定孔100内充填的绝缘性树脂50也变成在背面露出的构造,并在背面抗蚀剂被覆的工序中,作为位置对合标志101间接地进行背面导电图形51的位置识别。
本发明的第5工序,如图8到图11所示,在于给导电箔60的绝缘性树脂50背面上露出的导电图形51上边被覆抗蚀剂层90,形成开口部92,使预定的背面电极露出来。
另外,图8(A)中,为了示出背面抗蚀剂开口部92与导电图形51的关系,涂黑的部分表示导电图形51,空白圆圈表示背面抗蚀剂开口部92。但是,实际上,除背面抗蚀剂开口部92以外的组件62背面都用抗蚀剂层90覆盖起来。
本工序中,如图8(A)所示,利用位置对合标志101间接地进行背面上露出导电图形51的位置识别,在导电图形51上留下形成预定背面电极56的开口部92,并用抗蚀剂层90被覆。
在这里,作为识别背面露出导电图形的标志,也可以考虑采用标志孔64。但是,因在背面铜箔除去的工序中蚀刻导电箔60的整个背面,而标志孔64内壁也被蚀刻,使其直径或位置发生误差。所以,标志孔64不可能用于背面上露出导电箔的位置识别。因此,本发明中采用在导电箔背面边缘部分上露出来的绝缘性树脂101作为位置对合标志。
位置对合标志101是充填到用与搭载部65的隔离槽61相同办法形成的确定孔100内的绝缘性树脂,并在背面铜箔除去的工序中,如图8(B)所示,使其在背面上露出来。本工序中,位置对合标志101为圆形,然而只要是位置识别用摄象机能够识别的形状,圆形以外的形状也行。
具体地说,最初在导电箔60上各组件62的整个背面上,用丝网印刷、滚涂器或静电涂布机,进行抗蚀剂层90的被覆。故此,导电图形51由抗蚀剂层90完全覆盖,而且还因抗蚀剂层90不透明,而难以直接地对导电图形51进行位置识别。
接着,进行导电图形51的位置识别。如图8(A)所示,位置对合标志101是在没有形成导电图形51的导电箔60边缘剩余部分的背面上露出来的,因而如图8(B)所示,不进行用抗蚀剂层90被覆。并且,作为位置对合标志101材料的绝缘性树脂与导电箔60的材料铜,因为光的反射率大不相同,所以能够清楚地区别位置对合标志101的轮廓。进而,导电箔60与陶瓷基板等相比较,尺寸精度较高。所以,通过准确识别位置对合标志101的位置,就能够间接地识别每个组件或每个导电箔的导电图形51的位置。
接着,如图9(A)所示,残留在形成预定背面电极56的开口部92上形成抗蚀剂102。如图9(B)所示,利用光抗蚀剂102,通过选择性地蚀刻所被覆的抗蚀剂层90,形成开口部92。该抗蚀剂层90保护导电图形51免遭氧化或污染,同时决定所形成的背面电极56大小。
并且,当抗蚀剂层90的材料是感光性材料时,就不需要光抗蚀剂102。
根据以上,本工序中可以一次位置识别,连续进行每个组件或每个导电箔的背面抗蚀剂被覆,因而缩短了形成背面抗蚀剂的时间。
在上述本工序的说明中,利用导电箔上组件外侧背面露出的绝缘性树脂101作为位置对合标志,对背面露出的导电图形进行位置识别。然而,如图10所示,又有利用组件内部未设置导电图形的绝缘性树脂背面上露出的导电箔110作为位置对合标志的方法。
进而,如图11所示,还有利用组件内部未设置导电图形的绝缘性树脂背面露出的导电箔111内部露出的导电箔112作为位置对合标志的方法。
另外,本发明中,为了形成焊料电极用的开口部而利用位置对合标志对背面上露出的导电图形进行位置识别。但是,在组件内部设置位置对合标志的场合,以此在后工序中对导电箔或焊料电极进行间接的位置识别。例如,在测定工序中,利用位置对合标志对组件62内全部背面电极进行位置识别以后,就可以进行测定。进而,在划片的工序中,利用位置对合标志对组件62内全部背面电极56进行位置识别以后,就可以进行划片。
本发明的第6工序如图12(A)、(B)所示,是在包括开口部92的该边缘抗蚀剂层90上用丝网印刷法附着同样相同大小膏状钎料焊料91。
本工序中,就膏状的钎料焊料来说,使用有机溶剂混合焊料粒子的焊膏。如图12(A)所示,膏状的钎料焊料91被附着得比开口部92要大,因而作业上能很好地附着于每个组件62上全部的搭载部65开口部92。
进而,在本工序中,如图12(B)所示,使各组件通过氮气流过的加热炉,加热熔融膏状的钎料焊料91形成背面电极56。背面电极56是预先附着与相同大小的开口部92同样大小的膏状钎料焊料91,因而全部形成均一的大小。
因此,后述的划片工序以后,获得图14示出的最终构造。本发明的电路装置53没有如图18所示的现有背面电极10、11那样设置高低差,所以安装时,具有受焊料表面张力照样水平移动,能够自调整的特征。
并且本工序中,如图13所示,借助于具有开口部的位置识别用抗蚀剂121A、121B,间接地进行背面抗蚀剂开口部的位置识别。
具体点说,最初在背面抗蚀剂被覆的工序,在导电箔背面的组件外部设置具有开口部122A、122B位置识别用抗蚀剂121A、121B。
其次,用位置识别用的摄象机,对位置识别用抗蚀剂121A、121B的开口部122A、122B进行识别,并固定导电箔60。
最后,在与抗蚀剂开口部122A、122B相同位置,采用具有开口部的焊料印刷金属网(图未示出)进行焊料印刷。
从进行位置识别的2个抗蚀剂121A、121B到导电箔60中心线130的距离d1、d2不同。所以,上述工序中颠倒固定引线架时,在远离要求位置的场所就成为进行焊料印刷的场所,所以很容易进行本工序的不良判断。
另外,本工序的说明中,位置识别用的抗蚀剂虽然设置在导电箔60纵向的两端附近,但是将位置识别用的抗蚀剂设置在横向的端部附近也行。
根据以上所述,进行利用位置识别用抗蚀剂的焊料印刷。
本发明的第7工序,如图15所示,在于给粘着片80上粘附多个组件62的绝缘性树脂。
完成导电箔60的背面蚀刻后,从导电箔60切断各组件62。使该组件62仅以绝缘性树脂50与导电箔60的残余部分连结着,因而不用剪切模具,通过机械上剥离导电箔60的残余部分就能达到。
本工序中,将粘着片80的边缘粘附在不锈钢制造的环状金属框81上,并在粘着片80的中央部分,设置划片时的刀片不会相碰的间隔,并接触绝缘性树脂50粘附4个组件62。采用UV片作为粘着片80,而各组件62都用绝缘性树脂50有机械强度,所以也可以使用廉价的划片薄板。
本发明的第8工序,如图16所示,是在粘着片80上粘附的状态下,用绝缘性树脂50汇总起来模塑后的各组件62进行各搭载部65的电路元件52特性测定。
在各组件62的背面,露出如图16所示导电图形51的背面电极56,各搭载部65与导电图形51形成时完全一样,排列成矩阵状。使该导电图形51从绝缘性树脂50露出的背面电极56接触探针68,分别测定各搭载部65上电路元件52的特性参数等,并进行合格不合格的判断,对于不合格品用磁性墨水等打上标记。
另外,图16中,为了示出背面电极56与导电图形51的关系,涂黑部分表示导电图形51,空白圆圈表示背面电极56,但实际上除导电图形51的开口部92外都用抗蚀剂层90覆盖着。
本工序中,各搭载部65的电路装置53是以绝缘性树脂50整体支撑每个组件62,因此不会一个个被切断成七零八落。所以,在测试仪的装载台上用真空吸附粘附于粘着片80的多个组件62,通过对每个组件62只按搭载部65的尺寸分开如箭头那样,在纵向和横向作俯仰移动,可以快而大量地对组件62的各搭载部65电路装置53进行测定。即,过去需要的电路装置背面的判别、电极位置的识别等就可以不再需要,而且同时处理多个组件62,达到大幅度缩短测定时间。
另外,本工序中,虽然在进行划片分离成一个个电路装置之前进行测定,但本发明中即使划片也是在电路装置粘附于薄板上的状态下进行的,因此也可以进行划片以后进行测定特性。
本发明的第9工序,如图17所示,是在粘着片80上粘附的状态下,用划片法,把组件62的绝缘性树脂50分离成各个搭载部65。
本工序中,在划片装置的装载台,用真空吸附粘着片80上粘附的多个组件62,用划片板69沿各搭载部65间的切划线70,切割隔离槽61的绝缘性树脂50,分离成一个个电路装置53。
本工序中,划片刀69完全切断绝缘性树脂50,达到粘着片的表面的切削深度进行划片,并完全分离成各个搭载部65。划片时,预先识别上述的第1工序中设置的各组件周边框状图形66内侧的位置对合标志67,以此为基准进行划片。作为公知技术,划片在纵向进行全部划片以后,使装载台旋转90度进行横向的划片。
并且本工序中,划线70内只有充填隔离槽61的绝缘性树脂50和抗蚀剂层90,因而具有划片刀69的磨耗少,也不发生金属毛刺并能够划片成极其正确外形的特点。
进而即使本工序后,划片后也因粘着片80的作用而不会把个别的电路装置成了七零八落,在随后的传送(taping)工序也能高效率作业。即,粘着片80上整体支撑的电路装置只能识别合格品,用吸附套爪使其脱离粘着片80并收纳到传送带的接纳孔上。因此就是微小的电路装置,传送前也没有被切断成七零八落。
本发明中,使导电图形材料的导电箔本身起支撑基板功能,在形成隔离槽时或电路元件装配、绝缘性树脂被覆时都用导电箔支撑全体组件,并且在分离导电箔作为各导电图形时,使绝缘性树脂起支撑基板功能。因此,能够在电路元件、导电箔、绝缘性树脂的最小需要限度内制造电路装置。现有例子中正如说过的一样,虽然在构成原来电路装置的方面不需要支撑基板,成本上也能廉价。并且采用不要支撑基板、将导电图形埋入绝缘性树脂、进而可以调整绝缘性树脂和导电箔的厚度的办法,也具有能够形成非常薄的电路装置的优点。
并且本发明中,在背面铜箔除去的工序,标志孔受蚀刻,因而标志孔的尺寸或位置的精度降低;在背面抗蚀剂被覆的工序,难以利用标志孔作为位置对合标志。因此本发明中,在半蚀法的工序,形成确定孔,在模塑工序,使绝缘性树脂填入确定孔内,在背面铜箔除去工序,采用铜箔背面上露出的绝缘性树脂作为位置对合标志。所以,能够在规定位置按规定的尺寸形成位置对合标志。
据此,本发明中,在背面抗蚀剂被覆的工序,采用对上述的位置对合标志进行位置识别的办法,间接地对每个组件或每个导电箔进行背面上露出的导电图形的位置识别。并且,通过一次位置识别,就可以为每个组件或每个导电箔,在导电图形上留下形成预定背面电极的开口部并形成抗蚀剂层。所以,能够实现缩短了时间的制造方法。
并且,作为位置对合标志,在组件内部,又有利用绝缘性树脂背面上露出导电箔的方法。进而,作为位置对合标志,在组件内部,还有利用绝缘性树脂背面上力气出的导电箔内部露出的绝缘性树脂的方法,用这两种方法,也能获得与上述的效果相同效果。
Claims (18)
1、一种电路装置的制造方法,其特征在于,包括:
通过在导电箔的表面形成分离槽形成凸状的导电图形,同时,在与预定形成的位置对合标志对应的区域的上述导电箔上形成确定孔的工序;将电路元件与要求的上述导电图形电连接的工序;用绝缘性树脂进行模塑,以覆盖上述电路元件并充填上述分离槽及上述确定孔的工序;从背面除去上述导电箔直至充填于上述分离槽及上述确定孔中的上述绝缘性树脂露出的工序,以从上述确定孔露出于上述导电箔背面的上述绝缘性树脂的位置作为上述位置对合标志进行识别,识别上述导电图形的背面的位置。
2、一种电路装置的制造方法,其特征在于,包括:
通过在导电箔的表面形成分离槽形成凸状的导电图形,同时,包围预定形成的位置对合标志,在所述导电箔的表面形成槽的工序;将电路元件与要求的上述导电图形电连接的工序;用绝缘性树脂进行模塑,以覆盖上述电路元件并充填上述分离槽及上述槽的工序;从背面除去上述导电箔直至充填于上述分离槽及上述槽中的上述绝缘性树脂露出的工序,以由上述槽包围并露出的上述导电箔作为位置对合标志进行识别,识别上述导电图形的背面的位置。
3、根据权利要求1或2所述的电路装置的制造方法,其特征在于:利用上述位置对合标志间接地识别背面的上述导电图形的位置,在上述导电图形的露出面用抗蚀剂层被覆,但留下用于形成预定的背面电极的开口部。
4、根据权利要求3所述的电路装置的制造方法,其特征在于:在上述抗蚀剂层的开口部上附着导电手段,形成背面电极。
5、根据权利要求1或2所述的电路装置的制造方法,其特征在于:利用上述位置对合标志间接地识别背面的上述导电图形的位置,进行划片。
6、根据权利要求4所述的电路装置的制造方法,其特征在于:利用上述位置对合标志间接地识别背面电极的位置,并测定上述电路元件的特性。
7、根据权利要求1或2所述的电路装置的制造方法,其特征在于:上述导电箔是以铝或铁-镍中的任何一种作为主要材料构成。
8、根据权利要求1或2所述的电路装置的制造方法,其特征在于:用导电薄膜至少部分地被覆上述导电箔的表面。
9、根据权利要求8所述的电路装置的制造方法,其特征在于:上述导电薄膜是由电镀镍、金、银或钯形成的。
10、根据权利要求1或2所述的电路装置的制造方法,其特征在于:上述导电箔通过蚀刻去除。
11、根据权利要求1或2所述的电路装置的制造方法,其特征在于:上述电路元件包括有源元件或无源元件。
12、根据权利要求1或2所述的电路装置的制造方法,其特征在于:由构成一个电路装置的多个上述图形形成搭载部,由矩阵状配置的上述搭载部形成组件,对每个上述组件形成上述位置对合标志。
13、根据权利要求12所述的电路装置的制造方法,其特征在于:上述导电箔上间隔配置多个上述组件。
14、根据权利要求12所述的电路装置的制造方法,其特征在于:上述绝缘性树脂通过同时对上述导电箔的全部上述组件进行传递模塑而形成。
15、根据权利要求12所述的电路装置的制造方法,其特征在于:上述位置对合标志是在上述导电箔的上述组件外部,在上述导电箔背面露出的上述绝缘性树脂。
16、根据权利要求1或2所述的电路装置的制造方法,其特征在于:上述位置对合标志设置在上述导电箔的周边。
17、根据权利要求12所述的电路装置的制造方法,其特征在于:各上述组件的上述绝缘性树脂背面露出的上述导电图形的位置识别利用上述位置对合标志进行。
18、根据权利要求1或2所述的电路装置的制造方法,其特征在于:上述导电箔全体的上述绝缘性树脂背面露出的上述导电图形的位置识别利用上述位置对合标志进行。
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- 2002-07-17 CN CNB021261245A patent/CN1233205C/zh not_active Expired - Fee Related
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Publication number | Publication date |
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JP2003031729A (ja) | 2003-01-31 |
JP4761662B2 (ja) | 2011-08-31 |
KR20030007212A (ko) | 2003-01-23 |
CN1398153A (zh) | 2003-02-19 |
TW538660B (en) | 2003-06-21 |
KR100715749B1 (ko) | 2007-05-08 |
US6955942B2 (en) | 2005-10-18 |
US20030017645A1 (en) | 2003-01-23 |
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