CN1258954C - 电路器件的制造方法 - Google Patents

电路器件的制造方法 Download PDF

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Publication number
CN1258954C
CN1258954C CNB011375930A CN01137593A CN1258954C CN 1258954 C CN1258954 C CN 1258954C CN B011375930 A CNB011375930 A CN B011375930A CN 01137593 A CN01137593 A CN 01137593A CN 1258954 C CN1258954 C CN 1258954C
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mentioned
conductive pattern
manufacture method
circuit
loading part
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CN1377215A (zh
Inventor
坂本则明
小林义幸
阪本纯次
冈田幸夫
五十岚优助
前原荣寿
高桥幸嗣
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Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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Abstract

本发明的课题是以陶瓷基板、柔性薄片等作为支撑基板安装电路元件的电路器件。但是存在这些支撑基板的厚度构成了电路器件小型、薄型化的障碍的问题。利用分离槽61，在导电箔60上形成每一区块的导电图形51之后，由于在导电图形51上有选择地配置了电镀层81，所以可以实现能稳定地进行电路元件52的小片键合，并且能稳定地进行引线键合的节省资源的、适于批量生产的电路器件的制造方法。

Description

电路器件的制造方法
[发明的详细说明]
[发明所属的技术领域]
本发明涉及电路器件的制造方法，特别是不用支撑基板的薄型电路器件的制造方法。
[现有技术]
以前，在电子装置中安装的电路器件，因被移动电话、便携式计算机等采用，所以正谋求小型化、薄型化、轻型化。
例如，作为电路器件，若以半导体器件为例进行说明，则作为一般的半导体器件，以前通常是用压铸密封的封装型半导体器件。这种半导体器件，如图11所示，被安装在印刷基板PS上。
另外，该封装型半导体器件是用树脂层3覆盖半导体芯片2的周围，从该树脂层3的侧面引出与外部连接用的引线端点4的器件。
但是，该封装型半导体器件1，其引线端点4从树脂层3引出至外部，因而其整体尺寸大，不满足小型化、薄型化和轻型化的要求。
因此，各公司竞相开发可能实现小型化、薄型化和轻型化的形形色色的结构，最近，正在开发称为CSP(芯片大小封装)的、与芯片大小相同的晶片尺度的CSP，或者其大小比芯片尺寸略大的CSP。
图12示出了采用玻璃环氧树脂基板5作为支撑基板的比芯片尺寸略大的CSP6。这里，对在玻璃环氧树脂基板5上安装晶体管芯片T的情形进行说明。
在该玻璃环氧树脂基板5的表面，形成第1电极7、第2电极8和小片焊区9，在背面形成第1背面电极10和第2背面电极11。然后，上述第1电极7和第1背面电极10，第2电极8和第2背面电极11经通孔TH进行电连接。另外，上述配对晶体管T贴附在小片焊区9上，晶体管的发射极和第1电极7经金属细线12相连接，晶体管的基极和第2电极8经金属细线12相连接。进而，在玻璃环氧树脂基板5上敷设树脂层13，以覆盖晶体管芯片T。
上述CPS6虽然采用了玻璃环氧树脂基板5，但与晶片尺度CSP不同，它呈从芯片T到外部连接用的背面电极10、11的延展结构，具有结构简单、可廉价制造的优点。
另外，如图11所示，上述CPS6被安装在印刷基板PS上。在印刷基板PS上，设置构成电路的电极、布线，并电连接和贴附上述CSP6、封装型半导体器件1、芯片电阻器CR或芯片电容器CC等。
然后，将用这样的印刷基板构成的电路安装在各色各样的装置中。
下面参照图13和图14对该CSP的制造方法进行说明。
首先，准备玻璃环氧树脂基板5作为基础构件(支撑基板)，在它的两面经绝缘性粘接剂压接上Cu箔20、21。(以上参照图13A。)
接着，在对应于第1电极7、第2电极8、小片焊区9、第1背面电极10和第2背面电极11的Cu箔20、21处覆盖耐刻蚀的抗蚀剂22，对Cu箔20、21制作图形。而且，构制图形最好是正反面分别进行。(以上参照图13B。)
接着，利用钻头或激光在上述玻璃环氧树脂基板上形成用于通孔TH的孔，对该孔进行镀覆，形成通孔TH。借助于该通孔TH，第1电极7和第1背面电极10，第2电极8和第2背面电极11进行电连接。(以上参照图13C。)
进而，在形成键合接线柱的第1电极7、第2电极8上镀Au，同时也在形成小片键合接线柱的小片焊区9上镀Au和对晶体管芯片T进行小片键合，这些在附图中均从略。
最后，使晶体管芯片T的发射极和第1电极7，晶体管芯片T的基极和第2电极8，经金属细线12相连接，并用树脂层13覆盖住。(以上参照图13D。)
按照以上的制造方法，就制成了采用支撑基板5的CSP型电气元件。即使采用柔性薄片作支撑基板，其制造方法也是一样。
另一方面，图14的流程示出了采用陶瓷基板的制造方法。准备好作为支撑基板的陶瓷基板后，形成通孔，然后用导电膏印刷表面和背面电极并烧结。此后，直到上述制造方法中的覆盖树脂层，都与图13的制造方法相同，但是，陶瓷基板极易碎，因此，与柔性薄片或玻璃环氧树脂基板不同，因为会立即破碎，所以有不能使用金属模具进行浇注的问题。因此，在浇注并固化密封树脂后，要进行研磨，使密封树脂平坦，最后，使用切割装置进行单片分离。
[发明所要解决的课题]
在图12上，晶体管芯片T、连接电极7～12以及树脂层13，在进行与外部的电连接和晶体管的保护方面，是必要的构成要素，但凭借仅此构成要素，还难以提供实现小型化、薄型化、轻型化的电路元件。
另外，如前所述，构成支撑基板的玻璃环氧树脂基板5本来是不必要的。但是，在制造方法上，为将电极贴合，采用它作为支撑基板，因此，该玻璃环氧树脂基板5是不能不要的。
因此，由于采用了该玻璃环氧树脂基板5，使成本提高，进而，因玻璃环氧树脂基板5厚，使电路元件变厚，对小型化、薄型化、轻型化造成限制。
进而，在用玻璃环氧树脂基板或陶瓷基板时，连接两面的电极的通孔形成工序一定是不可缺少的，因此还存在制造流程长的问题。
[解决课题的手段]
本发明鉴于以上述诸课题，其特征在于，包括：准备导电箔，在至少形成有多个电路元件的装载部的除导电图形以外区域的上述导电箔上，形成比上述导电箔的厚度浅的分离槽，以形成导电图形的工序；用抗蚀剂层覆盖上述导电图形和上述分离槽表面，在上述导电图形的所希望的区域形成电镀层的工序；在所希望的上述导电图形的上述各装载部的上述电镀层上贴附电路元件的工序；用绝缘树脂整体浇注，将各装载部的上述电路元件一并覆盖，使上述分离槽被充填的工序；除去未设置上述分离槽的厚度部分的上述导电箔的工序；以及用切割方法将上述绝缘树脂分离成各单个装载部的工序。
在本发明中，形成导电图形的导电箔是初始材料，直到进行绝缘树脂浇注，导电箔都起支撑作用，浇注之后，由于绝缘树脂有支撑功能，所以能够不要支撑基板，可解决现有的课题。
另外，在本发明中，由于在形成分离槽之后，在导电图形的所希望区域有选择地形成电镀层，并在电镀层上进行电路元件的小片键合，所以可以实现电路元件和导电图形的良好接触，而且通过对每一个区块进行处理，能批量生产多个电路器件，能够解决现有的课题。
[附图的简单说明]
图1是本发明的制造流程说明图。
图2是本发明的电路器件的制造方法说明图。
图3是本发明的电路器件的制造方法说明图。
图4是本发明的电路器件的制造方法说明图。
图5是本发明的电路器件的制造方法说明图。
图6是本发明的电路器件的制造方法说明图。
图7是本发明的电路器件的制造方法说明图。
图8是本发明的电路器件的制造方法说明图。
图9是本发明的电路器件的制造方法说明图。
图10是本发明的电路器件的制造方法说明图。
图11是现有的电路器件的安装结构说明图。
图12是现有的电路器件说明图。
图13是现有的电路器件制造方法说明图。
图14是现有的电路器件制造方法说明图。
[发明的实施例]
首先，参照图1对本发明的电路器件的制造方法进行说明。
本发明由如下工序构成：准备导电箔，在至少形成有多个电路元件的装载部的除导电图形以外区域的上述导电箔上，形成比上述导电箔的厚度浅的分离槽，以形成导电图形的工序；用抗蚀剂层覆盖上述导电图形和上述分离槽表面，在上述导电图形的所希望的区域形成电镀层的工序；在所希望的上述导电图形的上述各装载部的上述电镀层上贴附电路元件的工序；形成将上述各装载部的电路元件的电极与所希望的上述导电图形进行电连接的连接电极的工序；用绝缘树脂整体浇注，将各装载部的上述电路元件一并覆盖，使上述分离槽被充填的工序；除去未设置上述分离槽的厚度部分的上述导电箔的工序；以及用切割方法将上述绝缘树脂分离成各单个装载部的工序。
图1所示流程与上述工序不太一致，通过Cu箔、镀Ag、半刻蚀这3道工序形成导电图形。通过电镀工序对部分导电图形形成电镀层。通过小片键合和引线键合这2道工序，使电路元件向各装载部贴附以及电路元件的电极经电镀层与导电图形连接。通过压铸的工序进行绝缘树脂的整体浇注。通过除去背面Cu箔的工序对无分离槽的厚度部分的导电箔进行刻蚀。通过背面处理工序对露出于背面的导电图形的电极进行处理。通过测量工序对组装到各装置部上的电路元件进行合格品鉴别和特性分类。通过切割工序用切割法从绝缘树脂上进行单个电路元件的分离。
以下参照图2～图10对本发明的各工序进行说明。
本发明的第1工序，如图2至图4所示，是准备导电箔60，在至少形成有多个电路元件52的装载部的除导电图形51以外的区域的导电箔60上，形成比导电箔60的厚度浅的分离槽61，以形成导电图形51。
在本工序中，首先，准备如图2A的薄片状导电箔60。在考虑到焊料的附着性能、键合性能、电镀性能的情况下选择该导电箔60的材料，可采用以Cu为主材料的导电箔、以Al为主材料的导电箔或者由Fe-Ni等合金构成的导电箔等作为材料。
考虑到以后的刻蚀，导电箔的厚度以10μm～300μm左右为宜，这里采用了70μm(2盎司)的铜箔。但是，在10μm以上或300μm以下基本上是可以的。如后所述，只要能形成比导电箔60的厚度浅的分离槽61即可。
另外，薄片状的导电箔60以一定的宽度，例如45mm，卷成卷准备着，这有利于在后述各工序中的传送，也可以准备切成一定大小的长条状导电箔60，在后述各工序中传送。
具体地说，如图2B所示，在长条状导电箔60上，排列4～5个分离的、其上形成多个装载部的区块62。在各区块62之间设置窄缝63，以吸收由浇注工序中的加热处理所产生的导电箔60的应力。另外，在导电箔60的上下边缘以设定的间隔设置指示孔64，用以在各工序中定位。
接着，形成导电图形。
首先，如图3所示，在Cu箔60上形成光致抗蚀剂(抗刻蚀掩模)PR，对光致抗蚀剂PR构建图形，使得除构成导电图形51的区域的导电箔60露出。然后，如图4A所示，经光致抗蚀剂PR有选择地刻蚀导电箔60。
通过刻蚀形成的分离槽61的深度例如为50μm，由于其侧面为粗糙面，所以与绝缘树脂50的粘结性被提高了。
另外，该分离槽61的侧壁，虽然在图上原理性地示以直线，但它具有因除去方法而异的结构。该除去工序可采用湿法刻蚀、干法刻蚀、激光蒸发或切割法。在湿法刻蚀的场合，刻蚀剂主要采用氯化铁或氯化铜，上述导电箔或浸渍在该刻蚀剂中，或用该刻蚀剂进行喷淋。这里，由于湿法刻蚀通常是一种非各向异性刻蚀，所以侧面形成弯曲结构。
另外，在干刻蚀的场合，各向异性地、非各向异性地进行刻蚀都是可能的。现在，虽然说用反应性离子刻蚀除去Cu是不可能的，但可以用溅射法除去。另外，依据溅射条件可进行各向异性刻蚀或非各向异性刻蚀。
另外，可利用激光，直接照射激光能够形成分离槽61，这时，无论如何，分离槽61的侧面都形成笔直状。
在图4B中，示出了具体的导电图形51。该图对应于图2B所示的区块62之一的放大图。一片涂黑的部分是一个装载部65，它构成导电图形51，在一个区块62中排列了呈5行10列矩阵状的多个装载部65，对每个装载部65设置了相同的导电图形。在各区块的周围，设置框状图形66，在与其稍稍分离的它的内侧，设置了用于切割时的对位标记67。框状图形66用于与浇注模具的配合，另外，它还具有在导电箔60的背面被刻蚀后，增强绝缘树脂50的功能。
本发明的第2工序，如图5所示，是用抗蚀剂层80覆盖导电图形51和分离槽61的表面，在导电图形51的所希望区域形成电镀层81。
在本工序中，先除去形成分离槽61时使用的光致抗蚀剂PR，在清洗导电图形51和分离槽61表面后，用电镀法在整个面上附着抗蚀剂层80。
其次，通过曝光、显影，除去导电图形51上贴附电路元件52的小片焊区和键合焊区上的抗蚀剂层80，有选择地使导电图形51露出。然后通过电解电镀在那里形成电镀层81。因此，电镀层81常常以比导电图形51小的形状形成，这对以后的工序中的图形识别起重要作用，
可考虑用作该电镀层81的材料有Ag、Ni、Au、Pt或Pd等。这些材料具有原样用作小片焊区、键合焊区的特征。在制造上最合适的材料是Ag、Au，而以Ag的价格为廉。
例如，Ag镀层能同Au结合，也能同焊料结合。因此，如果在芯片的背面覆盖Au膜，就能直接将芯片热压焊到导电图形51上的Ag镀层上，另外，也能经焊锡等焊料贴附芯片。还有，能在Ag镀层上焊接Au细线，所以也可以进行引线键合。因此，它具有能将电镀层直接用作小片焊区、键合焊区的优点。
本发明的第3工序，如图6所示，是在各装载部65的所希望的导电图形51的电镀层81上贴附电路元件52，和形成将各装载部65的电路元件52的电极与所希望的导电图形51的电镀层81电连接的连接电极。
电路元件52是晶体管、二极管、IC芯片等半导体器件以及芯片电容器、芯片电阻器等无源元件。另外，也可以安装CSP、BGA等倒装半导体器件，不过这时厚度要厚些。
这里，配对晶体管芯片52A被小片键合到导电图形51A的电镀层81上，发射极和导电图形51B的电镀层81，基极和导电图形51B的电镀层81，经用热压的球形键合或超声的楔形键合等方法粘附的金属细线55A相连接。另外，52B是芯片电容器或无源元件，它们用焊锡等焊料或者导电膏55B粘附。
在本工序中，由于在各区块62内集成了多个导电图形51，所以具有能以极高的效率进行电路元件52的贴附和引线键合的优点。另外，在进行小片焊区和键合焊区的图形识别时，通过对照导电图形51和电镀层81，很容易识别电镀层81，因此具有能防止由分离槽61的光漫反射引起的识别障碍的优点。
本发明的第4工序如图7所示，是用绝缘树脂50整体浇注，将各装载部63的电路元件52一并覆盖，并将分离槽61充填。
在本工序中，如图7A所示，绝缘树脂50完全覆盖了电路元件52A、52B以及多个导电图形51A、51B、51C，并且绝缘树脂50充填在导电图形51之间的分离槽61中，它们与导电图形51A、51B、51C的侧面相粘结，得到了牢固的固定效果。这样，借助于绝缘树脂50支撑了导电图形51。
另外，本工序可用压铸、注塑、或者浸渍方法来实现。作为树脂材料，使用环氧树脂等热固化性树脂时，可用压铸法实现，用聚酰亚胺树脂、聚亚苯基硫醚等热可塑性树脂时，可用注塑来实现。
进而，在本工序中进行压铸或注塑时，如图7B所示，对各区块62要使装载部63纳入一个共用的模塑模具中，对各区块，分别用一团绝缘树脂50整体地进行浇注。因此，与现有的如压铸等那样对各装载部分别浇注的方法相比，可谋求树脂量的大幅削减。
对覆盖在导电箔60表面上的绝缘树脂50的厚度加以调整，使得从电路元件52的键合引线55A的最上部起，约有100μm受到覆盖。根据对强度的考虑，该厚度可厚可薄。
本工序的特点是在覆盖绝缘树脂50之前，由形成导电图形51的导电箔60构成支撑基板。以往，如图13那样，采用原本不必要的支撑基板5形成导电线路7～11，而在本发明中，构成支撑基板的导电箔60是作电极材料的必要材料。因此，具有能尽量节省构成材料进行制作的优点，从而可实现成本降低。
另外，由于分离槽61以比导电箔的厚度为浅的深度形成，所以导电箔60并未分离成一个一个的导电图形51。因此，作为薄片状的导电箔60可整体处理，故具有在浇注绝缘树脂50时，向模具上搬运，向模具上安装的操作非常方便的特征。
本发明的第5工序，如图7所示，往往将未设置分离槽的厚度部分的导电箔60除去。
本工序是用化学的和/或物理的方法除去导电箔60的背面，使导电图形51分离。该工序通过研磨、磨削、蚀刻、用激光使金属蒸发等方法实施。
在实验中，用研磨装置或磨削装置将整个面削去约30μm，让绝缘树脂50从分离槽61中露出。在图7中用虚线示出了该露出面。其结果是，分离成约40μm厚的导电图形51。另外，也可以对整个面湿法刻蚀导电箔60至绝缘树脂50露出，以此使绝缘树脂50露出。
此结果形成了导电图形51的背面在绝缘树脂50上露出的结构。即，充填了分离槽61的绝缘树脂50的表面和导电图形51的表面实际是相同的结构。因此，由于在本发明的电路器件53上，没有设置如图12所示的以往的背面电极10，11那样的台阶，所以具有安装时可依靠焊锡等的表面张力，原样在水平面上移动，进行自对准的特点。
进而，进行导电图形51的背面处理，得到图8所示的最终结构。即，根据需要，在露出的导电图形51上覆盖焊锡等导电材料，制成为电路器件。
本发明的第6工序如图9所示，对用绝缘树脂50一并浇注的各装载部63的电路元件52的特性进行测定。
在上一工序中进行过导电箔60的背面刻蚀之后，使各区块62从导电箔60上脱离。由于该区块62用绝缘树脂50与导电箔60的剩余部分相连接，所以无需使用切断工具用机械方法从导电箔60的剩余部分上揭下，就能达到目的。
在各区块62的背面，如图9所示，露出了导电图形51的背面，各装载部65与导电图形51形成时完全相同，排列成矩阵状。用探针68对准该导电图形51中从绝缘树脂50露出的背面电极56，分别测定各装载部65的电路元件52的特性参数，对其合格与否进行判定，并在不合格品上用磁性墨水等打上标记
在本工序中，由于各装载部65的电路器件53借助于绝缘树脂50对每个区块整体进行支撑，所以未零散地分离成单个器件。因此，通过将置于测试器承载台上的区块62，依一个装载部65的尺寸，如箭头所示，在纵向和横向步进传送，可以极快地、批量地对区块62的各装载部65的电路器件53进行测试。即，由于可以不要以往所必须的电路器件的正反面判别、电极位置的识别等，所以能谋求测定时间的大幅度缩短。
本发明的第7工序，如图10所示，是通过切割将绝缘树脂50分离成各装载部65。
在本工序中，用真空将区块62吸附到切割装置的承载台上，用切割刀片69沿各装载部65之间的切割线70，切割分离槽61的绝缘树脂50，以分离成单个的电路器件53。
在本工序中，切割刀片69以切断绝缘树脂50的切削深度工作，用直接吸附筒夹从切割装置的承载台上收入攻丝的收容孔中即可。另外，切割时，要识别预先在上述第1工序中设置的与各区块周围的框状图形66成为一体的相向配置的对位标记67，以此为基准进行切割。众所周知，切割时在纵向将所有切割线70进行切割后，再将承载台旋转90度，沿横向的切割线70进行切割。
[发明的效果]
在本发明中，使构成导电图形材料的导电箔本身起支撑基板的作用，在形成分离槽或安装电路元件、覆盖绝缘树脂之前，以导电箔支持全体，另外，将导电箔分离为各导电图形时，使绝缘树脂起支撑基板的作用。因此，能够以电路元件、导电箔、绝缘树脂这些最低限度的必要构件进行制造。如在以往的实施例中说明过的，构成原先的电路器件用的支撑基板成为不必要，因而成本可以低廉。另外，由于不要支撑基板、导电图形掩埋在绝缘树脂中，因而还具有能通过调节绝缘树脂和导电箔的厚度，形成非常薄的电路器件的优点。
另外，在本发明中，通过在导电图形上配置电镀层，第1，具有可以压低电路元件和导电图形的接触电阻，可批量进行良好的小片键合的优点；第2，具有可以切实进行引线键合的优点；第3，具有小片键合和引线键合工序中的既有图形识别，又没有与由分离槽造成的光漫反射有关的误识别的优点。
接着，在本发明中，由于在绝缘树脂的模塑工序中对每一区块进行整体浇注，所以树脂用量得以大幅度削减。
进而，具有在切割工序中利用对位标记从而可迅速而可靠地识别切割线的优点。进而，就切割而言，只进行绝缘树脂层切断就可以了，由于不切断导电箔，所以切割刀片的寿命能够延长，也不发生切割导电箔时所产生的金属毛刺。
另外，由图13可知，由于可以省去通孔形成工序、导体印刷工序(陶瓷基板的场合)等，所以与现有的相比，具有能大大缩短制造工序，全流程能内部作业的优点。另外，框架模具也全都不需要，所以它是具有极短交货期的制造方法。

Claims (18)

1.一种电路器件的制造方法，其特征在于，包括：
准备导电箔，在至少形成有多个电路元件的装载部的除导电图形以外区域的上述导电箔上，形成比上述导电箔的厚度为浅的分离槽，以形成导电图形的工序；
用抗蚀剂层覆盖上述导电图形和上述分离槽表面，在上述导电图形的所希望的区域形成电镀层的工序；
在所希望的上述导电图形的上述各装载部的上述电镀层上贴附电路元件的工序；
用绝缘树脂整体浇注，将各装载部的上述电路元件一并覆盖，使上述分离槽被充填的工序；
除去未设置上述分离槽的厚度部分的上述导电箔的工序；以及
用切割方法将上述绝缘树脂分离成各单个装载部的工序。
2.根据权利要求1所述的电路器件的制造方法，其特征在于，还包括：在贴附电路元件的工序之后、在用绝缘树脂整体浇注将各装载部的上述电路元件一并覆盖使上述分离槽被充填的工序之前，形成将上述各装载部的电路元件的电极与所希望的上述导电图形电连接的连接电极的工序。
3.如权利要求1或2所述的电路器件的制造方法，其特征在于：
上述导电箔用铜、铝、铁-镍中的任何一种构成。
4.如权利要求1或2所述的电路器件的制造方法，其特征在于：
上述电镀层以比上述导电图形小的形式形成。
5.如权利要求4所述的电路器件的制造方法，其特征在于：
上述电镀层通过镀金或镀银形成。
6.如权利要求1或2所述的电路器件的制造方法，其特征在于：
在上述导电箔上有选择地形成的上述分离槽通过化学或物理刻蚀法形成。
7.如权利要求1或2所述的电路器件的制造方法，其特征在于：
上述电路元件将半导体配对芯片、芯片电路部件的任何一种或者两者贴附起来。
8.如权利要求2所述的电路器件的制造方法，其特征在于：
上述连接电极由引线键合形成。
9.如权利要求8所述的电路器件的制造方法，其特征在于：
上述引线键合是在上述导电图形的上述电镀层上进行的。
10.如权利要求8所述的电路器件的制造方法，其特征在于：
通过对照上述导电图形和上述电镀层，进行上述引线键合的位置识别。
11.如权利要求1或2所述的电路器件的制造方法，其特征在于：
上述绝缘树脂用压铸法附着。
12.如权利要求1或2所述的电路器件的制造方法，其特征在于：
排列了多个将在上述导电箔上至少形成多个电路元件的装载部的导电图形排列成矩阵状的区块。
13.如权利要求12所述的电路器件的制造方法，其特征在于：
用压铸法将上述绝缘树脂附着在每个上述区块上。
14.如权利要求12所述的电路器件的制造方法，其特征在于：
对每个用上述绝缘树脂浇注的上述各区块，用切割法分离成各个装载部。
15.如权利要求14所述的电路器件的制造方法，其特征在于：
利用与上述导电图形一起形成的对准标记进行切割。
16.如权利要求14所述的电路器件的制造方法，其特征在于：
利用与上述导电图形一起形成的对置的对准标记进行切割。
17.一种电路器件的制造方法，其特征在于，包括：
形成在导电箔上至少形成多个电路元件的装载部的导电图形，和在上述导电图形上在内侧配置的电镀层，以使上述导电图形的周围露出的工序；
在上述各装载部的上述电镀层上，将电路元件固定的工序；
将各装载部的上述电路元件一并覆盖，并以绝缘性树脂整体浇注的工序；
将上述导电箔从其里面除去的工序；和
在各装载部切割面将上述绝缘性树脂分离的工序。
18.一种电路器件的制造方法，其特征在于，包括：
准备具有形成在导电箔上至少形成多个电路元件的装载部的导电图形，和在上述导电图形上在内侧配置的电镀层，以使上述导电图形的周围露出的关蚀刻状态的框架的工序；
在上述各装载部的上述电镀层上，将电路元件固定的工序；
将各装载部的上述电路元件一并覆盖，并以绝缘性树脂整体浇注的工序；
将上述导电箔从其里面除去的工序；和
在各装载部切割面将上述绝缘性树脂分离的工序。
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