WO2004040592A1 - チップ抵抗器、その製造方法およびその製造方法に用いられるフレーム - Google Patents
チップ抵抗器、その製造方法およびその製造方法に用いられるフレーム Download PDFInfo
- Publication number
- WO2004040592A1 WO2004040592A1 PCT/JP2003/013964 JP0313964W WO2004040592A1 WO 2004040592 A1 WO2004040592 A1 WO 2004040592A1 JP 0313964 W JP0313964 W JP 0313964W WO 2004040592 A1 WO2004040592 A1 WO 2004040592A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- resistor
- chip
- electrodes
- insulating layer
- plate
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors
- H01C1/144—Terminals or tapping points or electrodes specially adapted for resistors; Arrangements of terminals or tapping points or electrodes on resistors the terminals or tapping points being welded or soldered
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
Definitions
- the present invention relates to a chip resistor, a method of manufacturing the same, and a frame used in the method of manufacturing the chip resistor.
- FIG. 37 As an example of a conventional chip resistor, there is one as shown in FIG. 37 (see, for example, Japanese Patent Application Laid-Open No. 2002-57009).
- the illustrated chip resistor B has a configuration in which a pair of electrodes 91 is provided on the lower surface 90 b of a metal chip-shaped resistor 90. The pair of electrodes 91 are separated from each other via a gap 93.
- a solder layer 92 is provided as a means for improving solderability at the time of mounting. Is formed.
- the chip resistor B is manufactured by a method as shown in FIGS. 38A to 38E.
- a solder layer 9 2 ′ is formed on the lower surface of the metal plate 9 1 ′, and then, as shown in FIG. 38E, the metal plates 90 ′ and 91 ′ are removed. Disconnect. As a result, the chip resistor B is manufactured.
- the region between the pair of electrodes 91 on the lower surface 90 b of the resistor 90 and the side surfaces 90 c of the resistor 90 are not insulated and protected. For this reason, when the chip resistor B is surface-mounted at a desired location using solder, a part of the solder protruding from below the respective electrodes 91 becomes part of the lower surface 90 b of the resistor 9 ⁇ and each side surface. In some cases, it adhered to 90 c. When such a situation occurs, a large error occurs in the resistance value and the chip resistor B The specification of the electric circuit configured by using the information is changed. These problems become more serious as the resistance of the chip resistor B is reduced and the necessity of reducing the error in the resistance value increases.
- the conventional manufacturing method described above has a problem that a series of manufacturing operations is complicated, and the productivity of the chip resistor is low. More specifically, in the prior art, the gap 93 is formed by machining. In the processing, the dimension Sb between the pair of electrodes 91 must be accurately finished. For this reason, the above processing must be performed very carefully, and the productivity of the chip resistor B has been reduced. Further, in the above-described conventional technology, since the chip resistor B is manufactured through cutting, an error in the inter-electrode resistance value caused by the cutting accuracy has also occurred.
- a test is performed to determine whether the chip resistor is mounted properly or not.
- the determination as to whether or not the soldering of the chip resistor is properly made can be made by external observation.
- part of the solder used for mounting is formed as a solder fillet attached to the end face of the resistor of the chip resistor. In this way, when the presence of the solder fillet is confirmed, it is highly likely that the mounting of the chip resistor is appropriate, and when the presence of the solder fillet cannot be confirmed, the mounting of the chip resistor is inappropriate. The possibility can be judged to be high.
- solder layer 92 is formed on the lower surface of each electrode 91, it is difficult to form a solder fillet only by providing the solder layer 92. There was a case.
- cream solder is applied in advance to a portion to be joined of each electrode 91, but the application amount is insufficient.
- an appropriate solder fillet is not formed. Therefore, in the above-described conventional technology, it was difficult to judge whether or not the surface mounting of the chip resistor B was appropriate based on the presence or absence of the solder fillet, which was inconvenient.
- the lack of the solder fillet sometimes caused insufficient bonding strength of the solder.
- the width Sa of each electrode 91 is relatively large in the direction in which the pair of electrodes 91 are arranged. Therefore, when the resistance value is measured by bringing the measurement probe into contact with the pair of electrodes 91, the resistance value Ra when the measurement probe is brought into contact with the respective inner edges 91a of the pair of electrodes 91 is measured. And the resistance value Rb when contacting the outer edge 91b was also large. As described above, when the resistance value greatly differs depending on which part of each electrode 91 the measurement probe contacts, when the tip resistor B is used, the resistance value increases depending on how the tip resistor B is used.
- the solder does not adhere to the entire lower surface of each electrode 91, but, for example, each electrode 91 In some cases, the contact may be made only on the inner edge 9 1a. Conversely, the solder may be biased and contact only the portion near the outer edge 91b of the lower surface of each electrode 91. In the above-mentioned conventional technology, in such a case, a large variation occurs in the resistance value.
- the chip resistor B has a low resistance of, for example, 1 ⁇ or less, the overall resistance of the chip resistor B is small even if the difference between the above-mentioned resistance values Ra and Rb is small. Compared with, the ratio of the difference is very large. Therefore, the lower the resistance of the chip resistor B is, the more serious the above problem becomes.
- the chip resistor provided by the first aspect of the present invention is spaced apart in the thickness direction.
- a chip-shaped resistor having a pair of side surfaces extending in a certain direction at an interval in the width direction of the front and back surfaces, and a pair of side surfaces arranged on the back surface of the resistor at an interval in the certain direction.
- a chip resistor comprising: a plurality of electrodes provided; a first insulating layer covering a region between the plurality of electrodes on a back surface of the resistor; And a second insulating layer that covers the side surface.
- the chip resistor according to the present invention further includes a third insulating layer covering a surface of the resistor.
- At least two of the first to third insulating layers are made of the same material.
- the thickness of each of the electrodes is greater than the thickness of the first insulating layer.
- the resistor has a pair of end faces spaced apart in the fixed direction, and a solder layer is formed on each end face.
- the plurality of electrodes are provided apart from an edge of the back surface of the resistor in the fixed direction.
- the method for manufacturing a chip resistor provided according to the second aspect of the present invention is characterized in that a plurality of electrodes arranged at intervals in the longitudinal direction of the resistor material are provided on the back surface of the bar-shaped resistor material.
- a bar-shaped resistor assembly is provided, wherein the plurality of inter-electrode regions on the back surface and the pair of side surfaces of the resistor material are covered with first and second insulating layers.
- a step of dividing the resistor assembly into a plurality of chip resistors by cutting the resistor assembly at a plurality of locations in a longitudinal direction thereof.
- the step of producing the bar-shaped resistor assembly includes the steps of: providing an insulating layer formed as a pattern on one surface of a plate as a resistor material and a conductive layer serving as each of the electrodes; And a step of forming an insulating layer on a pair of side surfaces of the bar-shaped resistor material.
- the step of fabricating the bar-shaped resistor aggregate includes: forming an insulating layer on one surface of a plate as a resistor material; Forming an insulating layer on a pair of side surfaces of the bar-shaped resistor material, and forming a plurality of electrodes on the surface on which the patterned insulating layer is formed. And.
- a step of forming a third insulating layer covering a surface of the resistor material before dividing the resistor assembly into a plurality of chip resistors Is is further provided.
- the method for manufacturing a chip resistor provided according to the third aspect of the present invention includes a method for manufacturing a chip resistor, comprising: Forming a par-shaped resistor assembly provided with a first insulating layer covering the plurality of inter-electrode regions; and cutting the resistor assembly at a plurality of locations in a longitudinal direction of the resistor assembly to provide a resistor.
- the method for manufacturing a chip resistor provided by the fourth aspect of the present invention includes: a plurality of plate-like portions having front and back surfaces and a pair of side surfaces and extending in a certain direction; A frame made of a conductive member having a supporting portion for supporting the plurality of electrodes; and a plurality of electrodes arranged at intervals in the fixed direction on one of the front and back surfaces of each of the plate-like portions; By forming a first insulating layer located in the inter-electrode region and forming a second insulating layer on a pair of side surfaces of each of the plate-like portions, a plurality of bar-shaped resistor assemblies are manufactured. And a step of dividing each of the resistor aggregates into a plurality of chip resistors so that each of the plate portions becomes a plurality of chip-shaped resistors.
- the step of forming a second insulating layer on a pair of side surfaces of each of the plate-shaped portions includes the step of torsionally deforming a connecting portion between each of the plate-shaped portions and the supporting portion of the frame. This is performed while the plate-shaped portion is rotated around an axis extending in the longitudinal direction.
- a frame in which the connecting portion is formed narrower than the plate-like portion is used as the frame.
- the method further includes a step of forming a third insulating layer.
- the step of fabricating the bar-shaped resistor assembly includes, after forming the above-mentioned first laminated third insulating layer on each of the plate-shaped portions, connecting the plurality of electrodes by plating. Including the step of forming.
- a frame provided by the fifth aspect of the present invention includes a plurality of plate-like portions having front and back surfaces and a pair of side surfaces and extending in a certain direction, and a support portion for supporting the plurality of plate-like portions.
- the support portion has a frame shape, and each of both ends in the longitudinal direction of each of the plate portions is supported by the support portion via the connection portion.
- the chip resistor provided by the sixth aspect of the present invention is a chip resistor having a front and back surface spaced apart in a thickness direction and a pair of end faces spaced in a certain direction intersecting the thickness direction.
- the solder layer covers the entire end face.
- the semiconductor device further includes a first insulating layer covering a region between the plurality of electrodes on the back surface of the resistor.
- each of the electrodes is formed by laminating any of the solder layers integral with or separate from the solder layer.
- a method for manufacturing a chip resistor provided according to a seventh aspect of the present invention is a method for manufacturing a chip resistor, comprising the steps of: providing a bar-shaped resistor material on one of two sides; Forming a bar-shaped resistor assembly in which a plurality of conductive layers for forming electrodes are arranged and a solder layer is formed on a pair of side surfaces extending in a longitudinal direction of the resistor material; And cutting the resistor assembly into a plurality of chip resistors by cutting the resistor assembly at a plurality of locations in the longitudinal direction.
- the method for manufacturing a chip resistor provided according to the eighth aspect of the present invention is a method for manufacturing a chip resistor.
- a plurality of electrodes spaced apart in a certain direction are formed on one of the front and back surfaces of the resistor, and the pair of end faces in the certain direction of the resistor are partially exposed.
- a plurality of the chip resistors without the solder layer are prepared, and in the step of forming the solder layer, the chip resistor without the solder layer is formed by barrel plating. A solder layer is formed collectively.
- the step of fabricating the chip resistor without the solder layer includes forming a plurality of electrodes arranged on one of the front and back surfaces of the bar-shaped resistor material at intervals in the longitudinal direction of the resistor material.
- the step of producing the bar-shaped resistor assembly includes the steps of: providing a conductive layer to be each of the electrodes on one surface of a plate to be a resistor material; and forming the plate into the bar-shaped resistor material. Splitting.
- a frame made of a conductive member having a plurality of plate-shaped portions is prepared, and each plate-shaped portion is pressed with the par-shaped resistive material.
- the method includes a step of providing a conductive layer serving as each of the electrodes on one surface thereof.
- the chip resistor provided by the ninth aspect of the present invention is a chip resistor having a front and back surface spaced apart in a thickness direction and a pair of end faces spaced apart in a certain direction intersecting the thickness direction. And a plurality of electrodes provided on the back surface of the resistor so as to be spaced apart in the fixed direction, wherein the plurality of electrodes are the resistor It is characterized in that it is provided away from the edge of the back surface in the fixed direction.
- the chip resistor according to the present invention includes an insulating layer covering a region between the plurality of electrodes on the back surface of the resistor.
- the insulating layer also covers a region between the plurality of electrodes and the edge on the back surface of the resistor.
- a method of manufacturing a chip resistor comprising: forming a pattern of an insulating layer on one surface of a plate serving as a material of a resistor; Forming a conductive layer in a region where the insulating layer is not formed, and dividing the plate into a plurality of chip-shaped resistors, wherein the plate is divided on one side of each of the resistors.
- a part of the conductive layer is formed as a pair of electrodes separated from each other with a part of the insulating layer interposed therebetween, and the pair of electrodes is formed so as to be separated from an edge of the resistor in a direction in which they are arranged. It is characterized by:
- FIG. 1 is a perspective view showing an example of a chip resistor according to the present invention.
- FIG. 2 is a cross-sectional view taken along the line II-II of FIG.
- FIG. 3 is a sectional view taken along the line III-III of FIG.
- FIG. 4 is a sectional view of a main part of the chip resistor shown in FIG.
- 5A to 5C are perspective views showing a part of the manufacturing process of the chip resistor shown in FIG.
- 6D to 6F are perspective views showing a part of the manufacturing process of the chip resistor shown in FIG.
- 7G and 7H are perspective views showing a part of the manufacturing process of the chip resistor shown in FIG.
- FIG. 8A is a perspective view showing an example of a frame used for manufacturing a chip resistor
- FIG. 8B is a plan view of a main part thereof.
- FIG. 9 is a perspective view showing a method of manufacturing the frame shown in FIG. 8A.
- FIG. 1OA and FIG. 10B are partially cutaway perspective views showing a part of a process of manufacturing a chip resistor using a frame.
- Fig. 11C and Fig. 1 ID show the part of the process of manufacturing a chip resistor using a frame
- Fig. 11C is a partially cutaway perspective view
- Fig. 11D is a partial cross sectional side view. It is.
- FIGS. 12E and 12F are partially cutaway perspective views showing a part of a process of manufacturing a chip resistor using a frame.
- FIG. 13 is a partially broken perspective view showing a part of a process of manufacturing a chip resistor using a frame.
- FIG. 14 is a perspective view showing another example of the chip resistor according to the present invention.
- FIG. 15 is a sectional view taken along the line XV—XV in FIG.
- FIG. 16A and FIG. 16B are perspective views showing a part of a process of manufacturing the chip resistor shown in FIG.
- FIG. 17C and FIG. 17D are perspective views each showing a part of a step of manufacturing the chip resistor shown in FIG.
- FIG. 18 is a perspective view showing another example of the chip resistor according to the present invention.
- FIGS. 19A to 19D are perspective views showing a part of a process of manufacturing the chip resistor shown in FIG.
- 20A to 20C are perspective views showing another example of a process for manufacturing the chip resistor shown in FIG.
- FIG. 21 is a perspective view showing another example of the chip resistor according to the present invention.
- FIG. 22A and FIG. 22B are perspective views showing a part of the process of manufacturing the chip resistor shown in FIG.
- FIGS. 23C and 23D are perspective views each showing a part of a process of manufacturing the chip resistor shown in FIG. 21.
- FIG. 24 is a fragmentary plan view showing another example of the step of manufacturing the chip resistor shown in FIG. 21.
- FIG. 25 is a perspective view showing another example of the chip resistor according to the present invention.
- FIG. 26 is a bottom view of the chip resistor shown in FIG.
- FIG. 27 is a sectional view taken along line XXVII-XXVII of FIG.
- FIG. 28 is a fragmentary plan view showing an example of a process for manufacturing the chip resistor shown in FIG. 25. It is.
- FIG. 29 is a perspective view showing another example of the chip resistor according to the present invention.
- FIG. 30A and FIG. 30B show a part of a process of manufacturing the chip resistor shown in FIG. 29, FIG. 30A is a perspective view, and FIG. is there.
- FIG. 31A is a sectional view showing another example of the chip resistor according to the present invention, and FIG. 31B is a bottom view thereof.
- FIG. 32A and FIG. 32B are plan views of relevant parts showing an example of the manufacturing process of the chip resistor shown in FIG. 31A.
- FIG. 33A is a sectional view showing another example of the chip resistor according to the present invention
- FIG. 33B is a bottom view thereof
- FIG. 33C is a chip resistor shown in FIG. 33A. It is a principal part top view which shows an example of the process of manufacturing a container.
- FIG. 34A is a sectional view showing another example of the chip resistor according to the present invention
- FIG. 34B is a bottom view thereof
- FIG. 34C is a chip resistor shown in FIG. 34A. It is a principal part top view which shows an example of the manufacturing process of a container.
- FIG. 35A is a cross-sectional view showing another example of the chip resistor according to the present invention
- FIG. 35B is a bottom view thereof
- FIG. 35C is a chip resistor shown in FIG. 35A. It is a principal part top view which shows an example of the manufacturing process of a container.
- FIG. 36A and FIG. 36B are plan views of relevant parts showing another example of a frame used for manufacturing a chip resistor.
- FIG. 37 is a perspective view showing a conventional example of a chip resistor.
- FIGS. 38A to 38E are explanatory views showing a conventional example of a method of manufacturing a chip resistor. BEST MODE FOR CARRYING OUT THE INVENTION
- the chip resistor A 1 of the present embodiment includes a resistor 1, a first or third insulating layer 2 A to 2 C, a pair of electrodes 3, and a pair of electrodes 3. It has a solder layer 4.
- the resistor 1 has a chip shape with a rectangular shape in plan view, and is made of metal. Specific examples of the material include Ni—Cu-based alloys, Cu—Mn-based alloys, and Ni—Cr-based alloys. However, the material is not limited to these, and a material having a resistivity that matches the size and the target resistance value of the chip resistor A1 may be appropriately selected.
- Each of the first to third insulating layers 2A to 2C is a resin film such as an epoxy resin, and is formed by thick film printing as described later.
- the first insulating layer 2A is formed so as to cover the entire region between the pair of electrodes 3 on the back surface 10a of the resistor 1.
- the second insulating layer 2B is formed so as to cover the entire pair of side faces 10c spaced apart in the lateral direction of the resistor 1.
- the third insulating layer 2C is provided so as to cover the entire surface 10b of the resistor 1.
- the pair of electrodes 3 is provided on the back surface 10a of the resistor 1, and is separated in the longitudinal direction (X direction) of the resistor 1 so as to sandwich the first insulating layer 2A.
- each electrode 3 is formed by, for example, copper plating after the formation of the first insulating layer 2A, and has an end face 20 of the first insulating layer 2A. Contact so that no gap is created.
- the distance between the pair of electrodes 3 is defined by the first insulating layer 2A, and has the same size as the width L1 of the insulating layer 2A.
- the ends of the electrodes 3 and the solder layers 4 are schematically shown, but since the electrodes 3 and the solder layers 4 are formed by plating. In fact, as shown by the symbol n1 in FIG. 4, some of them overlap on the first insulating layer 2A. However, this overlapping portion does not directly contact the back surface 10 a of the resistor 1, and thus does not cause an error in the resistance value between the electrodes of the resistor 1. Therefore, when the electrodes 3 and the solder layers 4 are formed, the amount of the overlap may be relatively large.
- the thickness t1 of each electrode 3 is greater than the thickness t2 of the first insulating layer 2A, and each electrode 3 protrudes below the lower surface of the first insulating layer 2A.
- Each of the pair of solder layers 4 has an L-shaped cross section as shown in FIG. 2, and a portion covering the entire end face 10 d at both ends in the longitudinal direction of the resistor 1 and an entire lower surface of each electrode 3.
- Has a structure that is physically connected to a portion that covers The material of this solder layer 4 is It is not particularly limited, and various solders used for mounting and joining electronic components can be used.
- the resistor 1 has a thickness of about 0.1 mm to about L mm, and the vertical and horizontal dimensions are about 2 mm to 7 mm.
- the thickness of each of the first to third insulating layers 2A to 2C is about 20 ⁇
- the thickness of each electrode 3 is about 30 / m
- the thickness of each solder layer 4 is about 5 ⁇ m.
- the resistance between the electrodes of the chip resistor A 1 is determined by the resistivity of the resistor 1, the distance between the electrodes 3, and the thickness of the resistor 1. Therefore, the size of the resistor 1 is variously changed according to the magnitude of the target resistance value.
- the chip resistor A1 is configured to have a low resistance of, for example, about 0.5 ⁇ to 10 ⁇ .
- a metal plate P1 as a material of the resistor 1 is prepared.
- the plate P1 has a vertical and horizontal size in which a plurality of resistors 1 can be formed, and has a uniform thickness throughout.
- an insulating layer 2C ′ is formed on the whole or substantially the entire upward one side 10b of the plate P1.
- the formation of the insulating layer 2C ' is performed, for example, by printing a thick film of an epoxy resin in a solid paint state. After the formation of the insulating layer 2C, a step of marking the surface may be performed.
- the plate P1 is turned upside down, and then a plurality of insulating layers 2A 'arranged in a stripe are formed on the upper surface 10a of the plate P1 facing upward.
- the formation of the plurality of insulating layers 2A ' is performed by thick-film printing using the same resin and apparatus used for forming the insulating layers 2C'. This is preferable for reducing the manufacturing cost of the chip resistor A1 as compared with the case where a plurality of types of materials and devices are used.
- the width of each insulating layer 2A, etc. can be accurately finished to a predetermined size.
- the conductive layer 3A between each of the plurality of insulating layers 2A', of one side 10a of the plate P1 is formed.
- the conductive layer 3A ' is a portion that becomes a prototype of the electrode 3, and its formation is performed by, for example, copper plating. U. According to the plating process, it is possible to form the entire conductive layer 3A 'to have a uniform thickness without forming a gap between the conductive layer 3A and the insulating layer 2A'.
- the plate P1 is cut in a direction perpendicular to the direction in which the conductive layers 3A 'and the insulating layers 2A' extend.
- the plate P1 is divided into a plurality of bar-shaped resistor materials 1A '.
- insulating layers 2A and conductive layers 3A divided into a rectangular shape are provided alternately in the longitudinal direction of the resistor material 1A'.
- an insulating layer 2C divided into a long and thin shape is formed.
- an insulating layer 2B ' is formed by painting a resin on the pair of side surfaces 10c' of the resistor material 1A 'and the side surfaces of each conductive layer 3A'. This coating can also be performed by thick film printing. As a result, a bar-shaped resistor assembly A1 "having the insulating layer 2B 'and having no solder layer formed thereon is obtained.
- the resistor assembly ⁇ ′ is cut at a plurality of imaginary lines C3 in the longitudinal direction. This cutting is performed at a position where each conductive layer 3 3 is divided into two. Thereby, the bar-shaped resistor material 1 ⁇ is divided into the chip-shaped resistor 1.
- Each of the conductive layers 3 A ′ and the insulating layers 2 B ′ and 2 becomes the electrode 3 and the second and third insulating layers 2 B and 2 C, respectively, and forms one bar-shaped resistor assembly.
- a plurality of chip resistors ⁇ are suitably manufactured. However, since the chip resistor A1 'has no solder layer 4, a process for forming the solder layer 4 is performed thereafter.
- the solder layer 4 is formed by, for example, barrel plating. That is, after manufacturing the plurality of chip resistors A1 ', the plurality of chip resistors A1' are accommodated in a single barrel, and the soldering treatment is performed on them all at once.
- Each chip resistor ⁇ is a metal surface on which the end face 10 d of the resistor 1 and the surface of each electrode 3 are exposed, while the other parts are the first to third insulating layers 2 A to 2 A. Since it is appropriately covered with C, as shown in FIG. 7H, the solder layer 4 can be efficiently and appropriately formed on the above-mentioned metal surface region. Thus, the chip resistor A1 is manufactured efficiently.
- the chip resistor A1 is surface-mounted on a desired mounting target area using, for example, a solder reflow technique.
- a solder reflow technique cream solder is applied to the terminals provided in the mounting target area, and then chip resistors A1 are placed on the terminals so that the electrodes 3 are brought into contact with each other. Is heated in a reflow furnace. Since each electrode 3 protrudes below the first insulating layer 2A, it is ensured that the solder adheres to the lower surface of each electrode 3.
- solder in the solder layer 4 melts. Since a part of the solder layer 4 is formed on the end face 10 d of the resistor 1, a solder fillet H f is appropriately formed on the end face 10 d as shown by a virtual line in FIG. You. Therefore, by checking the solder fillet Hf from the outside, it can be determined that the chip resistor A1 is properly mounted, and the inspection is facilitated. The mounting strength of the chip resistor A 1 becomes strong as much as the solder fillet H f is formed. The solder fillet Hf also plays a role of transmitting the heat generated when the chip resistor A1 is energized to the member to be mounted.
- the solder fillet Hf when the solder fillet Hf is formed, the effect of suppressing the temperature rise of the chip resistor A1 can be obtained. Since the solder layer 4 is also formed on the lower surface of the electrode 3, the soldering of the electrode 3 to the terminal is also reliably performed.
- the solder may protrude from the terminal.
- the region between the electrode 3 on the back surface 10a of the antibody 1 and each side surface 10c of the resistor 1 is covered by the first and second insulating layers 2A and 2B.
- the solder does not directly adhere to those surfaces of the resistor 1. Therefore, there is no occurrence of a resistance value error due to improper solder attachment to the resistor 1. Since the surface 10b of the resistor 1 is covered with the third insulating layer 2C, it is possible to prevent the occurrence of improper electrical conduction between the surface 10b and other members / devices. You.
- the resistor 1 of the chip resistor A1 is formed by cutting the plate P1, and its size can be finished with high dimensional accuracy.
- the thickness of the resistor 1 can be accurately finished from the stage of the plate P1.
- the dimension L1 between the pair of electrodes 3 matches the width of the first insulating layer 2A
- the first insulating layer 2A is formed with a considerably high level and dimensional accuracy by thick film printing. Can do It is possible. Therefore, the dimension L1 can be finished to a desired dimension with high accuracy.
- the size of the resistor 1 and the dimension L1 between the pair of electrodes 3 can be finished with high accuracy, the error in the inter-electrode resistance of the chip resistor A1 will be very small. Therefore, in the chip resistor A1, it is not necessary to perform trimming for adjusting the resistance value after the manufacture, and it is possible to reduce the cost accordingly.
- FIG. 8A and 8B show an example of a frame suitable for manufacturing a chip resistor.
- the same or similar elements as those in the above embodiment are denoted by the same reference numerals as those in the above embodiment.
- chip resistor A1 or a chip resistor having a structure similar thereto can be manufactured using frame F shown in FIGS. 8A and 8B. First, the configuration of the frame F will be described.
- the frame F is made of metal, and has a rectangular frame-shaped support portion 19 and a plurality of plate portions 1A supported by the support portion 19.
- the supporting portion 19 may be provided with a through hole (not shown) of an appropriate size that can be used for positioning and fixing the frame F at a desired position.
- Each plate-like portion 1A is a portion that eventually becomes a resistor of the chip resistor, and has a rectangular shape in which the width and the thickness of each portion are constant over substantially the entire length region in the longitudinal direction.
- the plurality of plate-like portions 1A are arranged substantially parallel to the width direction of each plate-like portion 1A via each of the plurality of slits 18 formed in the frame F.
- the width W1 of the connecting portion 17 connecting the longitudinal ends of the plate portion 1A and the support portion 19 is smaller than the width W2 of each plate portion 1A.
- Frame F can be manufactured from a metal plate. That is, for example, when a plurality of slits 18 are formed so as to penetrate by punching a plate P2 as shown in FIG. 9, a frame F is obtained. The same applies when slit 18 is formed by etching instead of punching. Various means can be used as a means for forming the slit 18. In FIG. 8A, only four plate-like portions 1A are provided on the frame F, but this is for easy understanding, and from the viewpoint of increasing the productivity of the chip resistor, one frame is provided. F Many plate-shaped parts 1A are provided.
- an insulating layer 2C ' is formed on the entire upper surface 10b of each plate-shaped portion 1A.
- the insulating layer 2C ' is also formed on the support 19, but it is not necessary to form it on the support 19.
- the insulating layer 2C ' is formed by, for example, printing a thick film of a solid epoxy resin.
- FIG. 10B after the frame F is turned upside down, a plurality of insulating layers 2A are placed on each of the plate-like portions 1A on the upwardly facing surface 10a. It is formed so as to be arranged at regular intervals in the longitudinal direction of A.
- Each insulating layer 2A has a rectangular shape having the same width as each plate-like portion 1A. The formation of each insulating layer 2A is performed by thick-film printing using the same resin and equipment used for forming the insulating layer 2C.
- each plate-like portion 1A is rotated approximately 90 degrees in the direction of arrow N1 around the axis C1 extending in the longitudinal direction. This rotation is performed by torsional deformation of the connecting portion 17.
- the connecting portion 17 is narrower than the plate-shaped portion 1A, the connecting portion 17 is easily torsionally deformed, and the plate-shaped portion 1A can be easily rotated. is there.
- the direction of each of the pair of side surfaces 10c changes, and the pair of side surfaces 10c is positioned above the front surface of the support portion 19 or below the back surface. It becomes. For this reason, as shown in FIG.
- the paint 2 is applied to the side surface 10 c.
- the application work can be performed easily and appropriately.
- the insulating layer 2B ' is appropriately formed on the pair of side faces 10c of each plate-like portion 1A.
- the respective plate-like portions 1A are reversely rotated to return to the original posture.
- the subsequent electrode formation and cutting work of each plate-shaped portion 1A can be performed even when each plate-shaped portion 1A is in a rotating state as shown in FIG. 11C. But Therefore, the step of returning each plate-shaped portion 1A to the original position may be omitted, and the number of steps as a whole may be reduced.
- a conductive layer 3A ′ serving as an electrode is formed in each region between the insulating layers 2A on one surface 10a of each plate-like portion 1A.
- the conductive layer 3A ' is formed by, for example, copper plating, and its thickness is made larger than the thickness of the insulating layer 2A.
- a bar-shaped resistor assembly ⁇ ' corresponding to a configuration in which a laser chip resistor having no solder layer is integrally connected in the longitudinal direction of the plate-shaped portion 1A. Is obtained.
- each of the par-shaped resistor assemblies ⁇ ′ is placed at a location indicated by a virtual line C 2 in the same figure!
- the conductive layer 3A ' is divided into the two electrodes 3, and a part of the plate-like portion 1' becomes the chip-shaped resistor 1.
- the insulating layers 2B 'and 2C become the second and third insulating layers 2B and 2C, and a plurality of chip resistors ⁇ are obtained.
- this chip resistor ⁇ has not yet formed a solder layer. Therefore, thereafter, similarly to the above-described embodiment, a solder layer is formed on the end face 10 d of the resistor 1 and the electrode 3 using, for example, a barrel plating method.
- a chip resistor having the same structure as the chip resistor A1 shown in FIGS. 1 to 3 is suitably manufactured.
- solder layer is also formed on this portion. Will be done. This is more preferable for forming a large solder fillet.
- the frame F is used as the raw material for the chip resistor, unlike the case where a rectangular plate is used as the raw material, the process of cutting the plate into par-shaped members is not required, and the manufacturing work Is facilitated.
- the insulating layer 2B ′ is formed on the side surface 10c of the plurality of plate-like portions 1A, a plurality of plate-like portions can be formed by using the method shown in FIGS. Since the formation of the insulating layer 2B 'for the part 1A can be performed at once, the workability is better than when the insulating layer 2B' is sequentially formed by the thick film printing method.
- the solder layer is not formed on the end face 10 d of the resistor 1, and the solder layer 39 is formed only on the lower surface of each electrode 3. Configuration have.
- the chip resistor A2 compared to the chip resistor A1 described above, it is difficult to form a large solder fillet because the solder layer is not formed on the end face 10d.
- the solder is improperly attached to the back surface 10 a and the both side surfaces 10 c of the resistor 1, and the first and second insulating layers 2 A, 2B, the amount of solder used to mount the chip resistor A2 is increased, thereby making it possible to form a solder fillet.
- the solder layer 39 helps to improve solderability during mounting.
- FIG. 16 and FIG. 17 show an example of a method of manufacturing the above-described chip resistor A2.
- an intermediate product as shown in FIG. 16A is manufactured.
- an insulating layer 2C ' was formed on one surface 10b of the plate P1, and a striped insulating layer 2A' was formed on the opposite surface 10a of the plate P1. Things.
- a conductive layer 3A' and a solder layer 39A ' are formed so as to overlap.
- This intermediate product has the same configuration as that shown in FIG. 6D except that the solder layer 39 A ′ is formed.
- the method for obtaining this configuration is the same as that described above. Can be adopted.
- the solder layer 39 A ′ is formed by, for example, a plating method. Since the portions other than the conductive layer 3A 'on the front and back surfaces of the plate P1 are covered with the resin insulating layers 2A' and 2C ', the solder layer 3 9' A 'can be formed appropriately.
- the plate P1 is cut in a direction orthogonal to a direction in which each conductive layer 3A 'and each first insulating layer 2A' extend, Divide into a plurality of bar-shaped resistor materials 1A '.
- a second insulating layer 2B ' is formed by applying a resin to each of the pair of side surfaces 10c of the bar-shaped resistor material 1A'.
- a bar-shaped resistor assembly A2 ' corresponding to a configuration in which the chip resistors A2 are connected in series is obtained.
- this resistor assembly A2 ' is cut at a plurality of locations indicated by imaginary lines and divided into a plurality of chips. Thereby, each conductive layer 3A 'becomes an electrode 3 of the chip resistor A2, and a plurality of chip resistors A2 are suitably manufactured.
- the second insulating layer 2 B is composed of the electrode 3 and the solder layer.
- the chip resistor A2 is different from the above-described chip resistor A2 in that it does not cover the side surface of the chip 39, and other configurations are the same as those of the chip resistor A2.
- the chip resistor A3 can be manufactured, for example, by the steps shown in FIGS. 19A to 19D.
- FIGS. 20A to 20C show another example of a method of manufacturing the chip resistor A2.
- a bar-shaped resistor material 1A ' is prepared.
- FIG. 20B by forming insulating layers 2A ′ to 2C ′, a plurality of conductive layers 3A ′, and solder layers 39A ′ on the resistor material 1A ′, A container assembly A3 'is produced.
- the resistor assembly A3 ' is cut into a plurality of chip resistors A3.
- a par-shaped antibody is used. You can use materials.
- the chip resistor A4 shown in FIG. 21 has a configuration in which both side surfaces 10c of the resistor 1 are not covered with the insulating layer. However, both ends 10 d of the resistor 1 and the lower surface of each electrode 3 are covered with the solder layer 4.
- a large solder fillet Hf along the end face 10d is formed by using the solder layer 4 when mounting at a desired location.
- the present invention may have such a configuration.
- the above-described chip resistor A4 can be manufactured by the following method. That is, first, an intermediate product as shown in FIG. 22A is manufactured. This intermediate is similar to that shown in Figure 6D. Next, as shown in FIG.
- the conductive layer 3A, the plate P1, and the insulating layer 2C are cut at the location indicated by the virtual line C4.
- the cutting position is a position where each conductive layer 3A 'is divided into two in the width direction, and the cutting direction is a direction in which each conductive layer 3A' and the insulating layer 2A 'extend.
- the plate P1 is divided into a plurality of par-shaped resistor materials 1A ', and a bar-shaped resistor aggregate without a solder layer is formed.
- an insulating layer 2A 'and a divided strip-shaped conductive layer 3A' are formed on one side of the resistive material 1A 'and on the other side, and vice versa.
- the resistor material 1A ' has a pair of side surfaces 1Od' extending in the longitudinal direction as a cut surface.
- a pair of side surfaces 10 d ′ of the bar-shaped resistor material 1 A ′ and the surface of each conductive layer 3 are applied to the solder layer 4 by, for example, a plating process. , Are formed.
- a bar-shaped resistor assembly A4 'having the solder layers 4 and 4 is obtained.
- the resistor assembly A4' is cut at a plurality of locations indicated by a virtual line C5. By this cutting, a plurality of chip resistors A4 are suitably manufactured.
- FIG. 24 shows another method of manufacturing the chip resistor A4.
- a frame F is used as a raw material of the resistor 1.
- This frame F is similar to that shown in FIGS. 8A and 8B.
- a strip-shaped insulating layer 2 extending in the longitudinal direction of each plate-shaped portion 1A, and two strip-shaped conductive layers sandwiching the insulating layer 2A ' 3A '(the portion with the dot pattern is the conductive layer 3).
- a solder layer 4 is formed on a pair of side surfaces 10 c of each plate-shaped portion 1A. Although not shown in the figure, the solder layer 4 may be formed so as to cover the surface of the conductive layer 3A.
- An insulating layer corresponding to the insulating layer 2C is formed on a surface of each plate-shaped portion 1A opposite to the one surface. Through such steps, a bar-shaped resistor assembly A4 'is obtained. Then, when this resistor assembly A4 ′ is cut at the position of the imaginary line C6, the chip resistor A4 is manufactured as shown by the imaginary line in FIG.
- the chip resistor A5 shown in FIGS. 25 to 27 has a pair of electrodes 3 provided at a position separated from the longitudinal edge 1a of the back surface 10a of the resistor 1 by an appropriate distance L3. It has a structure. On the lower surface of each electrode 3, an insulating layer 39 is formed so as to overlap.
- the first insulating layer 2A is composed of a region 2Aa covering the region between the pair of electrodes 3 in the back surface 10a of the resistor 1, and two regions covering the other portion of the back surface 10a. It is divided into 2 Ab and formed.
- each electrode 3 since each electrode 3 is separated from the edge 1a of the back surface 10a of the resistor 1 by an appropriate dimension L3, the width L2 of each electrode 3 is, for example, Each electrode 3 becomes narrower than when it is formed so as to extend to the edge 1 a of the resistor 1. As described above, when the width L 2 of each electrode 3 is reduced, the difference between the resistance value R 1 between the inner edges 30 a of the pair of electrodes 3 and the resistance value R 2 between the outer edges 30 b is reduced. Becomes smaller.
- the solder may be biased in contact with a portion near the inner edge 30a of the pair of electrodes 3, Alternatively, even if a situation occurs in which a portion of the pair of electrodes 3 near the outer edge portion 30 b is biased and contacts, a large difference in resistance value can be prevented.
- a plurality of insulating layers 2A are formed at regular intervals on one surface of each plate-like portion 1A of the frame F.
- a par-shaped resistor assembly A 5 ′ is formed.
- An insulating layer 2B to be a second insulating layer 2B is also formed on a pair of side surfaces 10c of each plate-shaped portion 1A.
- An insulating layer to be the third insulating layer 2C is also formed on the surface.
- the frame F has the same configuration as that described with reference to FIG. 8A and FIG. 8B, and FIG. 11C and FIG. 11D are used to form the insulating layer 2B ′. The same method as described with reference can be used.
- the resistor assembly A5' is cut at a plurality of locations indicated by imaginary lines C7. This allows multiple chip resistors A 5 Is properly manufactured.
- the chip resistor A6 shown in FIG. 29 has a configuration in which the pair of side surfaces 10c of the resistor 1 is not covered with the insulating layer. However, each electrode 3 of the chip resistor A 6 is separated from the edge 1 a of the back surface 10 a of the resistor 1 by an appropriate distance L 3, and the width L 2 of each electrode 3 is narrowed. It is planned. Therefore, in this chip resistor A 6, similarly to the description of the chip resistor A 5, the solder used for mounting is either in the inner edge portion or the outer edge portion of each electrode 3. There is an advantage that the error in the resistance value at that time can be reduced even if the portion is biased, and the present invention may be configured as shown in the chip resistor A6.
- the above-described chip resistor A6 is different from the chip resistor A5 only in that the chip resistor A6 does not include the second insulating layer 2B. Therefore, the chip resistor A 6 can be easily manufactured by employing the manufacturing method described with reference to FIG. However, in that case, the insulating layer 2B 'is not formed on the frame F.
- an intermediate product as shown in FIG. 3OA is manufactured.
- This intermediate product has the same configuration as that shown in FIG. 16A.
- One side 10a of the plate P1 has a plurality of striped insulating layers 2A 'and conductive layers formed between them.
- a layer 3A 'and a solder layer 39A' are formed.
- the intermediate product is repeatedly subjected to punching (plating) to divide the plate P1 into a plurality of chip-shaped resistors 1.
- the part with the pattern is a part corresponding to the insulating layer 2A '.
- the punched area is indicated by a virtual line, and as shown in the figure, the punching of the plate P1 is performed in such a manner that a plurality of punched areas are arranged in a matrix at an appropriate interval L4. To I will proceed. In this way, a plurality of chip resistors A 6 can be appropriately taken from the plate P 1.
- a punching means may be employed as a means for dividing the plate P1 into a plurality of resistors 1. According to the punching means using a mold, it is possible to finish the vertical and horizontal dimensions of the resistor 1 to an accurate size with almost no error with respect to the mold. Also, if the above-mentioned punching operation is performed repeatedly using one punching die, unlike the case where a plurality of punching dies are used alternately, there is no manufacturing error due to a variation in the dimensions of the multiple punching dies. .
- the chip resistor A7 shown in FIG. 31A and FIG. 31B has the first insulating layer 2A formed in a substantially cross shape, so that the back surface 10a of the resistor 1 Four electrodes 3 are provided.
- This chip resistor A7 can be used, for example, as follows. That is, of the four electrodes 3, two electrodes 3 are used as a pair of current electrodes, and the remaining two electrodes 3 are used as a pair of voltage electrodes. When the current of the electric circuit is detected, the pair of current electrodes 3 is electrically connected to the electric circuit so that the electric current of the electric circuit flows. A voltmeter is connected to the pair of voltage electrodes 3. Since the resistance value of chip resistor A7 is known, when the voltage drop across resistor 1 of chip resistor A7 is measured using the voltmeter, the measured value is applied to the ohm equation. Thus, the value of the current flowing through the resistor 1 can be accurately known. Since the arrangement of the four electrodes 3 is symmetric, even if the chip resistor A 7 is mounted by being rotated by 180 °, no trouble can be caused.
- an insulating layer 2A ′ serving as a first insulating layer 2A is formed on one surface of a plate-shaped portion 1A of a frame F.
- a bar-shaped resistor assembly A7' is formed.
- the portion of the resistor assembly A7 'indicated by the imaginary line C8 in the figure is cut.
- an insulating layer 2A ′ and a conductive layer 3A ′ are formed on a plate P1, and a portion indicated by a virtual line in FIG. A means for punching the plate P1 may be used.
- Punching instead of the above method, means for cutting the location indicated by the imaginary line using a cutting device such as a shear (shearing machine) or a rotary cutter may be employed.
- a shear shearing machine
- a rotary cutter may be employed.
- a chip resistor in which the second insulating layer 2B is not formed on the side surface 10c of the resistor 1 is manufactured.
- the work of forming the second insulating layer 2B is performed thereafter.
- the chip resistor A7 can be manufactured using the frame F shown in FIGS. 8A and 8B. This is the same for the chip resistors of the following embodiments.
- the present invention may have a configuration in which two (four) electrodes are provided on the resistor.
- the number of the electrodes 3 may be larger than that of the first embodiment. If the total number of electrodes of the chip resistor is increased, for example, only some of the electrodes may be used in any manner.
- the chip resistor A 8 shown in FIGS. 33A and 33B has four electrodes 3 (3 a, 3 b) on the back surface 10 a of the resistor 1, like the chip resistor A 7. ( However, the two electrodes 3a are separated from the edge 1a of the back surface 10a by an appropriate distance L5. Similarly, the two electrodes 3b are also appropriate from the edge 1a. ( To manufacture the chip resistor Aa, for example, as shown in FIG. 33C, the insulating layer 2A 'and the conductive layer 3A' are formed on one side of the plate P1. When forming, the plate P1 should be formed in the shape as shown in the figure and the plate P1 should be cut at the location indicated by the imaginary line.
- each of the electrodes 3 is separated from the edge 1a, so that their width L6 is thin. Therefore, even if the mounting solder adheres to the inner edge or the outer edge of each electrode 3, no large variation occurs in the resistance value.
- the chip resistor A9 shown in FIGS. 34A and 34B has a pair of two electrodes 3a and two electrodes 3b, similarly to the previous chip resistor A8. are doing. However, the electrode 3a and the electrode 3b are different from each other in shape, size, and dimensions L7 and L8 between the electrodes.
- the electrode 3 b is separated from the edge 1 a of the back surface 10 a of the resistor 1, whereas the electrode 3 a is not arranged in such a manner, and the electrode 3 b is The width is smaller than a.
- the chip resistor A8 for example, as shown in FIG. 34C, when an insulating layer 2A 'and a conductive layer 3A' are formed on one side of a plate P1, these are illustrated. What is necessary is just to cut
- the two electrodes 3a and the two electrodes 3 b are paired with each other, and the electrodes 3a and 3b have different shapes and sizes from each other.
- the electrode 3b has a rectangular shape with a small width
- the electrode 3a has a non-rectangular shape with a wider width.
- FIG. 35C when an insulating layer 2 A ′ and a conductive layer 3 A ′ are formed on one side of a plate P 1, these are illustrated. What is necessary is just to cut
- a pair of narrow electrodes 3b are used as electrodes for voltage, and a pair of wide electrodes 3a are used as electrodes for current. Since the voltage electrode is used to accurately measure the voltage drop, if a pair of narrow electrodes 3b is used as the voltage electrode, it is possible to obtain the accurate voltage drop. Become. As understood from these embodiments, in the present invention, a plurality of electrodes may be formed in irregular shapes and sizes.
- the present invention is not limited to the contents of the above-described embodiment.
- the specific configuration of each part of the frame used for manufacturing the chip resistor and the chip resistor according to the present invention can be variously changed in design.
- the specific configuration of each step of the method for manufacturing a chip resistor according to the present invention can be variously changed.
- the forming operation is easy and preferable.
- the present invention is not limited to this, and another method may be used.
- the solder layer may be formed by a method, for example, in which a desired portion of the resistor material is brought into contact with the molten solder instead of the plating process.
- Insulated to resistor As a means for forming the layer, instead of printing, means such as transfer of resin or sticking of a resin material can be adopted.
- the chip resistor according to the present invention is suitable when configured as a low resistor, but the specific resistance value is not limited.
- the frame used for the manufacture of the chip resistor is shown in Fig. 36A. It is also possible to adopt a form in which a plurality of plate-like portions 1A are supported in a cantilever manner on the support portion 19, The plate-like portions 1A do not necessarily have to be supported at both ends by the support portions 19. Also, as shown in FIG. 36B, when the connecting portion 17 between the plate portion 1A and the support portion 19 is formed to be narrow, the connecting portion 17 is connected to a position deviated from the center in the width direction of the plate portion 1A. A configuration in which the part 17 is provided may be employed.
- the material of the frame and the specific size of the plate-like portion are items that can be appropriately selected according to the specifications of the chip resistor to be finally manufactured.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/533,489 US7612429B2 (en) | 2002-10-31 | 2003-10-30 | Chip resistor, process for producing the same, and frame for use therein |
CN200380102422.XA CN1708814B (zh) | 2002-10-31 | 2003-10-30 | 芯片电阻器、其制造方法以及该制造方法中使用的框架 |
Applications Claiming Priority (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002318648A JP2004153160A (ja) | 2002-10-31 | 2002-10-31 | チップ抵抗器およびその製造方法 |
JP2002-318648 | 2002-10-31 | ||
JP2002348884A JP3848245B2 (ja) | 2002-11-29 | 2002-11-29 | チップ抵抗器 |
JP2002-348883 | 2002-11-29 | ||
JP2002348883A JP3653076B2 (ja) | 2002-11-29 | 2002-11-29 | チップ抵抗器の製造方法およびそれに用いられるフレーム |
JP2002-348884 | 2002-11-29 | ||
JP2002-353514 | 2002-12-05 | ||
JP2002353514A JP3848247B2 (ja) | 2002-12-05 | 2002-12-05 | チップ抵抗器およびその製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2004040592A1 true WO2004040592A1 (ja) | 2004-05-13 |
Family
ID=32234311
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2003/013964 WO2004040592A1 (ja) | 2002-10-31 | 2003-10-30 | チップ抵抗器、その製造方法およびその製造方法に用いられるフレーム |
Country Status (2)
Country | Link |
---|---|
US (1) | US7612429B2 (ja) |
WO (1) | WO2004040592A1 (ja) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4358664B2 (ja) * | 2004-03-24 | 2009-11-04 | ローム株式会社 | チップ抵抗器およびその製造方法 |
US7397323B2 (en) * | 2006-07-12 | 2008-07-08 | Wide Sky Technology, Inc. | Orthomode transducer |
WO2009028215A1 (ja) | 2007-08-30 | 2009-03-05 | Kamaya Electric Co., Ltd. | 金属板チップ抵抗器の製造方法及び製造装置 |
KR101102891B1 (ko) * | 2007-09-04 | 2012-01-10 | 삼성전자주식회사 | 배선구조 및 이를 이용한 박막 트랜지스터 |
TWI397929B (zh) * | 2009-02-27 | 2013-06-01 | Kamaya Electric Co Ltd | Method for manufacturing low - resistance sheet resistors for metal plates |
JP6134507B2 (ja) | 2011-12-28 | 2017-05-24 | ローム株式会社 | チップ抵抗器およびその製造方法 |
US20130196539A1 (en) * | 2012-01-12 | 2013-08-01 | John Mezzalingua Associates, Inc. | Electronics Packaging Assembly with Dielectric Cover |
JP2013232620A (ja) | 2012-01-27 | 2013-11-14 | Rohm Co Ltd | チップ部品 |
JP6259184B2 (ja) | 2012-02-03 | 2018-01-10 | ローム株式会社 | チップ部品およびその製造方法 |
JP6144136B2 (ja) * | 2013-07-17 | 2017-06-07 | Koa株式会社 | チップ抵抗器の製造方法 |
WO2015019590A1 (ja) | 2013-08-07 | 2015-02-12 | パナソニックIpマネジメント株式会社 | 抵抗器およびその製造方法 |
JP7018251B2 (ja) * | 2015-05-21 | 2022-02-10 | ローム株式会社 | チップ抵抗器 |
CN109690703B (zh) | 2016-12-16 | 2021-06-04 | 松下知识产权经营株式会社 | 芯片电阻器及其制造方法 |
JP6983527B2 (ja) * | 2017-03-30 | 2021-12-17 | Koa株式会社 | 電流検出用抵抗器 |
WO2018216455A1 (ja) * | 2017-05-23 | 2018-11-29 | パナソニックIpマネジメント株式会社 | 金属板抵抗器およびその製造方法 |
EP3451352B1 (en) * | 2017-08-28 | 2020-05-27 | Hochschule Für Angewandte Wissenschaften München | High-precision additive formation of electrical resistors |
WO2019107188A1 (ja) | 2017-12-01 | 2019-06-06 | パナソニックIpマネジメント株式会社 | 金属板抵抗器およびその製造方法 |
TWI718971B (zh) * | 2020-07-07 | 2021-02-11 | 旺詮股份有限公司 | 大批量產生微型電阻元件的製作方法 |
TWI718972B (zh) * | 2020-07-07 | 2021-02-11 | 旺詮股份有限公司 | 具有精準電阻值之微型電阻元件的製作方法 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4727876Y1 (ja) * | 1969-10-11 | 1972-08-24 | ||
JPS50128657U (ja) * | 1974-04-06 | 1975-10-22 | ||
JPH0729704A (ja) * | 1993-07-09 | 1995-01-31 | Mitsubishi Materials Corp | チップ型サーミスタ及びその製造方法 |
JPH10135013A (ja) * | 1996-10-31 | 1998-05-22 | Taiyo Yuden Co Ltd | チップ部品の製造方法 |
JP2002208502A (ja) * | 2001-01-12 | 2002-07-26 | Koa Corp | チップ抵抗器及びその製造方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4727876U (ja) | 1971-04-10 | 1972-11-29 | ||
JPS50128657A (ja) | 1974-03-29 | 1975-10-09 | ||
US4706060A (en) * | 1986-09-26 | 1987-11-10 | General Electric Company | Surface mount varistor |
NL8800156A (nl) * | 1988-01-25 | 1989-08-16 | Philips Nv | Chipweerstand en werkwijze voor het vervaardigen van een chipweerstand. |
US5170146A (en) * | 1991-08-01 | 1992-12-08 | Motorola, Inc. | Leadless resistor |
JP3294331B2 (ja) * | 1992-08-28 | 2002-06-24 | ローム株式会社 | チップ抵抗器及びその製造方法 |
US5339068A (en) * | 1992-12-18 | 1994-08-16 | Mitsubishi Materials Corp. | Conductive chip-type ceramic element and method of manufacture thereof |
JP4138215B2 (ja) | 2000-08-07 | 2008-08-27 | コーア株式会社 | チップ抵抗器の製造方法 |
JP3935687B2 (ja) * | 2001-06-20 | 2007-06-27 | アルプス電気株式会社 | 薄膜抵抗素子およびその製造方法 |
JP4761662B2 (ja) * | 2001-07-17 | 2011-08-31 | 三洋電機株式会社 | 回路装置の製造方法 |
-
2003
- 2003-10-30 WO PCT/JP2003/013964 patent/WO2004040592A1/ja active Application Filing
- 2003-10-30 US US10/533,489 patent/US7612429B2/en not_active Expired - Lifetime
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4727876Y1 (ja) * | 1969-10-11 | 1972-08-24 | ||
JPS50128657U (ja) * | 1974-04-06 | 1975-10-22 | ||
JPH0729704A (ja) * | 1993-07-09 | 1995-01-31 | Mitsubishi Materials Corp | チップ型サーミスタ及びその製造方法 |
JPH10135013A (ja) * | 1996-10-31 | 1998-05-22 | Taiyo Yuden Co Ltd | チップ部品の製造方法 |
JP2002208502A (ja) * | 2001-01-12 | 2002-07-26 | Koa Corp | チップ抵抗器及びその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
US7612429B2 (en) | 2009-11-03 |
US20060097340A1 (en) | 2006-05-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2004040592A1 (ja) | チップ抵抗器、その製造方法およびその製造方法に用いられるフレーム | |
TWI260650B (en) | Chip resistor and its manufacturing method | |
US7327214B2 (en) | Chip resistor and method of making the same | |
JP4047760B2 (ja) | チップ抵抗器およびその製造方法 | |
JP3848286B2 (ja) | チップ抵抗器 | |
JP3971335B2 (ja) | チップ抵抗器およびその製造方法 | |
JP2011114038A (ja) | 抵抗器の抵抗値調整方法 | |
JP4460564B2 (ja) | チップ抵抗器 | |
JP3848247B2 (ja) | チップ抵抗器およびその製造方法 | |
JP3930390B2 (ja) | チップ抵抗器の製造方法 | |
JP3848245B2 (ja) | チップ抵抗器 | |
JP5242614B2 (ja) | チップ抵抗器およびその製造方法 | |
JP5037288B2 (ja) | チップ抵抗器およびその製造方法 | |
JP3653076B2 (ja) | チップ抵抗器の製造方法およびそれに用いられるフレーム | |
JP5490861B2 (ja) | チップ抵抗器およびその製造方法 | |
JP2004153160A (ja) | チップ抵抗器およびその製造方法 | |
JPH10223401A (ja) | 抵抗器およびその製造方法 | |
JP2006157064A (ja) | チップ抵抗器およびその製造方法 | |
JP2002324701A (ja) | チップ部品およびチップ部品の製造方法 | |
JP2000188202A (ja) | チップ抵抗器及びその製造方法 | |
JP2009016472A (ja) | チップ型抵抗器の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): CN US |
|
ENP | Entry into the national phase |
Ref document number: 2006097340 Country of ref document: US Kind code of ref document: A1 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 10533489 Country of ref document: US |
|
WWE | Wipo information: entry into national phase |
Ref document number: 20038A2422X Country of ref document: CN |
|
WWP | Wipo information: published in national office |
Ref document number: 10533489 Country of ref document: US |