CN103227115B - 引线框及其制造方法和半导体装置及其制造方法 - Google Patents

引线框及其制造方法和半导体装置及其制造方法 Download PDF

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Publication number
CN103227115B
CN103227115B CN201310031813.2A CN201310031813A CN103227115B CN 103227115 B CN103227115 B CN 103227115B CN 201310031813 A CN201310031813 A CN 201310031813A CN 103227115 B CN103227115 B CN 103227115B
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CN
China
Prior art keywords
inclined side
lead frame
recess
concave portion
chip mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
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CN201310031813.2A
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English (en)
Chinese (zh)
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CN103227115A (zh
Inventor
宫尾仁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Co Ltd
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Shinko Electric Co Ltd
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Publication date
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Publication of CN103227115A publication Critical patent/CN103227115A/zh
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/063—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/04—Manufacture or treatment of leadframes
    • H10W70/048—Mechanical treatments, e.g. punching, cutting, deforming or cold welding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
CN201310031813.2A 2012-01-31 2013-01-28 引线框及其制造方法和半导体装置及其制造方法 Active CN103227115B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012018461A JP5833459B2 (ja) 2012-01-31 2012-01-31 リードフレーム及びその製造方法と半導体装置及びその製造方法
JP2012-018461 2012-01-31

Publications (2)

Publication Number Publication Date
CN103227115A CN103227115A (zh) 2013-07-31
CN103227115B true CN103227115B (zh) 2017-04-12

Family

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CN201310031813.2A Active CN103227115B (zh) 2012-01-31 2013-01-28 引线框及其制造方法和半导体装置及其制造方法

Country Status (5)

Country Link
US (1) US8778739B2 (https=)
JP (1) JP5833459B2 (https=)
KR (1) KR101957257B1 (https=)
CN (1) CN103227115B (https=)
TW (1) TWI574366B (https=)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112014006397B4 (de) * 2014-02-24 2022-11-17 Mitsubishi Electric Corporation Leistungshalbleitermodul und Leistungseinheit
JP6408431B2 (ja) * 2015-06-11 2018-10-17 Ｓｈプレシジョン株式会社 リードフレーム、リードフレームの製造方法、および半導体装置
JP2017208486A (ja) * 2016-05-19 2017-11-24 株式会社ミスズ工業 表面に凹凸を有する金属部材、ヒートスプレッダ、半導体パッケージ及びそれらの製造方法
TWI623076B (zh) * 2016-11-02 2018-05-01 Fusheng Electronics Corporation 導線架製作方法
US10998255B2 (en) 2018-07-12 2021-05-04 Nxp Usa, Inc. Overmolded microelectronic packages containing knurled flanges and methods for the production thereof
TWI690045B (zh) * 2018-08-03 2020-04-01 欣興電子股份有限公司 構裝結構、其接合方法及用於其的線路板
WO2020053728A2 (en) * 2018-09-11 2020-03-19 Rjr Technologies, Inc. Air cavity package with improved connections between components
JP2021034705A (ja) * 2019-08-29 2021-03-01 Ｊｘ金属株式会社 金属板、金属樹脂複合体、半導体デバイス及び、金属板の製造方法
WO2024090029A1 (ja) * 2022-10-25 2024-05-02 富士電機株式会社 半導体モジュール、半導体装置、及び車両

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04117454U (ja) * 1991-03-29 1992-10-21 サンケン電気株式会社 絶縁物被覆電子部品
JPH07161896A (ja) * 1993-12-02 1995-06-23 Hitachi Cable Ltd リードフレームとその製造方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6378558A (ja) * 1986-09-22 1988-04-08 Hitachi Ltd 電子装置
JPS6442847A (en) * 1987-08-10 1989-02-15 Toshiba Corp Lead frame
JPH077122A (ja) * 1993-06-17 1995-01-10 Fujitsu Ltd Ｉｃパッケージ
JP3339173B2 (ja) 1994-04-01 2002-10-28 松下電器産業株式会社 リードフレーム及びその製造方法及びそれを用いた半導体装置
JPH0864739A (ja) * 1994-08-24 1996-03-08 Hitachi Cable Ltd ディンプル加工を施したリードフレームの製造方法及びそのディンプル加工金型
JPH0864749A (ja) * 1994-08-25 1996-03-08 Hitachi Cable Ltd リードフレーム
US6294409B1 (en) * 2000-01-27 2001-09-25 Siliconware Precisionware Industries Co., Ltd. Method of forming a constricted-mouth dimple structure on a leadframe die pad
US7091602B2 (en) 2002-12-13 2006-08-15 Freescale Semiconductor, Inc. Miniature moldlocks for heatsink or flag for an overmolded plastic package
US7109570B2 (en) * 2003-09-08 2006-09-19 United Test And Assembly Test Center Ltd. Integrated circuit package with leadframe enhancement and method of manufacturing the same
US7476602B2 (en) * 2005-01-31 2009-01-13 Texas Instruments Incorporated N2 based plasma treatment for enhanced sidewall smoothing and pore sealing porous low-k dielectric films
JP2009260282A (ja) 2008-03-18 2009-11-05 Panasonic Corp パッケージ用リードフレーム
US7955954B2 (en) * 2008-04-14 2011-06-07 Infineon Technologies Ag Method of making semiconductor devices employing first and second carriers

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04117454U (ja) * 1991-03-29 1992-10-21 サンケン電気株式会社 絶縁物被覆電子部品
JPH07161896A (ja) * 1993-12-02 1995-06-23 Hitachi Cable Ltd リードフレームとその製造方法

Also Published As

Publication number Publication date
JP2013157536A (ja) 2013-08-15
US8778739B2 (en) 2014-07-15
TW201347123A (zh) 2013-11-16
KR101957257B1 (ko) 2019-03-13
KR20130088773A (ko) 2013-08-08
TWI574366B (zh) 2017-03-11
JP5833459B2 (ja) 2015-12-16
US20130193567A1 (en) 2013-08-01
CN103227115A (zh) 2013-07-31

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