TWI690045B - 構裝結構、其接合方法及用於其的線路板 - Google Patents

構裝結構、其接合方法及用於其的線路板 Download PDF

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TWI690045B
TWI690045B TW107127118A TW107127118A TWI690045B TW I690045 B TWI690045 B TW I690045B TW 107127118 A TW107127118 A TW 107127118A TW 107127118 A TW107127118 A TW 107127118A TW I690045 B TWI690045 B TW I690045B
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substrate
adhesive layer
conductive pillars
layer
pad
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TW107127118A
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English (en)
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TW202008539A (zh
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曾子章
柯正達
楊凱銘
陳裕華
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欣興電子股份有限公司
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Priority to TW107127118A priority Critical patent/TWI690045B/zh
Priority to US16/152,424 priority patent/US10756050B2/en
Priority to US16/746,968 priority patent/US10993332B2/en
Publication of TW202008539A publication Critical patent/TW202008539A/zh
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Publication of TWI690045B publication Critical patent/TWI690045B/zh

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Abstract

一種構裝結構，包括第一基板、第二基板、多個導電柱 以及黏著層。第一基板包括多個盲孔以及多個接墊。這些接墊設置於第一基板上，且填入這些盲孔。第二基板相對於第一基板設置。各導電柱電性連接各接墊以及第二基板，且各導電柱填滿各盲孔。黏著層設置於第一基板與第二基板之間，且黏著層填滿這些導電柱之間的間隙。一種構裝結構的接合方法及用於其的線路板亦被提出。

Description

構裝結構、其接合方法及用於其的線路板
本發明是有關於一種構裝技術，且特別是有關於一種構裝結構與其接合方法。
隨著電子構裝(electronic assembly)技術的演進，電子裝置(Electronic device)已開發出不同的構裝型態，例如：打線式(Wire bonding)、覆晶式(flip chip)或混合式(hybrid，即覆晶式配合打線式)。不過上述使用焊球的接合技術，其接合面容易因長時間產生疲勞而分離、焊球在製程中容易產生缺陷影響可靠度、且接點的阻值較高。
目前已有使用銅結構進行接合的晶片封裝技術，其利用壓合的方式進行晶片與封裝承載板之間的接合。然而，現行銅接合所能達到的實施條件為溫度300℃至450℃且需高達300MPa的壓力，且接合後通常需要退火處理。此外，於接合前，銅結構的表面需要良好清潔且須透過化學研磨製程(CMP)以得到平整 的表面，因此製程複雜，且無法減少製造成本。另外，在縮小封裝結構體積以及精細化接點的情況下，於接合後填入底填膠(underfill)已無法確實地覆蓋接點，進而降低接合品質與可靠度。
本發明提供一種構裝結構，適於進行低溫接合組裝，並具有良好的接合強度以及接合品質。
本發明提供一種構裝結構的接合方法，適於降低製程的需求，並減少製造成本、提升構裝結構的品質與可靠度。
本發明的構裝結構包括第一基板、第二基板、多個導電柱以及黏著層。第一基板包括多個盲孔以及多個接墊。這些接墊設置於第一基板上，且填入這些盲孔。第二基板相對第一基板設置。各導電柱電性連接這些接墊以及第二基板。各導電柱填滿各盲孔。黏著層設置於第一基板與第二基板之間。黏著層填滿這些導電柱之間的間隙。
在本發明的一實施例中，上述的各接墊與各盲孔共形。
在本發明的一實施例中，上述的各接墊具有凹陷，且各導電柱電性連接各凹陷。
在本發明的一實施例中，上述的黏著層包括非光敏黏合劑或光敏黏劑的其中一者。
在本發明的一實施例中，上述的構裝結構更包括平坦層以及高分子黏合層。平坦層設置於第二基板上，且位於第二基板 與這些導電柱之間。高分子黏合層設置於黏著層上，並填滿這些導電柱之間的間隙。
本發明的構裝結構的接合方法，其包括以下步驟。提供第一基板，在第一基板中形成多個盲孔。設置多個接墊於第一基板上，各接墊填入各盲孔。提供第二基板，在第二基板上形成多個導電柱。設置一黏著層於第一基板與第二基板之間，且黏著層填滿這些導電柱之間的間隙。以及，壓合這些導電柱至這些接墊，以使各導電柱電性連接各接墊並填滿各盲孔。
在本發明的一實施例中，上述的在第一基板中形成這些盲孔的步驟包括，提供第一基底並在第一基底上形成介電材料。以及，圖案化介電材料以形成具有這些盲孔的介電層，並暴露出部份第一基底。
在本發明的一實施例中，上述的設置這些接墊於第一基板上的步驟包括，形成界面層於介電層上，並填入這些盲孔。形成覆蓋界面層的圖案化保護層，以暴露出填入這些盲孔中的部分界面層。自暴露出的部分界面層形成這些接墊。以及，移除圖案化保護層以及圖案化保護層所覆蓋的界面層。
在本發明的一實施例中，上述的構裝結構的接合方法更包括，形成凹陷於各接墊上，且各導電柱電性連接各凹陷。
在本發明的一實施例中，上述的構裝結構的接合方法更包括，設置平坦層與第二基板上，其中平坦層位於第二基板與導電柱之間。以及，設置高分子黏合層於黏著層上，其中高分子黏 合層填滿這些導電柱之間的間隙。
基於上述，本發明的構裝結構及其接合方法，能在第一基板壓合至第二基板前，設置黏著層於第一基板與第二基板之間。在壓合後，黏著層可以填滿第一基板與第二基板之間的間隙，並填滿多個導電柱之間的間隙，以在精細化接點的條件下，達到密封保護的效果、良好的接合強度以及接合品質。此外，在壓合期間，本發明的導電柱與接墊之間於接觸時能產生一應力集中點，故能有效降低壓合的製程溫度和壓力，適於進行低溫接合組裝。本發明的構裝結構的接合方法，相較於習知的接合技術，適於降低製程的需求、減少製造成本、提升構裝結構的品質與可靠度。另外，導電柱還可以填滿盲孔，並與接墊達成良好的電性連接，使構裝結構具有優良的電氣特性，進一步提升構裝結構的品質。
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
10:封裝結構
100:第一基板
110:第一基底
120:線路層
130:介電層
130’:介電材料
132:盲孔
140:界面層
142、142A、142B:接墊
144:凹陷
150:圖案化光阻層
200:第二基板
210:平坦層
220:導電柱
300、300’、300A、300B、300C、310:黏著層
320:高分子黏合層
圖1A至圖1H是本發明一實施例的一種構裝結構的接合方法中第一基板的製造流程剖面示意圖。
圖2A至2B是本發明一實施例的一種構裝結構的接合方法中壓合流程的剖面示意圖。
圖3A是本發明一實施例的接墊的局部放大剖面示意圖。
圖3B是本發明另一實施例的接墊的局部放大剖面示意圖。
圖3C是本發明另一實施例的界面層的局部放大剖面示意圖。
圖3D是本發明另一實施例的接墊的局部放大剖面示意圖。
圖4A是本發明一實施例的黏著層的剖面示意圖。
圖4B是本發明另一實施例的黏著層的剖面示意圖。
圖4C是本發明另一實施例的黏著層的剖面示意圖。
圖4D是本發明另一實施例的黏著層的剖面示意圖。
圖5是本發明又一實施例的黏著層的剖面示意圖。
圖6是本發明另一實施例的第二基板的剖面示意圖。
圖7是本發明又一實施例的第二基板的剖面示意圖。
下文列舉一些實施例並配合所附圖式來進行詳細地說明，但所提供的實施例並非用以限制本發明所涵蓋的範圍。此外，圖式僅以說明為目的，並未依照原尺寸作圖。為了方便理解，下述說明中相同的元件將以相同之符號標示來說明。
另外，關於文中所使用之「第一」、「第二」...等用語，並非表示順序或順位的意思，應知其是為了區別以相同技術用語描述的元件或操作。
其次，在本文中所使用的用詞「包含」、「包括」、「具有」等等，均為開放性的用語；也就是指包含但不限於。
再者，在本文中所使用的用詞「接觸」、「相接」、「接合」等等，如無特別說明，則可代表直接接觸或者透過其他膜層間接地接觸。
圖1A至圖1H是本發明一實施例的一種構裝結構的接合方法中第一基板的製造流程剖面示意圖。請參考圖1A至圖1C，在本實施例中，首先提供第一基板100，並在第一基板100中形成多個盲孔132(繪示於圖1C中)。詳細而言，請先參考圖1A，在第一基板100中形成多個盲孔132的步驟包括先提供第一基底110。第一基底110的材料可包括玻璃、陶瓷、高分子材料或矽，例如是多晶矽(Poly-silicon)、碳化矽(Silicon carbide，SiC)、石墨烯(Graphene)、氮化鋁(Aluminium Nitride，AlN)或其他適用材質，但不以此為限制。
在本實施例中，第一基板100例如是具有線路層120的線路載板(wiring carrier)。舉例而言，線路層120設置於第一基底110上。如圖1A所示，線路層120例如是多層堆疊的重配置線路層。重配置線路層可為由絕緣層、配置在絕緣層的相對兩側的兩圖案化線路及貫穿絕緣層並連通至兩圖案化線路的導電孔所構成的多層線路，亦可為單層線路或具有其他組成方式的多層線路，但本發明不以此為限。在其他實施例中，第一基板100也可以為不具有線路層的載板。
接著，請參考圖1B，在第一基底110上形成介電材料130’。介電材料130’包括無機材料(例如：氧化矽、氮化矽、氮 氧化矽、其他合適的材料、或上述至少二種材料的堆疊層)、有機材料(例如：聚醯亞胺(polyimide,PI)、聚苯唑(PBO)、矽利康(Silicone)、環氧樹脂(Epoxy)、苯並環丁烯(BCB)等其他合適的材料、或上述至少二種材料的堆疊層)、或其他合適的材料、或上述之組合。
接著，請參考圖1C，對介電材料130’進行圖案化以形成具有多個盲孔132的介電層130。舉例而言，於介電材料130’上形成圖案化罩幕層(未繪示)。之後，以圖案化罩幕層為罩幕，進行微影製程，以於介電層130中形成多個盲孔132。盲孔132暴露出部份第一基底110的表面。
然後，請先參考圖1G，設置多個接墊142於第一基板100上，且各接墊142填入各盲孔132。詳細而言，本實施例中設置多個接墊142於第一基板100上的步驟包括，首先，請參考圖1D，形成界面層140於圖案化後的介電層130上，並填入多個盲孔132。介面層140可以共形地(conformally)覆蓋圖案化的介電層130。在本實施例中，界面層140可以是晶種層(seed layer)，其材料包括金屬材料、金屬氮化物、金屬矽化物或其組合。所述金屬材料可例如是鈦、銅、鎳、鈀、金、銀或其合金，但本發明不以此為限。界面層140的形成方法包括物理氣相沈積法、化學氣相沉積法、電鍍製程或化學鍍(electroless plating)製程，所述物理氣相沈積法可例如是濺鍍法或蒸鍍法，但本發明不以此為限。
接著，請參考圖1E，形成覆蓋界面層140的圖案化光阻 層150。詳細而言，於界面層140上形成光阻材料(未繪示)。之後，進行微影製程，以圖案化光阻材料形成圖案化光阻層150。在本實施例中，圖案化光阻層150暴露出填入多個盲孔132中的部分界面層140，但本發明不以此為限，可以視使用者於設計上的需求進行調整。
在其他實施例中，也可使用光可成像介電(photoimageable dielectric,PID)材料作為圖案化光阻材料，即可藉由曝光與顯影而形成圖案化光阻層150。
之後，請參考圖1F，再進行電鍍製程或化學鍍製程，以自暴露出的部分界面層140形成接墊142。在本實施例中，接墊142的材料包括金屬材料。所述金屬材料可例如是鈦、銅、鎳、鈀、金、銀或其合金。順帶一提的是，於形成接墊142後，界面層140可視為接墊142的一部分並做為第一基板100的墊層以在後續步驟中與導電柱220(繪示於圖2B)電性連接。因此，圖1F中並未繪示被圖案化光阻層150所暴露出的介面層140。
然後，請參考圖1G，移除圖案化光阻層150以及圖案化光阻層150所覆蓋的界面層140。移除界面層140的方法包括蝕刻製程，但本發明不以此為限。至此，已大致完成第一基板100的製作。
在其他實施例中，還可選擇性地設置一層黏著層300’於完成後的第一基板100上。請參考圖1G及1H，在本實施例中，於完成第一基板100的製作後，可將黏著層300’設置於介電層130 上。具體而言，黏著層300’不覆蓋多個接墊142，且位於多個接墊142之間的間隙。在上述的設計下，黏著層300’可在進行後續的壓合製程前先填入接墊142之間，以在接點精細化的需求下，提供各接墊142良好的保護，並提供良好的接合強度以及可靠度。
圖2A至2B是本發明一實施例的一種構裝結構的接合方法中壓合流程的剖面示意圖。在完成圖1G的第一基板100之後，請參考圖2A。首先，提供第二基板200。然後，在第二基板200上形成多個導電柱220。在本實施例中，更包括設置平坦層210於第二基板200上，且平坦層210位於第二基板200與多個導電柱220之間。第二基板200可例如為晶片、線路載板(wiring carrier)、印刷電路板(PCB)或其他電子元件，但本發明不以此為限。導電柱220可為一般習知晶片上的電鍍凸塊或結線凸塊，用以接觸第二基板200，其材料與接墊142可以相同，包括金屬材料。所述金屬材料可例如是鈦、銅、鎳、鈀、金、銀或其合金。在上述的設置下，第二基板200能於後續步驟中，透過導電柱220以電性連接至接墊142。
接著，設置黏著層300A於第一基板100與第二基板200之間。在此須說明的是，圖2A所示的黏著層300A與圖1H所示的黏著層300’的材料可以相同，且具有相似的效果。在本實施例中，黏著層300’、300A的材料包括非光敏黏合劑或光敏黏合劑的其中一者。所述非光敏黏合劑包括環氧樹脂、丙烯酸系樹脂、聚醯亞胺(polyimide,PI)、聚苯唑(PBO)、矽利康(Silicone)、環 氧樹脂(Epoxy)、苯並環丁烯(BCB)等黏著層300’、300A可以視使用者於設計上的需求進行調整，而不特別限定是先形成於第一基板100或第二基板200上。以下將以黏著層300A形成於第二基板200上為例進行說明。
在本實施例中，黏著層300A係一層覆蓋第二基板200以及多個導電柱220的膜層。詳細而言，黏著層300A覆蓋多個導電柱220，並填滿多個導電柱220之間的間隙，但本發明不以此為限。之後，將多個導電柱220與對應的多個接墊142對準。
然後，請參考圖2B，壓合多個導電柱220至多個接墊142，以使各導電柱220電性連接各接墊142並填滿各盲孔132。壓合後，導電柱220可以填滿盲孔132並完成與接墊142的電性連接。黏著層300A可以填滿第一基板100與第二基板200之間的間隙，並填滿多個導電柱220之間的間隙，以達到密封保護導電柱220與接墊142的效果，以及提供第一基板100與第二基板200之間良好的接合強度及接合品質。順帶一提的是，於壓合後，覆蓋各導電柱220的部分黏著層300A可大致地從各導電柱220與對應的各接墊142的交接處被排開。因此，黏著層300A不會實質地影響導電柱220與接墊142之間的電性連接。至此，已完成構裝結構10的接合。
值得注意的是，在本實施例中，壓合的溫度可以小於200℃，且可以在常壓的環境下進行。相較於習知的銅對銅進行接合的製程，本實施例的導電柱220在接觸到填入盲孔132中的接 墊142之後，導電柱220與接墊142之間產生一應力集中點，因此能有效降低壓合的溫度，並能降低接合所需的力量。此外，於接合前，導電柱220的表面不須先進行清潔，也不需透過化學研磨製程使其表面平坦。另外，於接合後，構裝結構10也不需經過額外的退火處理。因此，本實施例的接合方法適於降低製程的需求，並減少製造成本、提升構裝結構10的品質與可靠度。
簡言之，本發明的構裝結構10的接合方法，能在第一基板100壓合至第二基板200前，設置黏著層300A於第一基板100與第二基板200之間。在壓合後，黏著層300A可以填滿第一基板100與第二基板200之間的間隙，並填滿多個導電柱220之間的間隙，以在精細化接點的條件下，達到密封保護導電柱220與接墊142的效果，以及提供第一基板100與第二基板200之間良好的接合強度及接合品質。此外，在壓合期間，本發明的導電柱220與接墊142之間於接觸時能產生一應力集中點，故能有效降低壓合的製程溫度和壓力，適於進行低溫接合組裝。因此，本發明的構裝結構10的接合方法適於降低製程的需求、減少製造成本、提升構裝結構10的品質與可靠度。另外，導電柱220可以填滿盲孔132，並與接墊142達成良好的電性連接，更可使構裝結構10具有優良的電氣特性，進一步提升構裝結構10的品質。
在結構上，請參考圖2B，本實施例的構裝結構10包括第一基板100、第二基板200相對第一基板100設置、多個導電柱220以及黏著層300A。在本實施例中，第一基板100包括多個盲 孔132以及多個接墊142。多個接墊142設置於第一基板100上，且填入多個盲孔132。各導電柱220電性連接各接墊142以及第二基板200，且各導電柱220填滿各盲孔132。黏著層300A設置於第一基板100與第二基板200之間並填滿第一基板100與第二基板200之間的間隙，並填滿多個導電柱220之間的間隙。
簡言之，本發明的構裝結構10的黏著層300A可以填滿第一基板100與第二基板200之間的間隙，並填滿多個導電柱220之間的間隙。因此可以在精細化接點的條件下，達到密封保護導電柱220與接墊142的效果，以及提供第一基板100與第二基板200之間良好的接合強度及接合品質。另外，本發明的導電柱220與接墊142之間於接觸時能產生一應力集中點，故能有效降低壓合的製程溫度和壓力，適於進行低溫接合組裝。此外本發明的導電柱220與接墊142之間於接觸時能填滿盲孔132，並與接墊142達成良好的電性連接，可使構裝結構10具有優良的電氣特性，進一步提升構裝結構10的品質。
在此必須說明的是，下述實施例沿用前述實施例的元件標號與部分內容，其中採用相同的標號來表示相同或近似的元件，關於省略了相同技術內容的部分說明可參考前述實施例，下述實施例中不再重複贅述。
圖3A是本發明一實施例的接墊的局部放大剖面示意圖。在此需說明的是，圖3A所繪示的是導電柱220對準接墊142後，進行壓合前的示意圖。此外，為了方便說明，圖3A僅示意性 地繪示第一基板100包括第一基底110與介電層130，而省略繪示線路層120。實際上線路層120可設置或不設置於第一基底110上，本發明不以此為限。
在本實施例中，黏著層300沒有覆蓋導電柱220。具體而言，黏著層300繞覆該些導電柱220並填滿該些導電柱220之間的間隙，但本發明不以此為限。各盲孔132的壁面為傾斜面，且各盲孔132與第一基底110交接處的孔徑小於各盲孔132遠離第一基底110交接處的孔徑，但本發明不以此為限。
在本實施例中，接墊142係透過電鍍製程或化學鍍製程，自暴露出的部分界面層140(繪示於圖1F)形成，並與盲孔132共形。舉例而言，接墊142是共形地覆蓋部分圖案化的介電層130並填入盲孔132。接墊142的一部分填入盲孔132，而另一部分覆蓋介電層130的表面，但本發明不以此為限。
藉由上述的設計，本發明的導電柱220與接墊142之間於接觸時能產生一應力集中點，故能有效降低壓合的製程溫度和壓力，適於進行低溫接合組裝。此外，本發明的黏著層300設置於第一基板100與第二基板200之間。因此在後續的壓合製程後，能在精細化接點的條件下，達到密封保護的導電柱220與接墊142的效果，以及提供第一基板100與第二基板200之間良好的接合強度以及接合品質，更具有優良的電氣特性。
圖3B是本發明另一實施例的接墊的局部放大剖面示意圖。請參考圖3A及圖3B，本實施例的接墊142A與圖3A的接墊 142相似，主要的差異在於：各接墊142A具有凹陷144(dimple)，且各導電柱220電性連接各凹陷144。舉例而言，凹陷144的形成方法包括，先透過電鍍製程或化學鍍製程，形成塊狀接墊(未繪示)。接著再透過蝕刻製程圖案化塊狀接墊，以形成具有凹陷144的接墊142A。在本實施例中，各凹陷144可以對應各盲孔132形成，但本發明不以此為限。各導電柱220可以分別對準對應的凹陷144，並電性連接對應的凹陷144。藉由上述的設計，本實施例的接墊142A可獲致與上述實施例相同的效果。
圖3C是本發明另一實施例的界面層的局部放大剖面示意圖。請參考圖3A及圖3C，本實施例的界面層140與圖3A的接墊142相似，主要的差異在於：不透過電鍍製程或化學鍍製程，直接以暴露出的部分界面層140做為接墊，且界面層140與盲孔132共形。也就是說，界面層140與接墊(例如：圖3A所示的接墊142)均可做為第一基底110上的墊層。藉由上述的設計，本實施例的界面層140可獲致與上述實施例相同的效果。
圖3D是本發明另一實施例的接墊的局部放大剖面示意圖。請參考圖3A及圖3D，本實施例的接墊142B與圖3A的接墊142相似，主要的差異在於：接墊142B設置於第一基底110上，係一層設置於介電層130上的圖案化膜層，且填入多個盲孔132。接墊142B具有平坦的表面。舉例而言，接墊142B的形成方法包括，物理氣相沈積法、化學氣相沉積法、電鍍製程或化學鍍(electroless plating)製程，所述物理氣相沈積法可例如是濺鍍法 或蒸鍍法。各導電柱220抵接至接墊142B之平坦的表面並電性連接接墊142B。藉由上述的設計，本實施例的導電柱220與接墊142B可以不透過對準而直接進行壓合，以進一步地降低製程的需求。
圖4A是本發明一實施例的黏著層的剖面示意圖。請參考圖2A及圖4A，本實施例的黏著層300A與圖2A的黏著層300A相同。在本實施例中，多個導電柱220形成於第二基板200上，且平坦層210更位於第二基板200與多個導電柱220之間。黏著層300A設置於平坦層210上。黏著層300A包括非光敏黏合劑，所述非光敏黏合劑包括環氧樹脂、丙烯酸系樹脂、聚醯亞胺(polyimide,PI)、聚苯唑(PBO)、矽利康(Silicone)、環氧樹脂(Epoxy)、苯並環丁烯(BCB)。在本實施例中，黏著層300A可以是底填膠層(underfill layer)，且共形地覆蓋多個導電柱220以及第二基板200，並填滿多個導電柱220之間的間隙。藉由上述的設計，本實施例的黏著層300A設置於第一基板100與第二基板200之間，且填滿多個導電柱220之間的間隙。因此在後續的壓合製程後，能在精細化接點的條件下，達到密封保護接點(例如導電柱與接墊)的效果，以及基板之間良好的接合強度以及接合品質，更具有優良的電氣特性。
圖4B是本發明另一實施例的黏著層的剖面示意圖。需先說明的是，本實施例的黏著層300與圖3A的黏著層300相同。請參考圖4A及圖4B，本實施例的黏著層300與圖4A的黏著層300A相似，主要的差異在於：黏著層300沒有覆蓋導電柱220。具體而 言，黏著層300繞覆多個導電柱220並填滿多個導電柱220之間的間隙。藉由上述的設計，本實施例的黏著層300可獲致與上述實施例相同的效果。
圖4C是本發明另一實施例的黏著層的剖面示意圖。請參考圖4A及圖4C，本實施例的黏著層300B與圖4A的黏著層300A相似，主要的差異在於：黏著層300B沒有覆蓋導電柱220。具體而言，黏著層300B繞覆多個導電柱220並填滿多個導電柱220之間的間隙，且與多個導電柱220共平面。藉由上述的設計，本實施例的黏著層300B可獲致與上述實施例相同的效果。
圖4D是本發明另一實施例的黏著層的剖面示意圖。請參考圖4A及圖4D，本實施例的黏著層300C與圖4A的黏著層300A相似，主要的差異在於：黏著層300C沒有共形地覆蓋導電柱220。具體而言，黏著層300C完全地淹沒多個導電柱220並填滿多個導電柱220之間的間隙，且黏著層300C的厚度大於導電柱220的高度。藉由上述的設計，本實施例的黏著層300C可獲致與上述實施例相同的效果。
在此需注意的是，如圖4A至圖4D所示，黏著層300、300A、300B、300C、導電柱220與接墊142(例如：圖3A所繪示)的厚度與配置關係僅為示意性，並非用以具體界定本發明的實施例。本領域具有通常知識者應當能理解，藉由上述的設計，只要黏著層300、300A、300B、300C設置於第一基板100與第二基板200之間，且填滿多個導電柱220之間的間隙。因此，能在 精細化接點的條件下，達到密封保護接點(例如：導電柱220與接墊142)的效果，以及提升基板之間的接合強度以及接合品質，更具有優良的電氣特性。
圖5是本發明又一實施例的黏著層的剖面示意圖。請參考圖4B及圖5，本實施例的黏著層310與圖4B的黏著層300相似，主要的差異在於：黏著層310沒有接觸導電柱220。具體而言，黏著層310設置於第二基板200上，且繞過多個導電柱220並填入多個導電柱220之間的間隙。在本實施例中，黏著層310包括光敏黏合劑，所述光敏黏合劑包括環氧樹脂、丙烯酸系樹脂、聚醯亞胺(polyimide,PI)、聚苯唑(PBO)、矽利康(Silicone)、環氧樹脂(Epoxy)、苯並環丁烯(BCB)。在形成黏著層310的方法包括，先設置一層黏著材料(未繪示)並覆蓋多個導電柱220以及第二基板200。接著，於黏著材料上形成圖案化罩幕層(未繪示)。之後，以圖案化罩幕層為罩幕，進行微影製程，以圖案化黏著材料形成黏著層310，並去除覆蓋多個導電柱220上的多餘黏著材料以及部分繞覆多個導電柱220的黏著材料。藉由上述的設計，本實施例的黏著層310除了可獲致與上述實施例相同的效果，可更進一步地去除多餘的黏著材料，減少對接點(例如導電柱與接墊)的電性連接的干擾，具有優良的電氣特性。
圖6是本發明另一實施例的第二基板的剖面示意圖。請參考圖4B及圖6，本實施例的第二基板200上更設置高分子黏合層320於黏著層300上。在本實施例中，黏著層300包括非光敏 黏合劑，但本發明不以此為限。在其他實施例中，黏著層300也可為光敏黏合劑。黏著層300設置於第二基板200上，且繞覆多個導電柱220並填滿多個導電柱220之間的間隙。高分子黏合層320重疊於黏著層300，並填滿多個導電柱220之間的間隙。在本實施例中，高分子黏合層320係為使用分子接合技術(molecular bonding technology,MBT)的黏合劑。詳細而言，高分子黏合層320為緩衝層(buffer layer)混合奈米接合材料(nano bonding material)的聚合物，包括含矽烷偶合劑(Silane)聚合物等。由於高分子黏合層320不會沾黏金屬材料，且具有與非金屬材料良好的接著力，因此可透過塗布法或噴塗法，將高分子黏合層320整面的覆蓋黏著層300以及多個導電柱220。藉由上述的設計，本實施例的高分子黏合層320可以簡單的方式設置，且高分子黏合層320不會覆蓋導電柱220，因此適於降低製程的需求。此外，高分子黏合層320不會影響導電柱220，因此可以減少對接點(例如導電柱與接墊)的電性連接的干擾，具有優良的電氣特性。
圖7是本發明再一實施例的第二基板的剖面示意圖。請參考圖1H及圖7，本實施例的第二基板200上不包括黏著層或高分子黏合層，而是將黏著層300’(繪示於圖1H)設置於第一基板100上。藉由上述的設計，本實施例的第二基板200壓合設置於第一基板100上的黏著層300’可獲致與上述實施例相同的效果。
綜上所述，本發明的構裝結構及其接合方法，能在第一基板壓合至第二基板前，設置黏著層於第一基板與第二基板之 間。在壓合後，黏著層可以填滿第一基板與第二基板之間的間隙，並填滿多個導電柱之間的間隙，以在精細化接點的條件下，達到密封保護導電柱與接墊的效果，以及第一基板與第二基板之間良好的接合強度以及接合品質。此外，在壓合期間，本發明的導電柱與接墊之間於接觸時能產生一應力集中點，故能有效降低壓合的製程溫度和壓力，適於進行低溫接合組裝。本發明的構裝結構的接合方法，相較於習知的接合技術，不須先對基板的導電柱進行清潔，也不需透過化學研磨製程使其表面平坦。另外，於接合後，構裝結構也不需經過額外的退火處理。因此，本發明的接合方法適於降低製程的需求、減少製造成本、提升構裝結構的品質與可靠度。另外，導電柱還可以填滿盲孔，並與接墊達成良好的電性連接，使構裝結構具有優良的電氣特性，進一步提升構裝結構的品質。此外，本發明的構裝結構更可包括使用高分子黏合層，進一步提供良好的接合強度且避免減少對接點的電性連接的干擾，因此具有優良的電性特性，更進一步提升構裝結構的品質。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
10:構裝結構
100:第一基板
110:第一基底
120:線路層
130:介電層
132:盲孔
142:接墊
200:第二基板
210:平坦層
220:導電柱
300A:黏著層

Claims (14)

  1. 一種構裝結構，包括：一第一基板，包括：多個盲孔；以及多個墊層，設置於該第一基板上，且該些墊層共形地填入該些盲孔，以於該些墊層上分別形成多個凹陷；一第二基板，相對該第一基板設置；多個導電柱，各該導電柱電性連接各該墊層以及該第二基板，且各該導電柱填滿各該盲孔；以及一黏著層，設置於該第一基板與該第二基板之間，且該黏著層填滿該些導電柱之間的間隙。
  2. 如申請專利範圍第1項所述的構裝結構，其中該第二基板為晶片、線路載板、印刷電路板的其中一者。
  3. 如申請專利範圍第1項所述的構裝結構，其中該墊層為接墊或界面層的其中一者。
  4. 如申請專利範圍第1項所述的構裝結構，更包括：一高分子黏合層設置於該黏著層上，該高分子黏合層填滿該些導電柱之間的間隙，其中該高分子黏合層係為使用分子接合技術的緩衝層混合奈米接合材料的聚合物。
  5. 一種構裝結構的接合方法，包括：提供一第一基板，在該第一基板中形成多個盲孔； 設置多個墊層於該第一基板上，各該墊層共形地填入各該盲孔，以於各該墊層上形成凹陷；提供一第二基板，在該第二基板上形成多個導電柱；設置一黏著層於該第一基板與該第二基板之間；以及壓合該些導電柱至該些墊層，以使各該導電柱電性連接各該墊層並填滿各該盲孔，且該黏著層填滿該些導電柱之間的間隙。
  6. 如申請專利範圍第5項所述的構裝結構的接合方法，其中該墊層為接墊及界面層的其中一者。
  7. 如申請專利範圍第5項所述的構裝結構的接合方法，其中該第二基板為晶片、線路載板、印刷電路板的其中一者。
  8. 如申請專利範圍第5項所述的構裝結構的接合方法，其中該黏著層係為共形地覆蓋該些導電柱以及該第二基板、繞覆該些導電柱、繞覆該些導電柱且與該些導電柱共平面、該黏著層的厚度大於各該導電柱的高度且完全地淹沒該些導電柱、及繞過該些導電柱的其中一者。
  9. 如申請專利範圍第5項所述的構裝結構的接合方法，其中該黏著層係設置於該第一基板上，不覆蓋該些墊層，且位於該些墊層之間的間隙。
  10. 如申請專利範圍第8或9項所述的構裝結構的接合方法，更包括：設置一高分子黏合層於該黏著層上，其中該高分子黏合層係為使用分子接合技術的緩衝層混合奈 米接合材料的聚合物。
  11. 一種線路板，包括：如申請專利範圍第1項所述的構裝結構中的該第一基板或該第二基板的其中一者；以及一黏著層設置於該第一基板或該第二基板的其中一者上。
  12. 如申請專利範圍第11項所述的線路板，更包括多個導電柱電性連接該第二基板，其中該黏著層係為共形地覆蓋該些導電柱以及該第二基板、繞覆該些導電柱、繞覆該些導電柱且與該些導電柱共平面、該黏著層的厚度大於各該導電柱的高度且完全地淹沒該些導電柱、及繞過該些導電柱的其中一者。
  13. 如申請專利範圍第11項所述的線路板，其中該黏著層係設置於該第一基板上，不覆蓋該些墊層，且位於該些墊層之間的間隙。
  14. 如申請專利範圍第12或13項所述的線路板，更包括：設置一高分子黏合層於該黏著層上，其中該高分子黏合層係為使用分子接合技術的緩衝層混合奈米接合材料的聚合物。
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