KR101957257B1 - 리드프레임 및 그 제조 방법과 반도체 장치 및 그 제조 방법 - Google Patents

리드프레임 및 그 제조 방법과 반도체 장치 및 그 제조 방법 Download PDF

Info

Publication number
KR101957257B1
KR101957257B1 KR1020130007821A KR20130007821A KR101957257B1 KR 101957257 B1 KR101957257 B1 KR 101957257B1 KR 1020130007821 A KR1020130007821 A KR 1020130007821A KR 20130007821 A KR20130007821 A KR 20130007821A KR 101957257 B1 KR101957257 B1 KR 101957257B1
Authority
KR
South Korea
Prior art keywords
dimple
die pad
inclined side
depth direction
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
KR1020130007821A
Other languages
English (en)
Korean (ko)
Other versions
KR20130088773A (ko
Inventor
히토시 미야오
Original Assignee
신꼬오덴기 고교 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 신꼬오덴기 고교 가부시키가이샤 filed Critical 신꼬오덴기 고교 가부시키가이샤
Publication of KR20130088773A publication Critical patent/KR20130088773A/ko
Application granted granted Critical
Publication of KR101957257B1 publication Critical patent/KR101957257B1/ko
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/063—Manufacture or treatment of conductive parts of the interconnections by forming conductive members before forming protective insulating material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/04—Manufacture or treatment of leadframes
    • H10W70/048—Mechanical treatments, e.g. punching, cutting, deforming or cold welding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
KR1020130007821A 2012-01-31 2013-01-24 리드프레임 및 그 제조 방법과 반도체 장치 및 그 제조 방법 Active KR101957257B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012018461A JP5833459B2 (ja) 2012-01-31 2012-01-31 リードフレーム及びその製造方法と半導体装置及びその製造方法
JPJP-P-2012-018461 2012-01-31

Publications (2)

Publication Number Publication Date
KR20130088773A KR20130088773A (ko) 2013-08-08
KR101957257B1 true KR101957257B1 (ko) 2019-03-13

Family

ID=48837510

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020130007821A Active KR101957257B1 (ko) 2012-01-31 2013-01-24 리드프레임 및 그 제조 방법과 반도체 장치 및 그 제조 방법

Country Status (5)

Country Link
US (1) US8778739B2 (https=)
JP (1) JP5833459B2 (https=)
KR (1) KR101957257B1 (https=)
CN (1) CN103227115B (https=)
TW (1) TWI574366B (https=)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE112014006397B4 (de) * 2014-02-24 2022-11-17 Mitsubishi Electric Corporation Leistungshalbleitermodul und Leistungseinheit
JP6408431B2 (ja) * 2015-06-11 2018-10-17 Ｓｈプレシジョン株式会社 リードフレーム、リードフレームの製造方法、および半導体装置
JP2017208486A (ja) * 2016-05-19 2017-11-24 株式会社ミスズ工業 表面に凹凸を有する金属部材、ヒートスプレッダ、半導体パッケージ及びそれらの製造方法
TWI623076B (zh) * 2016-11-02 2018-05-01 Fusheng Electronics Corporation 導線架製作方法
US10998255B2 (en) 2018-07-12 2021-05-04 Nxp Usa, Inc. Overmolded microelectronic packages containing knurled flanges and methods for the production thereof
TWI690045B (zh) * 2018-08-03 2020-04-01 欣興電子股份有限公司 構裝結構、其接合方法及用於其的線路板
WO2020053728A2 (en) * 2018-09-11 2020-03-19 Rjr Technologies, Inc. Air cavity package with improved connections between components
JP2021034705A (ja) * 2019-08-29 2021-03-01 Ｊｘ金属株式会社 金属板、金属樹脂複合体、半導体デバイス及び、金属板の製造方法
WO2024090029A1 (ja) * 2022-10-25 2024-05-02 富士電機株式会社 半導体モジュール、半導体装置、及び車両

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050051876A1 (en) * 2003-09-08 2005-03-10 United Test And Assembly Test Center, Ltd. Integrated circuit package with leadframe enhancement and method of manufacturing the same

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6378558A (ja) * 1986-09-22 1988-04-08 Hitachi Ltd 電子装置
JPS6442847A (en) * 1987-08-10 1989-02-15 Toshiba Corp Lead frame
JP2552887Y2 (ja) * 1991-03-29 1997-10-29 サンケン電気株式会社 絶縁物被覆電子部品
JPH077122A (ja) * 1993-06-17 1995-01-10 Fujitsu Ltd Ｉｃパッケージ
JPH07161896A (ja) 1993-12-02 1995-06-23 Hitachi Cable Ltd リードフレームとその製造方法
JP3339173B2 (ja) 1994-04-01 2002-10-28 松下電器産業株式会社 リードフレーム及びその製造方法及びそれを用いた半導体装置
JPH0864739A (ja) * 1994-08-24 1996-03-08 Hitachi Cable Ltd ディンプル加工を施したリードフレームの製造方法及びそのディンプル加工金型
JPH0864749A (ja) * 1994-08-25 1996-03-08 Hitachi Cable Ltd リードフレーム
US6294409B1 (en) * 2000-01-27 2001-09-25 Siliconware Precisionware Industries Co., Ltd. Method of forming a constricted-mouth dimple structure on a leadframe die pad
US7091602B2 (en) 2002-12-13 2006-08-15 Freescale Semiconductor, Inc. Miniature moldlocks for heatsink or flag for an overmolded plastic package
US7476602B2 (en) * 2005-01-31 2009-01-13 Texas Instruments Incorporated N2 based plasma treatment for enhanced sidewall smoothing and pore sealing porous low-k dielectric films
JP2009260282A (ja) 2008-03-18 2009-11-05 Panasonic Corp パッケージ用リードフレーム
US7955954B2 (en) * 2008-04-14 2011-06-07 Infineon Technologies Ag Method of making semiconductor devices employing first and second carriers

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050051876A1 (en) * 2003-09-08 2005-03-10 United Test And Assembly Test Center, Ltd. Integrated circuit package with leadframe enhancement and method of manufacturing the same

Also Published As

Publication number Publication date
JP2013157536A (ja) 2013-08-15
US8778739B2 (en) 2014-07-15
TW201347123A (zh) 2013-11-16
KR20130088773A (ko) 2013-08-08
TWI574366B (zh) 2017-03-11
JP5833459B2 (ja) 2015-12-16
US20130193567A1 (en) 2013-08-01
CN103227115A (zh) 2013-07-31
CN103227115B (zh) 2017-04-12

Similar Documents

Publication Publication Date Title
KR101957257B1 (ko) 리드프레임 및 그 제조 방법과 반도체 장치 및 그 제조 방법
US11552007B2 (en) Modified leadframe design with adhesive overflow recesses
US11699667B2 (en) Leadframe with pad anchoring members and method of forming the same
KR101563911B1 (ko) 반도체 패키지
KR101486790B1 (ko) 강성보강부를 갖는 마이크로 리드프레임
JP6357371B2 (ja) リードフレーム、半導体装置及びリードフレームの製造方法
JP5762078B2 (ja) リードフレーム
US9673122B2 (en) Micro lead frame structure having reinforcing portions and method
JP2013157536A5 (https=)
CN102468258A (zh) 具有嵌套成排的接点的半导体器件
JP6080305B2 (ja) 半導体装置の製造方法、半導体装置及びリードフレーム
US6737735B2 (en) Semiconductor device wiring lead frame having resin flow control plates
JP2009260282A (ja) パッケージ用リードフレーム
JP2014116499A (ja) リードフレーム及びその製造方法
US9070682B2 (en) Semiconductor device packaging having plurality of wires bonding to a leadframe
JP2012146704A (ja) 半導体装置、リードフレーム、及び半導体装置の製造方法
KR100473338B1 (ko) 반도체패키지용 리드프레임 및 그 봉지 방법
JP2016004887A (ja) リードフレーム、およびリードフレームの製造方法
JP5171803B2 (ja) 半導体装置
KR20160093947A (ko) 반도체 패키지 제조용 리드프레임 및 이의 제조 방법

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000