CN101515554B - 半导体器件的制造方法、半导体器件以及配线基板 - Google Patents

半导体器件的制造方法、半导体器件以及配线基板 Download PDF

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CN101515554B
CN101515554B CN2009100069877A CN200910006987A CN101515554B CN 101515554 B CN101515554 B CN 101515554B CN 2009100069877 A CN2009100069877 A CN 2009100069877A CN 200910006987 A CN200910006987 A CN 200910006987A CN 101515554 B CN101515554 B CN 101515554B
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semiconductor device
semiconductor chip
modification
terminal electrode
metal film
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CN101515554A (zh
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堀内章夫
宫坂俊次
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Shinko Electric Industries Co Ltd
Shinko Electric Co Ltd
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Shinko Electric Co Ltd
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L2924/16195—Flat cap [not enclosing an internal cavity]

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  • Engineering & Computer Science (AREA)
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  • Computer Hardware Design (AREA)
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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
CN2009100069877A 2008-02-18 2009-02-18 半导体器件的制造方法、半导体器件以及配线基板 Active CN101515554B (zh)

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JP2008036235 2008-02-18
JP2008-036235 2008-02-18
JP2008036235A JP5224845B2 (ja) 2008-02-18 2008-02-18 半導体装置の製造方法及び半導体装置

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CN101515554B true CN101515554B (zh) 2012-11-07

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US (2) US8217509B2 (enExample)
JP (1) JP5224845B2 (enExample)
KR (1) KR101602958B1 (enExample)
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KR101141209B1 (ko) * 2010-02-01 2012-05-04 삼성전기주식회사 단층 인쇄회로기판 및 그 제조방법
US8319318B2 (en) * 2010-04-06 2012-11-27 Intel Corporation Forming metal filled die back-side film for electromagnetic interference shielding with coreless packages
US8618652B2 (en) 2010-04-16 2013-12-31 Intel Corporation Forming functionalized carrier structures with coreless packages
JP2012146963A (ja) * 2010-12-20 2012-08-02 Shinko Electric Ind Co Ltd 半導体パッケージの製造方法及び半導体パッケージ
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KR101333893B1 (ko) * 2012-01-03 2013-11-27 주식회사 네패스 반도체 패키지 및 그 제조 방법
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TWI515841B (zh) * 2013-08-02 2016-01-01 矽品精密工業股份有限公司 半導體封裝件及其製法
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JP6669586B2 (ja) 2016-05-26 2020-03-18 新光電気工業株式会社 半導体装置、半導体装置の製造方法
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JP6971052B2 (ja) * 2017-04-20 2021-11-24 京セラ株式会社 半導体装置の製造方法および半導体装置
KR102185706B1 (ko) * 2017-11-08 2020-12-02 삼성전자주식회사 팬-아웃 반도체 패키지
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TWI649795B (zh) * 2018-02-13 2019-02-01 友達光電股份有限公司 顯示面板
JP6921794B2 (ja) * 2018-09-14 2021-08-18 株式会社東芝 半導体装置
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TWI808618B (zh) * 2022-01-20 2023-07-11 大陸商廣東則成科技有限公司 用於嵌入式晶片的封裝製程
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