CN101393859B - 设置有半导体膜的衬底及其制造方法 - Google Patents

设置有半导体膜的衬底及其制造方法 Download PDF

Info

Publication number
CN101393859B
CN101393859B CN200810149273.7A CN200810149273A CN101393859B CN 101393859 B CN101393859 B CN 101393859B CN 200810149273 A CN200810149273 A CN 200810149273A CN 101393859 B CN101393859 B CN 101393859B
Authority
CN
China
Prior art keywords
single crystal
crystal semiconductor
substrate
base substrate
semiconductor substrates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN200810149273.7A
Other languages
English (en)
Chinese (zh)
Other versions
CN101393859A (zh
Inventor
山崎舜平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Publication of CN101393859A publication Critical patent/CN101393859A/zh
Application granted granted Critical
Publication of CN101393859B publication Critical patent/CN101393859B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1902—Preparing horizontally inhomogeneous wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/24—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement by concurrent transfer of multiple parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13454—Drivers integrated on the active matrix substrate

Landscapes

  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
CN200810149273.7A 2007-09-21 2008-09-19 设置有半导体膜的衬底及其制造方法 Expired - Fee Related CN101393859B (zh)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP2007245904 2007-09-21
JP2007-245898 2007-09-21
JP2007245904 2007-09-21
JP2007245898 2007-09-21
JP2007245898 2007-09-21
JP2007-245904 2007-09-21

Publications (2)

Publication Number Publication Date
CN101393859A CN101393859A (zh) 2009-03-25
CN101393859B true CN101393859B (zh) 2013-10-30

Family

ID=40470734

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200810149273.7A Expired - Fee Related CN101393859B (zh) 2007-09-21 2008-09-19 设置有半导体膜的衬底及其制造方法

Country Status (4)

Country Link
US (1) US8822305B2 (https=)
JP (1) JP5452900B2 (https=)
CN (1) CN101393859B (https=)
TW (1) TWI470682B (https=)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4884180B2 (ja) * 2006-11-21 2012-02-29 東京エレクトロン株式会社 基板処理装置および基板処理方法
JP5498670B2 (ja) * 2007-07-13 2014-05-21 株式会社半導体エネルギー研究所 半導体基板の作製方法
TWI437696B (zh) * 2007-09-21 2014-05-11 半導體能源研究所股份有限公司 半導體裝置及其製造方法
JP2009094488A (ja) * 2007-09-21 2009-04-30 Semiconductor Energy Lab Co Ltd 半導体膜付き基板の作製方法
JP5250228B2 (ja) * 2007-09-21 2013-07-31 株式会社半導体エネルギー研究所 半導体装置の作製方法
TWI493609B (zh) * 2007-10-23 2015-07-21 半導體能源研究所股份有限公司 半導體基板、顯示面板及顯示裝置的製造方法
US8432021B2 (en) * 2009-05-26 2013-04-30 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of SOI substrate
JP5760392B2 (ja) * 2009-11-04 2015-08-12 ボンドテック株式会社 接合方法、接合システムおよび半導体装置
JP5789798B2 (ja) * 2010-05-28 2015-10-07 ボンドテック株式会社 接合方法および接合システム
CN102593260A (zh) * 2012-03-13 2012-07-18 常州比太科技有限公司 用等离子激发形成氮化硅膜的方法
JP6245791B2 (ja) * 2012-03-27 2017-12-13 日亜化学工業株式会社 縦型窒化物半導体素子およびその製造方法
JP2014209091A (ja) * 2013-03-25 2014-11-06 ローム株式会社 半導体装置
CN108417523B (zh) * 2018-04-16 2020-08-04 歌尔股份有限公司 Led衬底的剥离方法
US12195846B2 (en) * 2019-08-07 2025-01-14 Applied Materials, Inc. Modified stacks for 3D NAND
JP1660063S (https=) 2019-10-25 2020-05-25
JP1660180S (https=) 2019-10-25 2020-05-25
JP1660178S (https=) 2019-10-25 2020-05-25
JP1660179S (https=) 2019-10-25 2020-05-25
US11443987B2 (en) 2020-05-29 2022-09-13 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor devices with backside air gap dielectric
TWI850407B (zh) * 2020-06-19 2024-08-01 巴黎文理研究大學 用於基板上液體之經控制沉積的系統及方法、該系統的用途及藉由該方法獲得的產物
FR3114683B1 (fr) * 2020-09-25 2025-10-17 Semco Smartech France Support pour substrats semiconducteurs pour traitement PECVD avec forte capacité de chargement de substrats
CN112887895B (zh) * 2021-01-26 2022-06-07 苏州工业园区纳米产业技术研究院有限公司 一种调整mems麦克风吸合电压的工艺方法
CN113782654B (zh) * 2021-09-13 2025-02-07 錼创显示科技股份有限公司 发光二极管结构及其制造方法
TWI782703B (zh) * 2021-09-13 2022-11-01 錼創顯示科技股份有限公司 發光二極體結構及其製造方法
JP2024064494A (ja) * 2022-10-28 2024-05-14 沖電気工業株式会社 半導体素子の製造方法、半導体層支持構造体、および半導体基板
JP2024064422A (ja) * 2022-10-28 2024-05-14 沖電気工業株式会社 半導体素子の製造方法、半導体層支持構造体、および半導体基板

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6380046B1 (en) * 1998-06-22 2002-04-30 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device
US6534380B1 (en) * 1997-07-18 2003-03-18 Denso Corporation Semiconductor substrate and method of manufacturing the same

Family Cites Families (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0547726A (ja) * 1991-08-20 1993-02-26 Fujitsu Ltd 半導体装置の製造方法
FR2681472B1 (fr) 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
US6159824A (en) 1997-05-12 2000-12-12 Silicon Genesis Corporation Silicon-on-silicon wafer bonding process using a thin film blister-separation method
JP3324469B2 (ja) 1997-09-26 2002-09-17 信越半導体株式会社 Ｓｏｉウエーハの製造方法ならびにこの方法で製造されるｓｏｉウエーハ
JP3501642B2 (ja) 1997-12-26 2004-03-02 キヤノン株式会社 基板処理方法
JPH11330474A (ja) * 1998-05-13 1999-11-30 Toshiba Corp 液晶表示装置およびその製造方法
JP2000077287A (ja) * 1998-08-26 2000-03-14 Nissin Electric Co Ltd 結晶薄膜基板の製造方法
US6287941B1 (en) 1999-04-21 2001-09-11 Silicon Genesis Corporation Surface finishing of SOI substrates using an EPI process
US6653209B1 (en) 1999-09-30 2003-11-25 Canon Kabushiki Kaisha Method of producing silicon thin film, method of constructing SOI substrate and semiconductor device
US6583440B2 (en) 2000-11-30 2003-06-24 Seiko Epson Corporation Soi substrate, element substrate, semiconductor device, electro-optical apparatus, electronic equipment, method of manufacturing the soi substrate, method of manufacturing the element substrate, and method of manufacturing the electro-optical apparatus
US7253032B2 (en) 2001-04-20 2007-08-07 Semiconductor Energy Laboratory Co., Ltd. Method of flattening a crystallized semiconductor film surface by using a plate
JP4439789B2 (ja) * 2001-04-20 2010-03-24 株式会社半導体エネルギー研究所 レーザ照射装置、並びに半導体装置の作製方法
FR2835097B1 (fr) 2002-01-23 2005-10-14 Procede optimise de report d'une couche mince de carbure de silicium sur un substrat d'accueil
JP4182323B2 (ja) 2002-02-27 2008-11-19 ソニー株式会社 複合基板、基板製造方法
JP2003282885A (ja) * 2002-03-26 2003-10-03 Sharp Corp 半導体装置およびその製造方法
US7119365B2 (en) 2002-03-26 2006-10-10 Sharp Kabushiki Kaisha Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate
JP4091338B2 (ja) 2002-05-17 2008-05-28 株式会社日立ハイテクインスツルメンツ 半導体チップの移送装置
KR100511656B1 (ko) 2002-08-10 2005-09-07 주식회사 실트론 나노 에스오아이 웨이퍼의 제조방법 및 그에 따라 제조된나노 에스오아이 웨이퍼
US6818529B2 (en) 2002-09-12 2004-11-16 Applied Materials, Inc. Apparatus and method for forming a silicon film across the surface of a glass substrate
TWI301641B (https=) 2002-09-19 2008-10-01 Ind Tech Res Inst
TW200415726A (en) 2002-12-05 2004-08-16 Adv Lcd Tech Dev Ct Co Ltd Plasma processing apparatus and plasma processing method
US6759277B1 (en) 2003-02-27 2004-07-06 Sharp Laboratories Of America, Inc. Crystalline silicon die array and method for assembling crystalline silicon sheets onto substrates
US7109092B2 (en) 2003-05-19 2006-09-19 Ziptronix, Inc. Method of room temperature covalent bonding
FR2857030B1 (fr) * 2003-07-01 2006-10-27 Saint Gobain Procede de depot d'oxyde de titane par source plasma
US7253040B2 (en) 2003-08-05 2007-08-07 Sharp Kabushiki Kaisha Fabrication method of semiconductor device
JP4759919B2 (ja) * 2004-01-16 2011-08-31 セイコーエプソン株式会社 電気光学装置の製造方法
US7087134B2 (en) * 2004-03-31 2006-08-08 Hewlett-Packard Development Company, L.P. System and method for direct-bonding of substrates
JP4407384B2 (ja) 2004-05-28 2010-02-03 株式会社Ｓｕｍｃｏ Ｓｏｉ基板の製造方法
US6987063B2 (en) * 2004-06-10 2006-01-17 Freescale Semiconductor, Inc. Method to reduce impurity elements during semiconductor film deposition
JP4744820B2 (ja) * 2004-07-12 2011-08-10 シャープ株式会社 半導体装置の製造方法及び半導体装置の製造装置
JP4934966B2 (ja) 2005-02-04 2012-05-23 株式会社Ｓｕｍｃｏ Ｓｏｉ基板の製造方法
WO2006116030A2 (en) * 2005-04-21 2006-11-02 Aonex Technologies, Inc. Bonded intermediate substrate and method of making same
US7407359B2 (en) * 2005-05-27 2008-08-05 Danville Automation Holdings Llc Funnel plate
KR20080042095A (ko) 2005-07-27 2008-05-14 실리콘 제너시스 코포레이션 제어된 클리빙 처리를 이용하여 플레이트 상에 다수의 타일영역을 제작하는 방법 및 구조
US7674687B2 (en) 2005-07-27 2010-03-09 Silicon Genesis Corporation Method and structure for fabricating multiple tiled regions onto a plate using a controlled cleaving process
US7691730B2 (en) 2005-11-22 2010-04-06 Corning Incorporated Large area semiconductor on glass insulator
CN101512721A (zh) * 2006-04-05 2009-08-19 硅源公司 利用层转移工艺制造太阳能电池的方法和结构
US7579654B2 (en) * 2006-05-31 2009-08-25 Corning Incorporated Semiconductor on insulator structure made using radiation annealing
TWI382470B (zh) 2006-05-31 2013-01-11 Corning Inc 使用輻射退火製造半導體在絕緣體上結構
US20070281440A1 (en) * 2006-05-31 2007-12-06 Jeffrey Scott Cites Producing SOI structure using ion shower
US8153513B2 (en) 2006-07-25 2012-04-10 Silicon Genesis Corporation Method and system for continuous large-area scanning implantation process
US8124499B2 (en) 2006-11-06 2012-02-28 Silicon Genesis Corporation Method and structure for thick layer transfer using a linear accelerator
WO2008123116A1 (en) 2007-03-26 2008-10-16 Semiconductor Energy Laboratory Co., Ltd. Soi substrate and method for manufacturing soi substrate
WO2008123117A1 (en) 2007-03-26 2008-10-16 Semiconductor Energy Laboratory Co., Ltd. Soi substrate and method for manufacturing soi substrate
CN102623400B (zh) 2007-04-13 2015-05-20 株式会社半导体能源研究所 显示器件、用于制造显示器件的方法、以及soi衬底
WO2008156040A1 (en) 2007-06-20 2008-12-24 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing semiconductor device
JP5460984B2 (ja) 2007-08-17 2014-04-02 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2009094488A (ja) 2007-09-21 2009-04-30 Semiconductor Energy Lab Co Ltd 半導体膜付き基板の作製方法
TWI437696B (zh) 2007-09-21 2014-05-11 半導體能源研究所股份有限公司 半導體裝置及其製造方法
JP5250228B2 (ja) 2007-09-21 2013-07-31 株式会社半導体エネルギー研究所 半導体装置の作製方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6534380B1 (en) * 1997-07-18 2003-03-18 Denso Corporation Semiconductor substrate and method of manufacturing the same
US6380046B1 (en) * 1998-06-22 2002-04-30 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing a semiconductor device

Also Published As

Publication number Publication date
TWI470682B (zh) 2015-01-21
JP5452900B2 (ja) 2014-03-26
US8822305B2 (en) 2014-09-02
US20090079025A1 (en) 2009-03-26
CN101393859A (zh) 2009-03-25
JP2009094487A (ja) 2009-04-30
TW200937508A (en) 2009-09-01

Similar Documents

Publication Publication Date Title
CN101393859B (zh) 设置有半导体膜的衬底及其制造方法
US8247307B2 (en) Manufacturing method of substrate provided with semiconductor films
TWI437696B (zh) 半導體裝置及其製造方法
JP5404064B2 (ja) レーザ処理装置、および半導体基板の作製方法
CN102646698B (zh) 半导体装置及电子设备
KR101484492B1 (ko) 반도체 기판의 제작 방법 및 반도체 장치의 제작 방법
JP5548351B2 (ja) 半導体装置の作製方法
JP5619474B2 (ja) Ｓｏｉ基板の作製方法
JP5713603B2 (ja) Ｓｏｉ基板の作製方法
JP2011077504A (ja) 半導体装置の作製方法
JP2009076706A (ja) 半導体基板及び半導体装置の作製方法
US20100184269A1 (en) Method for manufacturing soi substrate and semiconductor device
KR20090079170A (ko) 반도체 기판의 제조장치
US20100173472A1 (en) Method for manufacturing soi substrate and method for manufacturing semiconductor device
US20090223628A1 (en) Manufacturing apparatus of composite substrate and manufacturing method of composite substrate with use of the manufacturing apparatus

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20131030

Termination date: 20190919

CF01 Termination of patent right due to non-payment of annual fee