CN101322233A - 使用超声振动在电气器件之间结合的方法 - Google Patents

使用超声振动在电气器件之间结合的方法 Download PDF

Info

Publication number
CN101322233A
CN101322233A CNA2006800438289A CN200680043828A CN101322233A CN 101322233 A CN101322233 A CN 101322233A CN A2006800438289 A CNA2006800438289 A CN A2006800438289A CN 200680043828 A CN200680043828 A CN 200680043828A CN 101322233 A CN101322233 A CN 101322233A
Authority
CN
China
Prior art keywords
electric device
combination
resin
adhesive
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CNA2006800438289A
Other languages
English (en)
Other versions
CN101322233B (zh
Inventor
白京煜
任明镇
金亨俊
李技元
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Korea Advanced Institute of Science and Technology KAIST
Original Assignee
Korea Advanced Institute of Science and Technology KAIST
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Korea Advanced Institute of Science and Technology KAIST filed Critical Korea Advanced Institute of Science and Technology KAIST
Publication of CN101322233A publication Critical patent/CN101322233A/zh
Application granted granted Critical
Publication of CN101322233B publication Critical patent/CN101322233B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/90—Methods for connecting semiconductor or solid state bodies using means for bonding not being attached to, or not being formed on, the body surface to be connected, e.g. pressure contacts using springs or clips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05567—Disposition the external layer being at least partially embedded in the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/1319—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29399—Coating material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01022—Titanium [Ti]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01028—Nickel [Ni]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0103—Zinc [Zn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01046—Palladium [Pd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01059—Praseodymium [Pr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01076—Osmium [Os]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01087—Francium [Fr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/0665—Epoxy resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
    • H01L2924/07811—Extrinsic, i.e. with electrical conductive fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)

Abstract

本发明提供一种在电气器件之间结合的方法，包括如下步骤：在要结合的上部电器件和下部电气器件的结合区域上对准电极；并且通过向上部电气器件和下部电气器件之间的粘合剂施加超声波能量固化粘合剂。

Description

使用超声振动在电气器件之间结合的方法
技术领域
本发明涉及一种在电气器件(electrical device)之间结合(bonding)的方法，并且更具体地涉及如下一种在电气器件之间结合的方法，当在电气器件之间结合时，该方法能够在固化粘合剂的工艺中无需从外部施加热量或施加相对低温的热量，并且降低了在热压结合工艺情况下的加工压力。
背景技术
随着当前对例如纤细和轻巧、高性能、高集成和环保的半导体封装工艺的需求，倒装芯片工艺的重要性在芯片级结合方法中突显出来。倒装芯片工艺目前将它的使用领域扩展到显示器封装(display packaging)，例如智能卡、LCD、PDP等、计算机、移动电话、通讯系统等的显示器封装。在倒装芯片工艺中使用的互连材料大体可分为焊料和非焊料材料。直到现在，主要应用使用焊料的倒装芯片工艺。然而，焊料具有成本效率和结合工艺复杂的问题，例如热焊接熔剂涂敷(solder flux coating)、芯片/衬底对准、焊料凸起回流(solder bumpreflow)、熔剂清除、底层填料(underfilling)和固化。而且，随着芯片尺寸的变小，更难制造焊球，并且薄膜工艺和光刻工艺等的处理成本增加。因此随着细间距结合工艺和低成本倒装芯片工艺更加受到关注，非焊料材料日益引起人们注意。由此，开发出使用粘合剂的倒装芯片结合工艺，与使用常规焊料的倒装芯片结合工艺相比，它具有低成本、超细间距能力、无铅工艺、环保无焊剂工艺以及低温工艺的优势。
作为半导体封装的互连材料的粘合剂主要包括各向同性导电粘合剂(ICA)、各向异性导电粘合剂(ACA)、不导电粘合剂(NCA)等。通常，粘合剂是复合材料，包括导电金属粒子和具有绝缘性质和粘合性的聚合树脂，并且根据导电粒子的含量，从NCA或ACA转换到ICA。特别地，当产生电输运(electrical transition)时导电粒子的含量值被称为渗透阈值(percolation threshold)。
根据导电粒子的含量，不具有导电粒子的粘合剂是NCA，而具有小于渗透阈值的导电粒子的粘合剂是ACA。而且，具有高于该值的导电粒子的粘合剂是ICA，其材料本身就具有导电性质。就其特性而言半导体封装的互连材料的用途、功能和应用可以有很多种。
图1示出作为非焊料倒装芯片封装的互连材料的各向同性导电粘合剂(ICA)的一个应用实例。参照图1，在将ICA施加到例如形成在半导体芯片上的金钉头凸起(gold stud bump)或镀金凸起(gold plated bump)以及无电镀(electroless)镍/金凸起的非焊料凸起后，执行非焊料凸起和衬底电极的对准。然后，向ICA施加热量以将其固化以便制造非焊料凸起和衬底电极之间的电互连，这时，虽然根据ICA的固化条件加热可以不同，但是近似在180℃下进行加热10到30分钟。然后，在芯片和衬底之间执行底层填料工艺以提高倒装芯片封装的可靠性。
各向异性导电膜(ACF)是具有各向异性电特性和粘合特性的聚合物膜。ACF在膜厚度方向具有导电特性并且在表面方向具有绝缘特性，并且基本上由例如镍、金/聚合物、银等的导电粒子以及具有热固特性或热塑性的绝缘树脂组成。在上部电极和下部电极之间用导电粒子形成电互连。通过同时在芯片或具有安装在其上的芯片的柔性电路衬底和玻璃衬底或刚性衬底之间将这些导电粒子放置在热量和压力下，使这些导电粒子分散在ACF中(图2)。
这时，通过施加的热量以生成更大的粘合强度，产生绝缘树脂的固化。为了发展低成本粘合剂制造工艺和使用这种粘合剂的低成本倒装芯片工艺，使用热固性环氧树脂或丙烯酸基树脂的具有高速固化特性的ACF已经商业化。ACA可分成膜形态(各向异性导电膜ACF)和浆料(paste)形式(各向异性导电浆料ACP)。近来，为了简化结合工艺和粘合剂制造工艺，已开发出浆料形式的粘合剂。而且，为了获得超细间距结合和低成本，存在用于去除导电粒子的非导电膜(NCF)以及以浆料形式制造的NCP。
图3示出使用NCF或NCP作为互连材料的倒装芯片结合工艺。该工艺首先在衬底电极周围施加NCF或NCP并且将其与其中形成非焊料凸起，尤其是金钉头凸起的芯片对准，然后通过在由热压结合工艺将非焊料凸起与衬底电极直接接触的同时施加热量坚固NCA。
例如ICA、ACA(ACF、ACP)、NCA(NCF、NCP)等的互连材料已经用于例如LCD、PDP、OLED等平板显示器的安装、电气器件的表面安装以及半导体倒装芯片的结合。而且，这些互连材料已经广泛用在平板显示模块安装领域中的外引线结合(out lead bonding，OLB)工艺、PCB工艺、晶玻接装(chip-on-glass，COG)工艺以及膜上芯片(chip-on-film，COF)工艺并且将它们的市场扩展到非焊料倒装芯片结合工艺和表面器件安装工艺。
ICA是可以取代用于结合的现有焊料以便组装电气器件或电子器件或电路配线的材料。它的应用领域类似于焊料结合领域。也就是说，它可用于组装需要焊料回流的表面安装器件或用于使用焊料结合倒装芯片，并可通过在低于焊料回流工艺的温度下热固ICA实现结合。但是，这种情况存在加工温度高且固化时间长的弱点。
对于ACA，其用于显示模块的安装。ACF最广泛地用于将柔性衬底结合到玻璃衬底时使用的OLB结合以及将柔性衬底结合到PCB衬底时使用的PCB结合。根据应用的领域，其有多种类型的导电粒子并且需要结合温度降低同时结合时间变快的低温快速固化类型。
驱动电路IC芯片密度和集成度越高，在驱动电路IC芯片直接结合到玻璃衬底的COG工艺中以及在由倒装芯片方法将驱动电路IC芯片结合到柔性衬底的COF工艺中越需要超细间距。
因此，目前对ACF超细间距结合以及低温快速固化类型需要的形势预期会继续。而且，根据孔(socket)或焊料的超细间距结合能力、设计自由度以及结合面积和高度的减小的要求，除了显示模块安装之外，ACF结合也将在柔性衬底和刚性衬底的安装中被取代。由于非焊料倒装芯片结合工艺取代使用现有焊料的倒装芯片结合的优势，它的实用性得以提升。因此，作为ACA的取代材料，NCA迅速出现。作为用在非焊料倒装芯片结合工艺中的非焊料凸起，有金钉头凸起、镀金凸起、无电镀镍凸起以及铜凸起等。在这种情况下，因为由于熔点高不能执行通过回流的倒装芯片结合，所以通过使用ACF的热压结合工艺执行倒装芯片结合工艺。
然而，使用ACF的OLB、PCB、COG、COF和柔性到刚性结合工艺以及倒装芯片结合工艺基于使用热压结合工艺以及其后热固聚合树脂的导电粒子与电极和非焊料凸起的机械接触。由此，需要解决结合压力的施加、聚合树脂的均匀热固、快速热固操作的高加工温度及其引起的封装热变形，和衬底平面性等的多种应用问题。特别地，如果化合物半导体芯片或硅芯片的厚度薄，例如通过加工压力相对易碎，由于产生的结合压力的限制，那么很难实施ACF结合工艺。
由此，如果开发出能够解决使用ICA、ACF、NCF、ACP和NCP的半导体结合工艺或安装工艺中以上问题的新材料或工艺，那么非常有可能使用例如ICA、ACA和NCA等聚合物互连材料和使用它们的低温结合工艺以及低成本结合工艺。
而且，因为电子产品的环境问题(由于焊剂、清洗、包括Pb的焊料的使用等)被视为严重的问题，所以在严格控制CFC的使用和Pb的使用形势下，对这些材料作为环保替代材料的关注度更加强烈。
发明内容
技术问题
提出本发明以克服现有技术的所述问题。本发明的一个目的是克服现有技术的所述问题，并且特别地，提供一种电气器件之间的结合方法，当在电气器件之间结合时该方法在固化粘合剂的步骤中能够不需要从外部施加热量或施加相对低温的热量，并且在热压结合工艺的情况下降低了加工压力。
技术方案
为了实现该目的，本发明提供了一种电气器件之间的结合方法，包括如下步骤：在要结合的上部电气器件和下部电气器件的结合区域上对准电极；并通过向上部电气器件和下部电气器件之间的粘合剂施加超声波能量固化该粘合剂并且从而加热粘合剂本身。
技术效果
当在电气器件之间结合时，本发明能够在固化粘合剂工艺中不需要从外部施加热量或施加相对低温的热量。
而且，本发明具有在热压结合工艺的情况下降低加工压力的效果。结果，本发明的结合工艺能够提高产量(yield)和生产率并提供具有极好的粘合强度和可靠性的结合工艺。
附图说明
参照附图，根据下面描述的实施例，本发明的其它目的和方面将变得显而易见，其中：
图1示出使用传统各向同性导电粘合剂的倒装芯片结合工艺；
图2示出使用传统各向异性导电粘合剂的倒装芯片结合工艺；
图3示出使用传统非导电粘合剂的倒装芯片结合工艺；
图4示出根据本发明的使用各向同性导电粘合剂的倒装芯片结合工艺(假设使用凸起作为结合的中间媒介)；
图5示出根据本发明的使用各向同性导电粘合剂的倒装芯片结合工艺(假设不使用凸起作为结合的中间媒介)；
图6示出根据本发明的使用各向异性导电粘合剂的倒装芯片结合工艺；
图7示出在用超声波能量处理各向异性导电粘合剂的情况下粘合剂的温度变化；
图8示出根据本发明的使用非导电粘合剂的倒装芯片结合工艺；
图9示出根据本发明的使用各向异性导电粘合剂的柔性-刚性衬底结合工艺；
具体实施方式
下面将详细描述本发明。
在本发明中，要结合的电气器件是指用在诸如半导体芯片或衬底等的电气产品中的器件，并且在电气器件之间的结合是指在半导体芯片和衬底之间、半导体芯片和半导体芯片之间或衬底和衬底之间的电连接。
不具体限制这样的半导体芯片的类型，例如可包括显示驱动电路IC、图像传感器IC、存储器IC、非存储器IC、超高频或RF IC、硅作为主要成分的半导体IC以及化合物半导体IC。
在结合区域(或输入/输出垫(pad))上的电极中，半导体芯片可能没有非焊料凸起或可具有选自例如金钉头凸起、铜钉头凸起、镀金凸起、镀铜凸起、无电镀镍/金凸起以及无电镀镍/铜/金凸起的一种凸起作为金属钉头凸起或镀金属的凸起。
而且，衬底可以是柔性或刚性衬底。这些衬底的其中之一可与半导体芯片形成电连接，或可与其它衬底形成电连接并且然后包括柔性衬底之间、刚性衬底之间或柔性衬底和刚性衬底之间的电连接。例如，柔性衬底是指具有例如在聚酰亚胺衬底上形成金属线的柔性的衬底。同时，刚性衬底可以是环氧/玻璃、陶瓷、玻璃和硅半导体的衬底。
粘合剂可以是导电粘合剂或非导电粘合剂，并且导电粘合剂同样可为ICA或ACA。
ICA包括导电粒子。不具体限制可使用的导电粒子，且例如可包括选自由银、铜、金、碳、镍、钯和低熔点焊料粉构成的组中的一个，或包括它们的组合。
例如，使用聚合树脂作为主要成分的ICA可选自例如环氧树脂、聚酯树脂、丙烯酸树脂、聚酰亚胺树脂和聚砜树脂等热塑树脂或热固树脂。
ACA包括各向异性导电膜(ACF)或各向异性导电浆料(ACP)的形式。当粘合剂是膜类型时，粘合剂层可通过如下方法施加到衬底上：在大约80℃下以、5kgf/cm2在衬底上预压具有粘性的表面，然后去除分隔纸膜。而且，当粘合剂是浆料(paste)类型时，可通过使用喷射设备或丝网印刷机以希望的形状施加恒定量的粘合剂。
这些粘合剂包括导电粒子。不具体限制可使用的导电粒子，并且例如可包括选自由涂金的聚合物粒子、涂金的镍粒子、涂金的铜粒子、涂敷低熔点焊料层的铜粒子和低熔点焊料粒子构成的组中的一个，或包括它们的组合。
而且，ACA还可包括尺寸小于导电粒子的非导电粒子。作为非导电粒子的实例，可包括小于或等于1μm的硅石、氧化铝、氧化铍、碳化硅、金刚石、氮化硼等。可通过添加上述非导电粒子降低粘合剂的热膨胀系数。
使用聚合树脂作为主要成分的ACA可选自例如环氧树脂、聚酯树脂、丙烯酸树脂、聚酰亚胺树脂和聚砜树脂等热塑树脂或热固树脂。
NCA包括非导电膜(NCF)或非导电浆料(NCP)的形式。当粘合剂是膜类型时，可通过如下方法将粘合剂层施加到衬底上：在约80℃下以5kgf/cm2在衬底上预压具有粘性的表面，然后去除分隔纸膜。而且，当粘合剂是浆料类型时，可通过使用喷射设备或丝网印刷设备以希望的形状施加恒定量的粘合剂。
NCA可包括非导电粒子。作为非导电粒子的实例，可包括小于或等于1μm的硅石、氧化铝、氧化铍、碳化硅、金刚石、氮化硼等。可通过添加上述非导电粒子降低粘合剂的热膨胀系数。
例如，使用聚合树脂作为主要成分的NCA可选自例如环氧树脂、聚酯树脂、丙烯酸树脂、聚酰亚胺树脂和聚砜树脂等的热塑树脂或热固树脂。
本发明包括可应用到多种结合结构的粘合剂固化工艺。根据本发明的粘合剂固化工艺包括向粘合剂施加超声波能量的工艺。通过施加超声波能量，可降低加工时间和温度。
超声波振动可使用纵向或横向或其组合。为此，可使用纵向超声波换能器和/或横向超声波换能器。公知纵向超声波换能器的特征是通过使施加到所有结合区域的振动均匀而提高产品收得率和结合可靠性。然而，如果即使在上部电极和下部电极接触后继续振动，则存在损坏芯片的危险。在这种情况下，通过用TeflonTM盖覆盖超声波焊头(ultrasonic hom)的端部来降低影响。同时，在横向超声波传感器的情况下，由于在横向上施加振动，可最小化由纵向换能器产生的破坏。然而，在为了固定芯片而使用管芯夹头(die collet)等的情况下，由于产生锥型振动使芯片端部的结合特性变坏，这样会降低产品收得率和结合可靠性。
在本发明中，就ICA、ACA、NCA的特性而言，适当的频率范围是20KHz到60KHz。如果在施加相同能量的时刻增加频率，那么在其相反部分振幅可降低以降低芯片的未对准或损坏。而且，由于粘合剂的加热操作根据频率指示不同的特性，所以有必要执行优化处理以与工艺需要的条件相匹配。同时，由于通过单个装置中振动器的质量和形状确定振动频率，所以有必要为了改变频率而修正或替换装置。
如果本发明通过使用单个装置来固定并使用频率，那么在结合时施加的超声波能量由超声波振动振幅确定。由于超声波振动振幅由施加到振荡器的电源电压确定，所以可通过改变该电压控制振幅。如果在结合时施加的超声波能量太大，由于会发生芯片损坏或粘合剂过热，所以有必要优化超声波振动振幅。特别地，在使用ICA、ACA和NCA的倒装芯片结合中，在凸起和垫接触后可导致凸起和垫的损坏或者在粘合剂固化后可导致芯片的损坏。为了阻止这些，当结合几乎完成时，在结合工艺之前的期间可使用振幅可变(amplitude variable)方法，其平滑地降低施加电压以降低超声波振动振幅。
如果确定了超声波振动频率和振动振幅，那么根据时间确定粘合剂的热值(heating value)。由于本发明使用ICA、ACA和NAC实施热超声波结合，所以在合适的温度下以合适的时间固化粘合剂很重要。这里，考虑到粘合剂的固化温度和分解温度，合适的温度为约180℃到400℃。如果温度低，那么不发生固化，因此不可能发生结合。而如果温度高，那么由于粘合剂的分解或粘合剂内部空隙的生成，结合可靠性变差。该合适的时间是指直到粘合剂完全固化的时间。
根据本发明，超声波能量施加方法为，施加恒定频率长达指定时间或以脉冲形式施加超声波能量的方法。也就是说，当在任何超声波振动频率和振动振幅的条件下连续地施加超声波能量时，如果粘合剂的温度不超过温度范围，仅控制超声波振动时间就可实施热超声波(thermosonic)结合。但是，如果超声波振动频率和/或振动振幅值很大使得粘合剂温度超过温度范围，那么通过由电源以脉冲形式来间歇地提供能量可防止粘合剂过热。
ICA、ACA和NCA具有随着温度的流变特性。因为由超声波能量在粘合剂本身内部生成的热根据粘合剂的流变特性变化，所以当温度升高时通过施加热量给所有或一些上部和下部结合部分可改变初始温度升高率。而且，当在粘合剂固化之前向其施加热量以最小化粘合剂的粘度使得粘合剂树脂可以平滑流动时，会达到在结合区域之间增加粘性并进一步降低加工压力的效果。
下面，将参照实施例更具体地描述根据本发明的通过使用超声波能量固化粘合剂的在电气器件之间的结合工艺。
图4示出在半导体芯片和衬底之间使用ICA的结合工艺。
该结合工艺在硅芯片上执行SiO2钝化并且然后在其上沉积1μm厚的Al引线。之后，其执行SiNx或SiO2钝化工艺并且然后形成I/O直径为100μm、间距为180μm的I/O通孔。其在I/O垫上形成金钉头凸起并且然后执行平面化工艺以降低相应凸起的高度偏差。此时，其可形成铜钉头凸起而不是金钉头凸起并且同样执行平坦化工艺。
衬底是1mm厚的FR-4有机衬底，具有镍/铜/金引线作为金引线(hasnickel/copper/gold wirings as gold wirings)并且除了电极外用焊料掩模保护。
ICA是用诸如聚合树脂等的基体材料和诸如银、碳粒子等的导电填充物混合的并且它的一般形式是浆料。作为聚合树脂，有诸如丙烯酸树脂、聚酰亚胺树脂、聚砜树脂等的热塑树脂、诸如环氧树脂、酚醛树脂、三聚氰胺甲醛树脂、聚脂树脂等的热固树脂或其混合树脂。作为导电填充物，有银、铜、金、钯、银-钯合金、碳、镍或其混合物。其它添加剂和硬化剂等与其混合。
通过所述工艺获得的ICA以约10μm的高度被均匀地施加到例如玻璃等的平坦衬底上。之后，通过使用倒装芯片结合器将测试芯片浸到所施加的ICA层上。通过该工艺ICA被转移到形成在测试芯片上的金钉头凸起的端部。
通过将测试芯片与有机衬底的电极对准并且然后向其施加超声波能量，固化形成在金钉头凸起端部的ICA。此时，在几秒钟内完成ICA的固化并且通过之间固化的ICA，测试芯片的金钉头凸起电连接到有机衬底上的电极。之后，在芯片和衬底之间施加作为下部填充物的底层填料并且热固该底层填料，以便完成使用ICA的倒装芯片结合。
在本实施例中，可通过使用超声波能量增加固化温度并将固化时间减少几秒钟，而不是使用固化ICA的现有热固工艺。
图5示出在半导体芯片的相应I/O中不形成金钉头凸起或铜钉头凸起的情况下直接使用ICA形成聚合物凸起的实例。通过利用超声波能量固化聚合物凸起可执行倒装芯片结合工艺。
也就是说，通过ICA的喷射工艺或丝网印刷工艺在测试芯片的相应I/O上形成ICA聚合物凸起并且然后施加超声波能量到该形成的凸起以硬化ICA聚合物凸起，从而完成倒装芯片结合。之后，可通过在芯片和衬底之间填充下部填充物来执行改善可靠性的底层填料工艺。
而且，可通过在使用ICA的表面安装器件的结合工艺中使用超声波能量执行表面安装结合工艺。
首先，通过丝网印刷工艺将ICA均匀施加到衬底电极上。之后，通过对准在施加ICA的结合区域中的表面安装引线框(lead frame)器件或无源元件器件，然后一旦安装了它们就施加超声波能量来固化ICA。如果通过向ICA增加超声波能量执行表面安装器件的结合工艺，那么不像通过使用现有取放装置安装表面安装器件然后执行ICA固化工艺的表面安装结合工艺，在无需进一步固化工艺的情况下可完成表面安装结合工艺。
图6示出使用ACA的半导体芯片和衬底的结合工艺。
首先，该结合工艺在硅芯片上执行SiO2钝化并且然后在其上沉积1μm厚的Al引线。之后，其执行SiNx或SiO2钝化工艺并且然后形成I/O直径为100μm、间距为180μm的I/O通孔。可以如下所述形成ACA结合的非焊料凸起。
使用金引线装置(gold wire apparatus)以约60到80μm的高度在I/O垫上形成金钉头凸起或铜钉头凸起。之后，为了降低相应凸起的高度偏差执行平坦化工艺。该工艺在结合ACA时使凸起的端部部分的形变量大，并且然后扩大结合区域，使得在凸起和衬底之间结合许多导电粒子并且其间的电接触电阻较低。而且，当由于凸起高度不均匀而将过压施加到具体的I/O时，该工艺可防止损坏芯片。
通过使用无电镀镍/铜/金镀工艺(electroless nickel/copper/gold platingprocess)，可以形成20到30μm高度的无电镀凸起(electroless bump)。在这种情况下，执行辛酸盐工艺(zincate process)以使Al活化并且然后在合适的温度将其浸到无电镀(electroless)镍溶液中持续合适的时间的同时形成镍凸起。如果必要，可形成具有弱硬度的无电镀铜层。之后，为了阻止镍和铜的氧化并改善导电性，使用无电镀镀金溶液执行镀薄金。通过使用无电镀镍/金凸起或镍/铜/金凸起执行ACA的倒装芯片结合工艺，使得ACA中的导电粒子在凸起和衬底电极之间连接以具有低接触电阻。
而且，在包括测试芯片的相应I/O的整个区域上形成Ti/Au的种子层并且向除了相应I/O垫部分之外的部分施加光致抗蚀剂(PR)之后，可形成金电解凸起。通过使用电解镀金方法形成具有固定厚度的镀金凸起。然后，去除PR并且刻蚀种子层使得可以在相应I/O部分中形成电解镀金凸起。
使用的衬底是1mm厚的FR-4有机衬底，具有镍/铜/金引线作为金引线并且除了施加ACA的衬底电极外用焊料掩模保护。
ACA包括绝缘树脂和导电粒子。在膜的情况下，作为聚合树脂，可使用固态环氧树脂、液态环氧树脂、苯氧基树脂和MEK/甲苯溶剂的混合物。作为典型的硬化剂，可使用微胶囊咪唑硬化剂。而且，在的浆料情况下，硬化剂可被添加到液态环氧树脂中。经过表面处理的导电粒子与其混合以产生ACA溶液。如果必要，可混合具有1μm或更小厚度的非导电粒子以便降低固化ACA后的热膨胀系数。为了形成膜，通过Doctor Blade方法在分隔纸膜上形成膜并且在80℃保留1分钟以便去除溶剂。尽管膜的厚度会根据芯片的凸起尺寸变化，但是它具有10到50μm的厚度以容纳各种凸起。对于浆料，它优选为液态环氧树脂和添加剂混合物以具有适于丝网印刷工艺或喷射工艺的流变特性。
在有机衬底等上施加通过所述工艺获得的ACA后，对准其中形成非焊料凸起的芯片。然后，通过同时施加热量、压力和超声波能量给芯片或仅施加超声波能量和压力给芯片执行倒装芯片结合。在衬底上施加ACA的工艺如下所述。如果ACA是膜类型的ACA，通过在80℃下以5kgf/cm2在衬底上预压具有膜的表面后，去除分离纸膜，可以在衬底上施加ACA。如果ACA是浆料类型的ACA，那么可通过使用喷射装置或丝网印刷装置以希望的形状在衬底上施加恒定量的ACA。在使用超声波振动的热压结合工艺或使用超声波振动的压缩结合工艺中，ACA的温度能比现有的热压结合工艺中升高得快很多。如图7所示，可发现在通过超声波能量的倒装芯片结合结构中，ACA的温度在2秒内升高到270℃并且到达最大值305℃，并且然后在去除超声波能量后温度可快速降低。
另外，与在现有热压结合工艺中为每凸起施加100g的加工压力的情况不同，虽然向每凸起施加20-50g，但是可获得稳定的结合电阻，使得通过超声波结合工艺在使用ACA的倒装芯片结合时可大大降低加工压力。
图8示出使用NCA的在半导体芯片和衬底之间的结合工艺。
通过在硅芯片上执行SiO2钝化，在其上沉积1μm厚的Al引线并且然后，执行SiNx或SiO2钝化，形成I/O直径为100μm并且间距为180μm的I/O通孔。由于对于NCA结合非焊料凸起直接机械结合到衬底电极，所以非焊料凸起优选为金钉头凸起。
由于这个原因，使用金引线装置在I/O垫上还以60-80μm的高度形成金钉头凸起或铜钉头凸起。然后为降低每个凸起的高度偏差执行平坦化工艺。通过在NCA结合中允许凸起端部部分的形变量较大来加宽结合区域。而且，当由于凸起的高度不均匀而将过压施加到具体I/O上时，该工艺可防止损坏芯片。
另外，很容易排列和结合芯片和衬底以便可加宽结合区域。
使用的衬底是1mm厚的FR-4有机衬底，并且具有镍/铜/金引线，并且除了电极之外用焊料掩模保护。
NCA包括绝缘树脂和非导电粒子。在膜的情况中，作为聚合树脂，可使用固态环氧树脂、液态环氧树脂、苯氧基树脂和MEK/甲苯溶剂的混合物，并且作为硬化剂，可使用微胶囊咪唑硬化剂。在浆料的情况中，硬化剂可用在液态环氧树脂中。这里，可通过混合厚度小于1μm的经过表面处理的非导电粒子生成NCA，以便控制例如NCA的热膨胀系数等的物理特性。为了形成膜，通过使用Doctor Blade方法在分隔纸膜上形成膜，并且在80℃的温度下保留1分钟以便去除溶剂。尽管膜的厚度根据芯片凸起的尺寸变化，但是该膜具有10-50μm范围内的厚度以便可容纳各种凸起。
在有机衬底上施加通过所述工艺获得的NCA后，对准其中形成例如金钉头凸起的非焊料凸起的测试芯片。然后，通过同时施加热量、压力和超声波能量给芯片或仅施加超声波能量和压力给芯片执行倒装芯片结合。在衬底上施加NCA的工艺如下。如果NCA是膜类型的NCA，那么通过在80℃下以5kgf/cm2在衬底上预压具有膜的表面后，去除分隔纸膜可以将NCA施加到衬底上。如果NCA是浆料型的NCA，那么通过使用喷射装置或丝网印刷装置可以将恒定量的NCA以希望的形状施加到衬底上。因为NCA相对透明，所以容易实现衬底电极和芯片凸起的对准。
如同在ACA超声波结合工艺中那样，在使用超声波振动的热压结合工艺中或使用超声波振动的压缩工艺中，NCA的温度能比现有压缩工艺中升高得快很多。结果，在不从外部施加热量的情况下仅通过超声波能量就可快速实现NCA固化。另外，与现有NCA热压结合工艺施加每凸起100-150g的加工压力的情况不同，虽然每凸起施加20到70g，但是可通过稳定的NCA结合获得结合电阻，使得可以通过超声波结合工艺大大降低在使用NCA的倒装芯片结合中的加工压力。
图9示出通过使用超声波能量的ACA或NCA固化的柔性衬底和刚性衬底之间的结合工艺。
对于柔性衬底和刚性衬底的电连接，使用ACF/ACP或NCF/NCP的结合方法从与微间距方法发展趋势一致的使用焊料或插口的现有方法中脱颖而出。由于这个原因，对于微间距结合，使用无粘性类型的柔性衬底使得铜引线直接形成在聚酰亚胺基膜上有所增加。而且，甚至对于柔性衬底，其中粘合层存在于现有的聚酰亚胺基膜和铜引线之间，通过使用ACA或NCA可能执行结合。为此，在该实施例中，提供了具有从200μm间距到500μm间距的各种间距的无粘性类型的柔性衬底，并提供了具有1mm厚的FR-4衬底作为刚性衬底。
一般的可热固类型将使用厚度为40μm的ACF作为互连材料以及8μm的镀金镍粒子作为导电粒子。为了在柔性衬底和刚性衬底之间的结合期间与加工压力一起施加超声波能量，必须使用OLD或PCB结合器方法的超声波结合装置，而不是普通的倒装晶片结合器。也就是说，通过预压并向刚性衬底的结合区域施加ACF并且在柔性衬底电极和刚性衬底电极之间对准，然后在压缩工艺中在其上施加热超声波能量引发ACF的固化。而且，首先利用普通OLB或PCB结合器通过ACF预压缩柔性衬底和刚性衬底，然后，向柔性衬底施加超声波能量，获得柔性衬底和刚性衬底之间的结合。
对于柔性衬底和刚性衬底之间使用ACF的有效且可靠的结合工艺，可加热刚性衬底并且可以脉冲方式施加超声波能量。另外，显然每个纵向超声波能量和横向超声波能量可独立使用。
工业实用性
当电子器件之间结合时，在固化粘合剂的工艺中本发明能够无需从外部施加热量或施加相对低温的热量。
而且，本发明在热压结合工艺的情况下具有降低加工压力的效果。结果，本发明的结合工艺能够改善产量和生产率并提供具有极好的粘合强度和稳定性的结合工艺。

Claims (23)

1、一种在电气器件之间结合的方法，包括如下步骤：
在要结合的上部电气器件和下部电气器件的结合区域上对准电极；并且
通过向该上部电气器件和下部电气器件之间的粘合剂施加超声波能量固化该粘合剂并且由此使用来自粘合剂本身的热。
2、如权利要求1的电气器件之间结合的方法，其中粘合剂是导电粘合剂或非导电粘合剂。
3、如权利要求2的电气器件之间结合的方法，其中导电粘合剂是各向同性导电粘合剂。
4、如权利要求3的电气器件之间结合的方法，其中各向同性导电粘合剂包括选自由银、铜、金、碳、镍、钯、具有低熔点的焊料粉以及其组合组成的组中的其中一个作为导电粒子。
5、如权利要求3的电气器件之间结合的方法，其中各向同性导电粘合剂包括选自由环氧树脂、聚脂树脂、丙烯酸树脂、聚酰亚胺树脂以及聚砜树脂组成的组中的一种树脂。
6、如权利要求2的电气器件之间结合的方法，其中导电粘合剂是各向异性导电膜或各向异性导电浆料。
7、如权利要求6的电气器件之间结合的方法，其中导电粘合剂包括选自由涂金的聚合物粒子、涂金的镍粒子、涂金的铜粒子、涂敷低熔点焊料层的镍粒子、涂敷低熔点焊料层的铜粒子、低熔点焊料粒子以及其组合组成的组中的其中之一作为导电粒子。
8、如权利要求7的电气器件之间结合的方法，其中导电粘合剂进一步包括尺寸小于导电粒子的非导电粒子。
9、如权利要求7的电气器件之间结合的方法，其中导电粘合剂包括选自由环氧树脂、聚脂树脂、丙烯酸树脂、聚酰亚胺树脂以及聚砜树脂组成的组中的一种树脂。
10、如权利要求2的电气器件之间结合的方法，其中非导电粘合剂是非导电膜或非导电浆料。
11、如权利要求10的电气器件之间结合的方法，其中非导电粘合剂包括非导电粒子。
12、如权利要求10的电气器件之间结合的方法，其中非导电粘合剂包括选自由环氧树脂、聚脂树脂、丙烯酸树脂、聚酰亚胺树脂以及聚砜树脂组成的组中的一种树脂。
13、如权利要求1的电气器件之间结合的方法，其中上部和下部电气器件是半导体芯片和衬底，或半导体芯片和半导体芯片。
14、如权利要求13的电气器件之间结合的方法，其中半导体芯片是选自由显示驱动电路IC、图像传感器IC、存储器IC、非存储器IC、超高频或RFIC、具有硅作为主要成分的半导体IC以及化合物半导体IC组成的组中的一种半导体芯片。
15、如权利要求1的电气器件之间结合的方法，其中结合区域上的电极具有选自由金钉头凸起、铜钉头凸起、镀金凸起、镀铜凸起、无电镀镍/金凸起以及无电镀镍/铜/金凸起组成的组中的一个凸起。
16、如权利要求1的电气器件之间结合的方法，其中上部和下部电气器件是柔性衬底和刚性衬底或柔性衬底和柔性衬底，或刚性衬底和刚性衬底。
17、如权利要求16的电气器件之间结合的方法，其中柔性衬底表明金属引线形成在聚酰亚胺基上。
18、如权利要求16的电气器件之间结合的方法，其中刚性衬底是环氧树脂/玻璃、陶瓷、玻璃或硅的半导体衬底。
19、如权利要求1的电气器件之间结合的方法，其中超声波是纵向超声波振动、横向超声波振动或其组合。
20、如权利要求1的电气器件之间结合的方法，其中当施加超声波能量时，向所有或一些上部和下部结合区域施加热量。
21、如权利要求1的电气器件之间结合的方法，其中超声波振动频率是20kHz到60kHz。
22、如权利要求1的电气器件之间结合的方法，其中超声波振动的频率和振幅根据粘合剂的固化程度变化。
23、如权利要求1的电气器件之间结合的方法，其中超声波能量以预定频率不断地施加确定的时间或以脉冲形式施加。
CN2006800438289A 2005-11-24 2006-11-22 使用超声振动在电气器件之间结合的方法 Active CN101322233B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR10-2005-0113105 2005-11-24
KR1020050113105 2005-11-24
KR1020050113105A KR100746330B1 (ko) 2005-11-24 2005-11-24 초음파를 이용한 전자부품간의 접속방법
PCT/KR2006/004912 WO2007061216A1 (en) 2005-11-24 2006-11-22 Method for bonding between electrical devices using ultrasonic vibration

Publications (2)

Publication Number Publication Date
CN101322233A true CN101322233A (zh) 2008-12-10
CN101322233B CN101322233B (zh) 2011-04-20

Family

ID=38067402

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2006800438289A Active CN101322233B (zh) 2005-11-24 2006-11-22 使用超声振动在电气器件之间结合的方法

Country Status (6)

Country Link
JP (1) JP2009517861A (zh)
KR (1) KR100746330B1 (zh)
CN (1) CN101322233B (zh)
DE (1) DE112006003181T5 (zh)
TW (1) TWI306423B (zh)
WO (1) WO2007061216A1 (zh)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102157406A (zh) * 2011-01-20 2011-08-17 中南大学 芯片与树脂基板的超声振动粘接方法
CN103151467A (zh) * 2011-12-07 2013-06-12 乐金显示有限公司 集成有触摸屏的有机发光显示装置及其制造方法
CN103579164A (zh) * 2012-08-09 2014-02-12 日立化成株式会社 连接结构体
CN104157617A (zh) * 2014-07-29 2014-11-19 华为技术有限公司 芯片集成模块、芯片封装结构及芯片集成方法
CN104716115A (zh) * 2013-12-12 2015-06-17 恩智浦有限公司 传感器封装及其制造方法
CN105409144A (zh) * 2013-05-24 2016-03-16 富士胶片索诺声公司 高频超声探头
CN104051281B (zh) * 2014-06-13 2016-08-31 武汉理工大学 超声波振动辅助倒装芯片塑封成型下填充装置及方法
CN109803812A (zh) * 2016-10-07 2019-05-24 多种材料焊接股份公司 活化粘合剂的方法
CN112581863A (zh) * 2019-09-30 2021-03-30 三星显示有限公司 超声结合装置
CN112867288A (zh) * 2021-01-05 2021-05-28 江苏特丽亮镀膜科技有限公司 一种acf导电胶膜结构及其热压方法、热压组件

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4364928B2 (ja) * 2007-04-13 2009-11-18 積水化学工業株式会社 導電性微粒子、異方性導電材料及び導電接続構造体
KR100844430B1 (ko) * 2007-08-24 2008-07-08 (주)에이앤아이 전자부품간의 접속방법
DE102008050000A1 (de) * 2008-09-30 2010-04-01 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum gleichzeitigen mechanischen und elektrischen Verbinden von zwei Teilen
KR20100053016A (ko) * 2008-11-12 2010-05-20 한국과학기술원 접착제의 발열 온도 조절을 통한 전자부품간 접속 방법 및 접착제의 발열 온도 조절을 통한 전자부품간 접속 장치
KR101046590B1 (ko) 2009-02-16 2011-07-05 한국과학기술원 진동 에너지를 이용한 전자 부품 접합 방법 및 진동 에너지인가 장치
KR101051045B1 (ko) * 2009-06-02 2011-07-21 중앙대학교 산학협력단 도전성 접착제를 이용한 단자간 접속방법
KR101025620B1 (ko) * 2009-07-13 2011-03-30 한국과학기술원 초음파 접합용 이방성 전도성 접착제 및 이를 이용한 전자부품 간 접속방법
US8129220B2 (en) 2009-08-24 2012-03-06 Hong Kong Polytechnic University Method and system for bonding electrical devices using an electrically conductive adhesive
KR101582943B1 (ko) * 2009-10-15 2016-01-08 삼성디스플레이 주식회사 평판 표시 장치의 제조 방법
DE102010039339A1 (de) 2010-08-16 2012-08-09 Steffen Möglich Klebesystem
US9236360B2 (en) 2011-10-12 2016-01-12 Novatek Microelectronics Corp. IC chip package and chip-on-glass structure using the same
TWI492342B (zh) * 2011-10-12 2015-07-11 Novatek Microelectronics Corp 積體電路晶片封裝件和應用之玻璃覆晶基板結構
DE102013009234B4 (de) 2012-06-01 2019-10-02 Technische Universität Dresden Verfahren zur Herstellung elektrisch leitender Verbindungen zwischen Fügepartnern sowie eine Verwendung eines Polymers oder Polymergemischs
KR101348127B1 (ko) 2012-06-18 2014-01-07 손재설 히트싱크 일체형 회로기판의 제조방법
GB2520511A (en) 2013-11-21 2015-05-27 Surf Technology As Ultrasound transducer
KR101740006B1 (ko) * 2016-11-23 2017-06-09 지스마트 주식회사 내구성이 강화된 투명전광판용 연성회로기판 및 그 조립방법
KR101932337B1 (ko) 2017-04-12 2018-12-26 한국과학기술원 도전 입자의 이동을 제한하는 폴리머 층을 포함하는 이방성 전도 필름 및 수직 방향 초음파를 이용한 그 제조 방법
WO2018207547A1 (ja) * 2017-05-12 2018-11-15 コニカミノルタ株式会社 発光装置
GB2584106B (en) * 2019-05-21 2024-03-27 Pragmatic Printing Ltd Flexible electronic structure
JP7406955B2 (ja) * 2019-10-29 2023-12-28 セイコーインスツル株式会社 ２層片面フレキシブル基板、及び２層片面フレキシブル基板の製造方法
KR20220016364A (ko) 2020-07-30 2022-02-09 삼성디스플레이 주식회사 전자장치
GB2601325B (en) * 2020-11-25 2023-12-13 Pragmatic Semiconductor Ltd Support structures for flexible electronic circuits
TWI787685B (zh) * 2020-12-11 2022-12-21 力成科技股份有限公司 三維積體電路構裝及其製造方法
KR102520768B1 (ko) * 2021-04-21 2023-04-12 주식회사 경신전선 이방성 도전 필름을 이용한 회로장치의 초음파 접합방법

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07137042A (ja) * 1993-11-17 1995-05-30 San Giken Kk 硬化性樹脂の硬化方法
JPH10199935A (ja) * 1997-01-06 1998-07-31 Matsushita Electric Ind Co Ltd ワークの実装方法
TW396471B (en) * 1997-06-04 2000-07-01 Ibm Electrodeposition of low temperature, high conductivity, powder materials for electrically conductive paste formulations
JP4097379B2 (ja) * 1999-01-29 2008-06-11 松下電器産業株式会社 電子部品の実装方法及びその装置
JP3339450B2 (ja) * 1999-03-02 2002-10-28 株式会社村田製作所 表面波装置の製造方法
JP3351402B2 (ja) * 1999-04-28 2002-11-25 株式会社村田製作所 電子素子、弾性表面波素子、それらの実装方法、電子部品または弾性表面波装置の製造方法、および、弾性表面波装置
KR100367407B1 (ko) * 2000-03-31 2003-01-14 학교법인 한양학원 저접촉저항의 칩 접합방법
JP2002222405A (ja) * 2001-01-26 2002-08-09 Toppan Forms Co Ltd 荷物用タグおよびその製法
JP4526195B2 (ja) * 2001-01-26 2010-08-18 トッパン・フォームズ株式会社 荷物用紙製タグおよびその製法
JP2002288612A (ja) * 2001-03-27 2002-10-04 Toppan Forms Co Ltd 荷物用タグの製法
JPWO2003012863A1 (ja) * 2001-07-31 2004-12-09 株式会社ルネサステクノロジ 半導体装置及びその製造方法
JP4059497B2 (ja) * 2003-06-24 2008-03-12 日東電工株式会社 ダイボンド用接着フィルム、ダイシング・ダイボンド用接着フィルム、及び半導体装置

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102157406A (zh) * 2011-01-20 2011-08-17 中南大学 芯片与树脂基板的超声振动粘接方法
US9196876B2 (en) 2011-12-07 2015-11-24 Lg Display Co., Ltd. Touch screen integrated organic light emitting display device and method for fabricating the same
CN103151467A (zh) * 2011-12-07 2013-06-12 乐金显示有限公司 集成有触摸屏的有机发光显示装置及其制造方法
CN103151467B (zh) * 2011-12-07 2016-03-02 乐金显示有限公司 集成有触摸屏的有机发光显示装置及其制造方法
CN103579164A (zh) * 2012-08-09 2014-02-12 日立化成株式会社 连接结构体
US9907538B2 (en) 2013-05-24 2018-03-06 Fujifilm Sonosite, Inc. High frequency ultrasound probe
CN105409144A (zh) * 2013-05-24 2016-03-16 富士胶片索诺声公司 高频超声探头
CN105409144B (zh) * 2013-05-24 2019-05-03 富士胶片索诺声公司 高频超声探头
US10192842B2 (en) 2013-12-12 2019-01-29 Ams International Ag Package for environmental parameter sensors and method for manufacturing a package for environmental parameter sensors
CN104716115A (zh) * 2013-12-12 2015-06-17 恩智浦有限公司 传感器封装及其制造方法
CN104051281B (zh) * 2014-06-13 2016-08-31 武汉理工大学 超声波振动辅助倒装芯片塑封成型下填充装置及方法
CN104157617B (zh) * 2014-07-29 2017-11-17 华为技术有限公司 芯片集成模块、芯片封装结构及芯片集成方法
CN104157617A (zh) * 2014-07-29 2014-11-19 华为技术有限公司 芯片集成模块、芯片封装结构及芯片集成方法
US11462520B2 (en) 2014-07-29 2022-10-04 Huawei Technologies Co., Ltd. Chip integration module, chip package structure, and chip integration method
CN109803812A (zh) * 2016-10-07 2019-05-24 多种材料焊接股份公司 活化粘合剂的方法
CN112581863A (zh) * 2019-09-30 2021-03-30 三星显示有限公司 超声结合装置
CN112581863B (zh) * 2019-09-30 2024-03-08 三星显示有限公司 超声结合装置
CN112867288A (zh) * 2021-01-05 2021-05-28 江苏特丽亮镀膜科技有限公司 一种acf导电胶膜结构及其热压方法、热压组件
CN112867288B (zh) * 2021-01-05 2021-08-17 江苏特丽亮镀膜科技有限公司 一种acf导电胶膜结构及其热压方法、热压组件
WO2022148106A1 (zh) * 2021-01-05 2022-07-14 江苏特丽亮镀膜科技有限公司 一种acf导电胶膜结构及其热压方法、热压组件
US11545283B2 (en) 2021-01-05 2023-01-03 Jiangsu Telilan Coaling Technology Co., Ltd. Anisotropic conductive film (ACF) structure and hot-pressing method and hot-pressing assembly thereof

Also Published As

Publication number Publication date
KR100746330B1 (ko) 2007-08-03
TWI306423B (en) 2009-02-21
DE112006003181T5 (de) 2008-11-06
TW200724272A (en) 2007-07-01
JP2009517861A (ja) 2009-04-30
KR20070025889A (ko) 2007-03-08
WO2007061216A1 (en) 2007-05-31
CN101322233B (zh) 2011-04-20

Similar Documents

Publication Publication Date Title
CN101322233B (zh) 使用超声振动在电气器件之间结合的方法
KR100384314B1 (ko) 회로기판에의 전자부품 실장방법 및 장치
KR100838647B1 (ko) Ａｃｆ／ｎｃｆ 이중층을 이용한 웨이퍼 레벨 플립칩패키지의 제조방법
KR101057608B1 (ko) 단자간 접속 방법 및 반도체 장치의 실장 방법
JP4659262B2 (ja) 電子部品の実装方法及びペースト材料
EP0708582A1 (en) Electrically conductive paste materials and applications
JP4401411B2 (ja) 半導体チップを備えた実装体およびその製造方法
JPWO2006103949A1 (ja) フリップチップ実装方法および基板間接続方法
TW200527625A (en) Wafer-level chip scale package and method for fabricating and using the same
WO2007096946A1 (ja) 実装体及びその製造方法
KR20160128536A (ko) 고정된 도전볼 폴리머 필름층을 포함한 이방성 전도 필름 및 그 제조방법
KR20030090481A (ko) 비도전성 접착제로 ｉｃ 칩을 기판에 본딩하는 방법과형성된 조립물
Aschenbrenner et al. Adhesive flip chip bonding on flexible substrates
WO2009141949A1 (ja) 実装構造体の製造方法、および実装構造体
KR101211753B1 (ko) 고주파 전자기장을 이용한 전자부품 접속방법 및 장치
KR101753066B1 (ko) 도전성 입자를 포함하는 필름 및 이를 이용한 플립칩 패키지 제조방법
TW202105537A (zh) 電子零件裝置的製造方法及用於其的積層膜
KR20080052411A (ko) 반도체 장치와 그 제조 방법 및 반도체 장치의 실장 구조
JP2000058597A (ja) 電子部品実装方法
JP7434758B2 (ja) 電子部品装置を製造する方法、及び電子部品装置
JPH11204573A (ja) 半導体装置の製造方法および半導体装置
KR100310037B1 (ko) 복수개의집적회로칩을연성인쇄회로기판상에실장히기위한방법
TWI253159B (en) Combined soft and rigid sheet of flip chip substrate
JP6520101B2 (ja) 電子装置及び電子装置の製造方法
JP2012009580A (ja) 実装構造体の製造方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant