JP4401411B2 - 半導体チップを備えた実装体およびその製造方法 - Google Patents
半導体チップを備えた実装体およびその製造方法 Download PDFInfo
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- JP4401411B2 JP4401411B2 JP2007508084A JP2007508084A JP4401411B2 JP 4401411 B2 JP4401411 B2 JP 4401411B2 JP 2007508084 A JP2007508084 A JP 2007508084A JP 2007508084 A JP2007508084 A JP 2007508084A JP 4401411 B2 JP4401411 B2 JP 4401411B2
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
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Description
10a チップ表面(電極形成面)
12 電極端子
13 半田樹脂ペースト
14 接続端子
17 半田バンプ
19 半田集積物
20 電極パターン
21 中央領域
30 実装基板
31 中央領域
32 接続端子
35 チップ載置部
40 対流
50 ソルダーレジスト
100 実装体
110 回路基板
111 接続端子(電極)
112 対流添加剤
113 樹脂
114 平板
120 半導体チップ
121 電極端子
122 半田バンプ
122 接続体
130 対流
131 蒸気
132 成長する半田球
Claims (14)
- 半導体チップと、
前記半導体チップが実装される実装基板と
を備えた実装体であって、
前記半導体チップには、前記実装基板側に面するチップ表面に複数の電極端子が形成されており、
前記実装基板には、前記複数の電極端子のそれぞれに対応して、接続端子が形成されており、
前記実装基板の接続端子と、前記電極端子とは、自己集合的に形成された半田バンプによって一括して電気的に接続されており、
前記チップ表面、および、前記実装基板のうち当該チップ表面に対応する表面の少なくとも一方には、前記電極端子および前記接続端子に接続されていない電極パターンが形成されており、そして、前記電極パターンには半田が集積されている、実装体。 - 前記電極端子は、前記半導体チップの前記チップ表面の周縁領域に配置されており、
前記電極パターンは、前記実装基板のうち前記チップ表面の中央領域に対応する領域に形成されている、請求項1に記載の実装体。 - 前記電極端子は、前記半導体チップの前記チップ表面に二次元的に配列されており、
前記電極パターンは、前記チップ表面の中央領域および当該チップ表面の中央領域に対応する前記実装基板の領域の少なくとも一方に形成されている、請求項1に記載の実装体。 - 前記電極パターンは、前記実装基板に形成されたソルダーレジスト上に形成されている、請求項1に記載の実装体。
- 前記電極端子は、前記半導体チップの前記チップ表面の片側に形成されており、
前記チップ表面のうち前記片側と反対側にある他方領域、および、当該他方領域に対応する前記実装基板の領域の少なくとも一方には、前記電極パターンが形成されている、請求項1に記載の実装体。 - 前記半導体チップと前記実装基板との間には、半田粉と加熱により沸騰または分解して気体を放出する添加剤とを含む樹脂が充填されており、前記半田バンプは、前記樹脂を加熱することにより前記添加剤から放出された気体が前記樹脂中を対流することによって、前記樹脂中に分散して含有していた半田粉が前記電極端子と前記接続端子との間に自己集合して形成されたものからなる、請求項1に記載の実装体。
- 前記電極パターンに集積されている半田は、前記樹脂中に分散して含有していた半田粉が前記電極パターン上に自己集合して形成されたものからなる、請求項6に記載の実装体。
- 前記電極パターンは、前記実装基板の接続端子または前記半導体チップの電極端子と同時に形成された同じ材料で構成されている、請求項1に記載の実装体。
- 請求項1から8の何れか一つに記載の実装体を備えた電子機器。
- 電極端子が配列されたチップ表面を有する半導体チップを用意する工程(a)と、
前記半導体チップの前記電極端子に対応して配列された接続端子と、前記接続端子に電気的に接続されていない電極パターンとを有する実装基板とを用意する工程(b)と、
樹脂中に、半田粉が含有された半田樹脂ペーストを、前記実装基板上に付与する工程(c)と、
前記半導体チップを、前記半田樹脂ペーストを挟んで、前記実装基板の上に配置する工程(d)と、
前記半田樹脂ペーストを加熱することにより、前記半田樹脂ペースト中の前記半田粉を自己集合させて、それにより、前記半導体チップが有する電極端子と、前記電極端子に対応して前記実装基板に形成されている接続端子とを一括して電気的に接続する工程(e)と
を包含し、
前記工程(e)の際、余剰の半田粉は、前記電極パターンに集積されることを特徴とする、実装体の製造方法。 - 電極端子が配列されたチップ表面を有する半導体チップを用意する工程(a)と、
前記半導体チップの前記電極端子に対応して配列された接続端子を有する実装基板を用意する工程(b)と、
樹脂中に、半田粉が含有された半田樹脂ペーストを、前記実装基板上に付与する工程(c)と、
前記半導体チップを、前記半田樹脂ペーストを挟んで、前記実装基板の上に配置する工程(d)と、
前記半田樹脂ペーストを加熱することにより、前記半田樹脂ペースト中の前記半田粉を自己集合させて、それにより、前記半導体チップが有する電極端子と、前記電極端子に対応して前記実装基板に形成されている接続端子とを一括して電気的に接続する工程(e)と
を包含し、
前記工程(a)で用意される前記半導体チップの前記チップ表面には、前記電極端子と電気的に接続されていない電極パターンが形成されており、そして、前記工程(e)の際、余剰の半田粉は、前記電極パターンに集積されることを特徴とする、実装体の製造方法。 - 前記半田樹脂ペーストは、樹脂中に、当該樹脂が加熱されたときに沸騰する対流添加剤がさらに含有されており、
前記工程(e)で前記半田樹脂ペーストを加熱することにより、前記対流添加剤を沸騰させて前記樹脂に対流を発生させ、それにより、前記半田樹脂ペースト中の前記半田粉を自己集合させる、請求項10または11に記載の実装体の製造方法。 - 前記工程(a)で用意される前記半導体チップは、前記電極端子が前記チップ表面の周縁領域に配列されたペリフェラル型チップである、請求項10〜12の何れか一つに記載の実装体の製造方法。
- 前記半田樹脂ペーストに含まれている半田粉の量は、前記電極端子と前記接続端子とを一括して電気的に接続する接続部材となる半田バンプを構成する半田の量よりも多いことを特徴とする、請求項10〜12の何れか一つに記載の実装体の製造方法。
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US7531385B1 (en) * | 2005-03-29 | 2009-05-12 | Panasonic Corporation | Flip chip mounting method and method for connecting substrates |
WO2006123554A1 (ja) * | 2005-05-17 | 2006-11-23 | Matsushita Electric Industrial Co., Ltd. | フリップチップ実装体およびフリップチップ実装方法 |
US7537961B2 (en) * | 2006-03-17 | 2009-05-26 | Panasonic Corporation | Conductive resin composition, connection method between electrodes using the same, and electric connection method between electronic component and circuit substrate using the same |
WO2007122868A1 (ja) * | 2006-03-28 | 2007-11-01 | Matsushita Electric Industrial Co., Ltd. | バンプ形成方法およびバンプ形成装置 |
JP5560713B2 (ja) * | 2007-10-05 | 2014-07-30 | 日本電気株式会社 | 電子部品の実装方法等 |
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JP5050111B1 (ja) * | 2011-03-30 | 2012-10-17 | 株式会社東芝 | テレビジョン装置および電子機器 |
KR101940237B1 (ko) * | 2012-06-14 | 2019-01-18 | 한국전자통신연구원 | 미세 피치 pcb 기판에 솔더 범프 형성 방법 및 이를 이용한 반도체 소자의 플립 칩 본딩 방법 |
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US9230832B2 (en) * | 2014-03-03 | 2016-01-05 | International Business Machines Corporation | Method for manufacturing a filled cavity between a first and a second surface |
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