CN100495675C - 包括半导体芯片的组装体及其制造方法 - Google Patents

包括半导体芯片的组装体及其制造方法 Download PDF

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Publication number
CN100495675C
CN100495675C CNB2006800057925A CN200680005792A CN100495675C CN 100495675 C CN100495675 C CN 100495675C CN B2006800057925 A CNB2006800057925 A CN B2006800057925A CN 200680005792 A CN200680005792 A CN 200680005792A CN 100495675 C CN100495675 C CN 100495675C
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mentioned
semiconductor chip
resin
electrode terminal
solder flux
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CN101128925A (zh
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白石司
石丸幸宏
辛岛靖治
中谷诚一
矢部裕成
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
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    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
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    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

本发明公开了一种包括半导体芯片的组装体及其制造方法。目的在于：提供一种适于下世代半导体的倒装芯片式组装的、生产性及可靠性较高的包括半导体芯片的组装体及其制造方法。为包括半导体芯片(10)和组装基板(30)的组装体(100)，在半导体芯片(10)的面朝组装基板一侧的芯片表面(10a)形成有多个电极端子(12)，在组装基板(30)形成有对应于多个电极端子(12)的每一个电极端子的连接端子(32)，组装基板(30)的连接端子(32)与电极端子(12)通过自我聚集而成的焊剂凸块(17)同时电连接，在芯片表面(10a)、或者组装基板(30)中的对应于芯片表面(10a)的表面(35)形成有没有连接在电极端子(12)及连接端子(32)的电极图案(20)，且在电极图案(20)上聚集有焊剂(19)。

Description

包括半导体芯片的组装体及其制造方法
技术领域
[0001]本发明涉及一种包括半导体芯片的组装体及其制造方法。特别涉及生产性较高的使用了倒装芯片式组装的组装体。
背景技术
[0002]近年来，随着用在电子机器中的半导体集成电路(LSI)的高密度化及高集成化，LSI芯片的连接端子的多插针(pin)化及狭窄间距化正在急速发展。当将这些LSI芯片组装到布线基板上时，为了减少布线延迟，而在很多情况下使用倒装芯片式组装。在该倒装芯片式组装中，一般是在LSI芯片的连接端子上形成焊剂凸块，再通过该焊剂凸块，将该连接端子与形成在布线基板上的电极端子同时接合在一起的。
[0003]但是，为了将连接端子数超过5000那样的下世代LSI组装在布线基板上，必须要形成对应于100μm以下的狭窄间距的凸块，而通过现有焊剂凸块形成技术，却难以进行对应。并且，由于还必须形成对应于连接端子数的多个凸块，因此为了谋求低成本化，就要求在缩短每个芯片的装载节拍的情况下的较高生产性。
[0004]至今为止，开发有电镀法和丝网印刷法等作为凸块的形成技术。电镀法虽然适于狭窄间距，但工序较复杂，在生产性方面存在问题，而丝网印刷法虽然具有较高的生产性，但需要掩模，不适于狭窄间距化。
[0005]在这种情况下，最近开发了一些在LSI芯片和布线基板的电极上选择性地形成焊剂凸块的技术。由于这些技术不仅适合于形成微小凸块，而且能够统一形成，因此具有较高的生产性，作为能够适于将下世代LSI组装到布线基板上的技术而备受瞩目。
[0006]作为其中之一的技术，例如，存在有在专利文献1中所公开的技术。在该技术中，通过将由焊剂粉和熔剂(flux)的混合物而成的焊膏(solder paste)全面涂敷在表面形成有电极的基板上，对基板进行加热，来让焊剂粉溶化，在耐湿性较强的电极上选择性地形成焊剂凸块。
[0007]并且，例如，在专利文献2中所公开的技术中，通过将以有机酸铅盐和金属锡为主要成分的膏状组成物(化学反应析出型焊剂)全面涂敷在形成有电极的基板上，再对基板进行加热，来让Pb和Sn进行置换反应，在基板的电极上选择性地析出Pb/Sn的合金。
[0008]专利文献1中所公开的焊剂形成技术的目的在于：通过控制焊剂粉的表面氧化，来提高焊剂粉对于金属的耐湿性，同时，使邻接的端子之间难以产生短路。但是却难以仅仅通过氧化量、氧化方法来控制本来相反的特性。并且，由于专利文献2中所用的化学反应析出型焊剂的材料利用了特定的化学反应，因此可以选择的焊剂组成的自由度较低，且在无Pb(Pb—free)的对应方面也存在有课题。
[0009]但是，在使用了现有凸块形成技术的倒装芯片式组装中，为了在将半导体芯片装载在形成有凸块的布线基板之后，再将半导体芯片固定在布线基板上，必须具有将称为底部填充的树脂注入到半导体芯片与布线基板之间的工序。
[0010]于是，开发出了使用各向异性导电材料的倒装芯片式组装技术(例如，参照专利文献3)作为同时进行在半导体芯片和布线基板中的对着的电极端子之间的电连接、和将半导体芯片固定到布线基板上的方法。这是通过将含有导电粒子的热硬化性树脂提供到布线基板与半导体芯片之间，一边对半导体芯片进行加压，一边对热硬化性树脂进行加热，来同时实现半导体芯片与布线基板的电极端子之间的电连接、和将半导体芯片固定到布线基板上的。
专利文献1：日本特开2000—94179号公报
专利文献2：日本特开平1—157796号公报
专利文献3：日本特开2000—332055号公报
[0011]虽然在使用了上述各向异性导电材料的倒装芯片式组装中，通过导电粒子的机械接触得到了电极之间的电导通，但却难以获得稳定的导通状态。
[0012]并且，由于被对峙电极夹着的导电粒子是通过树脂的热硬化所产生的凝聚力而维持着的，因此必须具备热硬化性树脂的弹性率和热膨胀率等特性、及导电粒子的晶粒尺寸分布等特性，存在有难以对过程进行控制的课题。
[0013]即，为了让使用各向异性导电材料的倒装芯片式组装适用于连接端子数超过5000那样的下世代LSI芯片，在生产性和可靠性方面还存在有许多应该解决的课题。
发明内容
[0014]如上所鉴，本发明的主要目的在于：提供一种在生产性和可靠性方面较高的组装体(倒装芯片式组装体)及其制造方法。
[0015]本发明的组装体为包括半导体芯片和组装半导体芯片的组装基板的组装体。在半导体芯片中的面朝组装基板一侧的芯片表面形成有多个电极端子。在组装基板形成有对应于多个电极端子的每一个电极端子的连接端子。组装基板的连接端子和电极端子通过自我聚集而成的焊剂凸块同时电连接。在芯片表面、以及组装基板中的对应于该芯片表面的表面的其中至少之一，形成有没有连接在电极端子及上述连接端子上的电极图案，且在电极图案上聚集有焊剂。
[0016]在某适于本发明的实施例中，上述电极端子被配置在半导体芯片的芯片表面的周缘区域。电极图案形成在组装基板中的对应于芯片表面的中央区域的区域。
[0017]在半导体芯片的上述芯片表面，上述电极端子以二次元排列。
电极图案形成在芯片表面的中央区域及对应于芯片表面的中央区域的组装基板区域的其中至少之一。
[0018]在某适于本发明的实施例中，上述电极图案形成在形成在组装基板的阻焊剂上。
[0019]在某适于本发明的实施例中，上述电极端子形成在半导体芯片的芯片表面的一侧。在芯片表面中的位于与该一侧相反的另一侧的区域、及对应于该另一侧区域的组装基板的区域的其中至少之一形成有电极图案。
[0020]在某适于本发明的实施例中，在半导体芯片与组装基板之间填充有树脂，焊剂凸块是由在树脂中分散所含的焊剂粉在电极端子与连接端子之间自我聚集而成的。
[0021]在某适于本发明的实施例中，聚集在电极图案的焊剂是由在树脂中分散所含的焊剂粉自我聚集在电极图案上而成的。
[0022]上述电极图案与组装基板的连接端子或半导体芯片的电极端子同时形成，且由相同材料构成。
[0023]本发明的电子机器为包括上述组装体的电子机器。
[0024]本发明的组装体的制造方法，其特征在于，包括：工序a，准备好具有排列有电极端子的芯片表面的半导体芯片；工序b，准备好具有对应于半导体芯片的电极端子而排列的连接端子、和没有与连接端子电连接的电极图案的组装基板；工序c，将在树脂中含焊剂粉而成的焊剂树脂浆提供给组装基板上；工序d，夹着焊剂树脂浆将半导体芯片配置在组装基板上；以及工序e，通过将焊剂树脂浆加热，来让焊剂树脂浆中的焊剂粉自我聚集，以使半导体芯片具有的电极端子和对应于电极端子形成在组装基板的连接端子同时电连接。在工序e中，剩余的焊剂粉聚集在电极图案上。
[0025]本发明的其它组装体的制造方法，其特征在于，包括：工序a，准备好具有排列有电极端子的芯片表面的半导体芯片；工序b，准备好对应于半导体芯片的电极端子而排列的连接端子；工序c，将在树脂中含焊剂粉而成的焊剂树脂浆提供到组装基板上；工序d，夹着焊剂树脂浆将半导体芯片配置在组装基板上；以及工序e，通过将焊剂树脂浆加热，来让焊剂树脂浆中的焊剂粉自我聚集，以使半导体芯片具有的电极端子和对应于电极端子形成在组装基板的连接端子同时电连接。在工序a中准备的半导体芯片的芯片表面形成有没有与电极端子电连接的电极图案，且在工序e中，剩余的焊剂粉聚集在电极图案上。
[0026]在某适于本发明的实施例中，上述焊剂树脂浆还含有在该树脂被加热时沸腾的对流添加剂。通过在上述工序e中将焊剂树脂浆加热，来让对流添加剂沸腾，让树脂产生对流，以使焊剂树脂浆中的焊剂粉自我聚集。
[0027]在某适于本发明的实施例中，在上述工序a中准备的半导体芯片为将电极端子排列在芯片表面的周缘区域的外围型芯片。
[0028]在某适于本发明的实施例中，含在上述焊剂树脂浆中的焊剂粉的量，多于构成焊剂凸块的焊剂量，该焊剂凸块成为将电极端子与连接端子同时电连接的连接部件。
(发明的效果)
[0029]根据本发明，在包括组装半导体芯片的组装基板的组装体中，组装基板的连接端子和半导体芯片的电极端子通过自我聚集而成的焊剂凸块同时电连接，在半导体芯片的芯片表面、以及组装基板中的对应于该芯片表面的表面的其中至少之一，形成有没有连接在电极端子和连接端子的电极图案，且在电极图案上聚集有焊剂。因此，即使在焊剂粉较多的情况下，也能够通过该电极图案选择性地聚集剩余的焊剂粉，能够获得防止产生相邻电极之间的电短路、连接短路等不良情况的效果。从而能够实现生产性和可靠性较高的组装体。
附图的简单说明
[0030]图1(a)～图1(c)为说明专利申请2004—257206号中所公开的制造工序用的工序剖面图。
图2(a)～图2(c)为说明专利申请2004—267919号中所公开的制造工序用的工序剖面图。
图3为表示透视外围型配置的半导体芯片的平面图。
图4为表示透视外围型配置的半导体芯片的平面图。
图5为示意地表示用在本发明的实施例所涉及的组装体中的半导体芯片的电极形成面的平面图。
图6为示意地表示用在本发明的实施例所涉及的组装体中的组装基板的平面图。
图7(a)～图7(c)为说明本发明的实施例所涉及的组装体的制造方法用的工序剖面图。
图8(a)～图8(b)为说明本发明的实施例所涉及的组装体的制造方法用的工序剖面图。
图9(a)～图9(b)为说明本发明的实施例所涉及的组装体的制造方法用的工序剖面图。
图10为示意地表示用在本发明的实施例所涉及的组装体中的组装基板的平面图。
图11为示意地表示用在本发明的实施例所涉及的组装体中的组装基板的平面图。
图12为示意地表示用在本发明的实施例所涉及的组装体中的组装基板的平面图。
图13为示意地表示用在本发明的实施例所涉及的组装体中的组装基板的平面图。
(符号的说明)
[0031]10—半导体芯片；10a—芯片表面(电极形成面)；12—电极端子；13—焊剂树脂浆；14—连接端子；17—焊剂凸块；19—焊剂聚集物；20—电极图案；21—中央区域；30—组装基板；31—中央区域；32—连接端子；35—芯片放置部；40—对流；50—阻焊剂；100—组装体；110—电路基板；111—连接端子(电极)；112—对流添加剂；113—树脂；114—平板；120—半导体芯片；121—电极端子；122—焊剂凸块；122—连接体；130—对流；131—蒸气；132—成长的焊剂球。
具体实施方式
[0032]本案申请人开发出了能够让焊剂在规定条件下自我聚集，来形成焊剂凸块或进行倒装芯片式组装的独特技术，该技术被公开在专利申请2004—257206号说明书及专利申请2004—267919号说明书中。这里，一边参照图1(a)到图1(c)，一边对通过自我聚集来形成焊剂凸块的技术加以简单说明。
[0033]图1(a)表示在将含有焊剂粉及对流添加剂的树脂113提供到基板110上之后，再让平板114接触到树脂113的表面，将基板110加热到焊剂粉溶化的温度为止的状态。另外，在图中，省略了在树脂中所含的焊剂粉及对流添加剂。
[0034]在将基板的加热温度预先设定为高于对流添加剂的沸点之后，再对基板进行加热的话，焊剂粉在溶化的同时，对流添加剂也会沸腾，如图1(a)中所示的箭头那样，沸腾的对流添加剂成为气体，在树脂113中对流(箭头130)。该沸腾的对流添加剂的对流促进了溶化的焊剂粉在树脂中的移动，使焊剂粉之间的结合均匀进行。
[0035]如图1(b)所示，溶化的焊剂粉之间结合在一起，成长为大小均匀的焊剂球132。由于溶化的焊剂粉相对于电极111的耐湿性较高，相对于基板110的耐湿性较低，因此成长的焊剂球132选择性地自我聚集在电极111上。并且，在自我聚集进行之后，形成在电极111上的焊剂球132成长为接触到平板114的大小，在电极111上形成大小均匀的焊剂球(凸块)115，如图1(c)所示。
[0036]另外，图1(a)、图1(b)中的箭头所示的对流添加剂的对流方向是示意表示的方向，如图1(a)、图1(b)所示：沸腾的对流添加剂从设置在基板110与平板114之间的间隙周边部开始，成为蒸气131向外部蒸发。这里，对流添加剂的“对流”是指作为运动方式的对流，通过在树脂113中沸腾的对流添加剂的运动，来将运动能量给予分散在树脂113中的焊剂粉，只要是起到促进焊剂粉的移动的作用的运动，可以是任何方式的运动。
[0037]在将该焊剂凸块的形成适用于倒装芯片式组装的技术中时，成为图2(a)到图2(c)所示的过程。
[0038]首先，如图2(a)所示，将含有无图示的金属粒子(例如，焊剂粉)及对流添加剂112的树脂113提供到形成有多个连接端子111的电路基板110上。另外，与上述内容一样，对流添加剂112为树脂113被加热时沸腾，让树脂产生对流的添加剂。
[0039]其次，如图2(b)所示，让具有多个电极端子121的半导体芯片120接触到树脂113的表面。此时，将半导体芯片120的电极端子121配置为与电路基板110的连接端子111对着。并且，在此状态下，对树脂113进行加热。这里，用高于金属粒子的熔点及对流添加剂112的沸点的温度对树脂113进行加热。
[0040]因加热而溶化的金属粒子在树脂113中相互结合在一起，如图2(c)所示，在耐湿性较高的连接端子111与电极端子121之间自我聚集。形成将半导体芯片120的电极端子121与电路基板110的连接端子111之间电连接的连接体122。然后，让树脂113硬化，让半导体芯片120固定在电路基板110。
[0041]由本案申请人所开发的该技术的特征在于：通过对树脂113进行加热，让含在树脂113中的对流添加剂112沸腾，让沸腾的对流添加剂112在树脂113中产生对流，来促进分散在树脂113中的金属粒子的移动。从而能够使金属粒子的结合均匀进行，自我聚集地形成连接体(焊剂凸块)122。这里，可以认为树脂113起到了能够使金属粒子自由浮游、移动的“海”的作用，但由于金属粒子之间的结合过程在极短的时间内结束，因此尽管设置有使金属粒子能够自由移动的“海”，也只能进行局部的结合，故而，通过将成为该“海”的树脂113和对流添加剂112的对流组合在一起，来自我聚集地形成焊剂凸块122。另外，焊剂凸块122是在以自我聚集的方式形成的同时，因焊剂凸块的性质而自调整的。
[0042]图3及图4表示透视半导体芯片120的情况，该半导体芯片120是将电极端子121形成在芯片面周缘的外围型配置的半导体芯片120。在图3所示的例子中，在电极端子121上适当地形成有焊剂凸块122，在图4所示的例子中，留有焊剂积存处135。在图2(a)到图2(c)所示的倒装芯片式组装技术中，如果规定好恰当的条件的话，能够抑制焊剂积存处135的产生，但在让很多焊剂粉含在树脂113中的情况下，剩余的焊剂粉很容易变成焊剂积存处135。尤其是，如图1(a)及图1(b)所示，虽然在外缘部存在的剩余的焊剂粉很容易因对流添加剂的蒸气131的效果而向外排出，但在中央部存在的焊剂粉却有可能变成焊剂积存处135。与区域阵列配置的半导体芯片相比，该倾向在外围型配置的半导体芯片中更加明显。虽然有时焊剂积存处135不会引起任何问题，但如果在附近存在有连接端子的话，有可能会产生连接短路那样的问题。
[0043]于是，本案发明人为了解决该焊剂积存处的问题，对该自我聚集的倒装芯片式组装技术的内容进行了研究探讨，结果找到了解决该问题的方法，获得了本发明。
[0044]以下，参照附图，对本发明的实施例加以说明。在以下的附图中，为了使说明简单化，而用同一参照符号表示实际上具有同一功能的构成要素。另外，本发明并不限于以下的实施例。
[0045]参照图5到图7，对本发明的实施例所涉及的组装体100及其制造方法加以说明。
[0046]图5示意地表示用在本实施例的组装体100中的半导体芯片10的电极形成面10a的平面结构。在图5所示的半导体芯片10中，在面朝组装基板一侧的芯片表面(芯片形成面)10a形成有多个电极端子(电极垫)12。在芯片表面10a还形成有没有连接到电极端子12的电极图案20。在该电极图案20上聚集有焊剂，从而能够防止因焊剂积存处(图4中的“135”)而产生的短路，后面将进行详细说明。
[0047]这里，“没有连接到电极端子的电极图案”最典型的是指没有用的虚拟垫(pad)，包括与电极端子具有不同功能的端子，例如，检查用端子等，用以接触到接地端的端子等。在这些端子上也聚集有焊剂，起到防止因焊剂积存处而引起的短路的作用。
[0048]在该例子中，电极端子12被配置在半导体芯片10的芯片表面10a的周缘区域，电极图案20形成在中央区域21。在形成有电极图案20的区域21没有形成电极端子12。另外，在图示的结构中，用相同的形状或面积的图案形成电极图案20和电极端子12。通过使用相同图案，来提高设计及制造的方便性。
[0049]虽然应该配置电极图案20的地方或者应该配置电极图案20的个数随着电极端子12的配置状况(大小、间距等)和所要求的成品率等的不同而不同，但是最好在半导体芯片10内，以尽可能均匀分散的方式来配置规定个数的电极图案20。
[0050]在图5所示的结构中，在半导体芯片10的芯片表面10a形成有电极图案20，也可以将聚集剩余的焊剂的电极图案20设置在组装基板一侧。图6示意地表示形成有电极图案20的组装基板30的平面结构。
[0051]在图6所示的组装基板30形成有对应于半导体芯片10的各电极端子12的连接端子32。在此例子中，在组装基板30中的芯片放置部35的周边区域形成有连接端子32。在芯片放置部35的中央区域31形成有聚集剩余的焊剂的电极图案20。在该中央区域31没有形成连接端子32。在此例子中，也用相同形状来形成电极图案20和连接端子32。
[0052]在一般情况下，由于组装基板30的布线图案的密度低于半导体芯片10的布线图案的密度，因此将电极图案20形成在组装基板30一侧的话，更容易配置。并且，由于如果隔着绝缘膜将电极图案20形成在形成在半导体芯片10的布线图案上的话，恐怕会产生不需要的噪音和成为寄生电容的产生源，因此最好将电极图案20形成在组装基板30一侧。
[0053]利用图6所示的那样的形成有聚集剩余的焊剂的电极图案20的组装基板30，继续对采用了本实施例的制造方法的例子加以说明。
[0054]首先，如图7(a)所示，准备好形成有聚集剩余的焊剂用的电极图案20和连接端子32的组装基板30，再将在树脂中添加有焊剂粉和对流添加剂的焊剂树脂浆13提供到该组装基板30上，同时，装载半导体芯片10。在半导体芯片10的芯片表面10a形成有电极端子12。对流添加剂为在该树脂被加热时沸腾的添加剂，例如，为有机熔剂。
[0055]其次，在对焊剂树脂浆13进行加热之后，如图7(b)所示，焊剂树脂浆13中的对流添加剂沸腾，在树脂中产生对流40。如图7(c)所示，使焊剂树脂浆13中的焊剂粉自我聚集，形成焊剂凸块17，半导体芯片10的电极端子12和组装基板30的连接端子32通过该焊剂凸块17而同时电连接。
[0056]在本实施例中，由于在连接端子32之外，还形成有电极图案20，因此在图7(b)到图7(c)所示的自我聚集的工序中，剩余的焊剂粉聚集在电极图案20上，成为焊剂聚集物19。从而能够防止因剩余的焊剂粉而产生焊剂积存处的情况。能够获得本实施例的组装体100。
[0057]在图7(a)到图7(c)所示的制造方法中，在组装基板30形成有电极图案20，也可以在半导体芯片10形成有图5所示的电极图案20。并且，也可以将电极图案20形成在半导体芯片10和组装基板30这两方。电极图案20的个数既可以是一个，也可以是如图5或图6所示的那样的多个。
[0058]在本实施例的结构中，通过自我聚集而成的焊剂凸块17使组装基板30的连接端子32与电极端子12同时电连接，该自我聚集而成的焊剂凸块(焊剂部件)17不是将预先做好的焊剂凸块配置在电极端子12上而成的，而是经过上述规定的过程，在电极端子12及连接端子14之间成长而成的。
[0059]构成焊剂凸块(焊剂部件)17的金属(焊剂)为低熔点金属，例如，为Sn—Ag类焊剂(也包含添加了Cu等的物质)。另外，并不限于Sn—Ag类焊剂(也包含添加了Cu等的物质)，只要是具有100～300℃范围的熔点的低熔点金属的话，就能够使用，例如，能够将Sn—Zn类、Sn—Bi类焊剂等无Pb焊剂、Pb—Sn共晶焊剂、或者Cu—Ag合金等低熔点金属等用作其它焊剂粉。并且，焊剂凸块17的形状有可能为图1或图2所示的那样的中间鼓出的大致为球状的形状，或者与其相反的中间变细的鼓状形状，在图7中，为了容易表示，将其表示为柱状。实际的焊剂凸块17的形状取决于各种条件。
[0060]构成焊剂凸块17用的焊剂(焊剂粉)含在焊剂树脂浆13中，焊剂树脂浆13中的焊剂粉的量多于构成使电极端子12与连接端子32同时电连接的焊剂凸块17的焊剂量。这是因为焊剂树脂浆13中的焊剂粉并不都变成焊剂凸块17，而是通过对流添加剂的对流和蒸气(图1中的“131”)排出到外部。并且，虽然考虑到该排出的影响，而让剩余的焊剂粉预先含在焊剂树脂浆13中，但由于在本实施例的结构中，形成有电极图案20，因此能够回避由剩余的焊剂所产生的焊剂积存处的问题。
[0061]图7所示的组装基板30为刚性基板(典型的印刷基板)，形成在组装基板30的连接端子32例如由铜构成，构成为布线电路的一部分。从组装基板30的制造工序来看，最好用相同材料构成电极图案20和连接端子32，但只要能够聚集焊剂的话，也可以用其它材料(例如，金、铜、锡类合金那样的金属)。另外，还能够将软性基板用作组装基板30。
[0062]本实施例的半导体芯片10例如为裸芯片(barechip)。裸芯片10的厚度例如为50～400μm。为了降低组装体100的高度，最好将例如厚度为100μm以下的薄型半导体芯片用作半导体芯片10。虽然从抑制产生焊剂积存处的效果出发，最好使用将电极端子12排列(外围型排列)在芯片表面10a的周缘区域的半导体芯片10，但也可以将本实施例的技术适用于区域阵列排列的半导体芯片10中。电极端子12例如由铝构成。在将电极图案20形成在半导体芯片10一侧时，能够使用与电极端子12的材料相同的材料。不过，只要能够聚集焊剂的话，也可以使用与电极端子12的材料不同的材料(例如，金、铜、锡类合金那样的金属)。
[0063]图7(c)所示的树脂13起到了倒装芯片式组装中的底部填充树脂的作用。在此例子中，将环氧树脂等热硬化性树脂用作树脂13。虽然在本实施例中，将含有树脂被加热时沸腾的对流添加剂(无图示)和焊剂粉(无图示)的焊剂树脂浆13涂敷在组装基板30上，然后，以夹着焊剂树脂浆13的方式，将半导体芯片10配置在了组装基板30上，但是也可以以用焊剂树脂浆13填充底部的方式，来填充半导体芯片10与组装基板30之间。并且，如图所示，以使焊剂树脂浆13覆盖半导体芯片10的芯片表面(电极形成面)10a及组装基板30的一部分(包括连接端子32的部位)的方式来提供该焊剂树脂浆13。
[0064]本实施例的焊剂树脂浆13在树脂中含有焊剂粉、和该树脂被加热时沸腾的对流添加剂，如上所述。换句话说，焊剂树脂浆13由树脂、分散在树脂中的焊剂粉(无图示)和该树脂被加热时沸腾的对流添加剂(无图示)构成。在本实施例中，将热硬化性树脂(例如，环氧树脂)用作树脂，将无Pb焊剂粉用作焊剂粉。能够将熔剂(例如，高沸点有机熔剂)用作对流添加剂，例如，能够使用异丙基乙醇、乙酸丁酯(butyl acetate)、二甘醇—丁醚(butyl carbitol)、乙二醇等。虽然对于对流添加剂在树脂中的含有量并没有特别限制，但是最好以重量百分比为0.1～20％的比率使其含在树脂中。
[0065]如上所述，对流添加剂的“对流”是指作为运动方式的对流，通过在树脂中沸腾的对流添加剂的运动，来将运动能量给予分散在树脂中的金属粒子(焊剂粉)，只要是起到促进金属粒子的移动作用的运动，可以是任何方式的运动。另外，对流添加剂除了其自身沸腾来产生对流的添加剂以外，还能够用通过对树脂加热来产生气体(H2O、CO2、N2等气体)的对流添加剂，能够举出含有结晶水的化合物、因加热而分解的化合物或者发泡剂来作为这样的例子。
[0066]图7(a)到图7(c)中的焊剂凸块17的形成时间因条件不同而不同，例如，为5秒～30秒左右(最典型的大约为5秒)。另外，能够在焊剂凸块17的形成中，导入事先对焊剂树脂浆13进行加热的预热工序。
[0067]焊剂凸块17在自我聚集形成的同时，还相对于电极端子12及连接端子14自调整。因此，实际上没有电极端子12及连接端子14、与焊剂凸块17之间的位置偏离，能够自动地对应于电极端子12及连接端子14的图案来形成焊剂凸块17。
[0068]由于焊剂凸块17是由焊剂树脂浆13中的焊剂粉自我聚集而成，因此在形成了焊剂凸块17之后，在构成焊剂树脂浆13的树脂中实际上不含导电粒子，邻接的焊剂凸块17之间通过图7(c)中的树脂13而被绝缘。并且，对流添加剂通过加热而成为气体，排出到外部，从焊剂树脂浆13中除掉。另外，还能够在形成了焊剂凸块17之后，洗掉焊剂树脂浆13，然后，填充其它树脂(也可以是相同种类的树脂)。
[0069]在让构成焊剂树脂浆13的树脂(或者其它树脂)硬化之后，就能够获得图7(c)中的本实施例的组装体100，在填充该其它树脂时，也可以将热硬化性树脂以外的树脂(热可塑性树脂、光硬化性树脂等)用作构成焊剂树脂浆13的树脂。
[0070]也可以将本实施例的电极图案20形成在阻焊剂上使用。在图8(a)中，在组装基板30上形成阻焊剂50，在该阻焊剂50上形成有电极图案20。在对于图8(a)所示的结构执行了自我聚集过程之后，就能够获得图8(b)所示的那样的组装体100。
[0071]并且，如图9(a)所示，也可以使用形成了阻焊剂50的组装基板30和形成了电极图案20的半导体芯片10。在对于图9(a)所示的结构执行了自我聚集过程之后，就能够获得图9(b)所示的那样的组装体100。
[0072]其次，参照图10到图13，对本实施例的变形例加以说明。
[0073]图10表示在组装基板30上形成了圆形电极图案20的例子。该电极图案20具有大于连接端子32的面积(例如，3倍以上)，起到聚集剩余焊剂的作用。
[0074]图11表示在组装基板30上形成了连续的电极图案20的例子。在此例子中，表示矩形连续体(这里的“田”字)的电极图案20。也可以使这样的电极图案20为对应于例如半导体芯片10的IP核心(IP core)的边界的形状。根据条件的不同，也可以通过聚集在电极图案20上的焊剂使其具有防护(shield)效果。
[0075]图12表示在组装基板30上形成了梳形电极图案20的例子。在本实施例中，示出了在几何学上为对称形的电极图案20，也可以采用其它电极图案20的形状。不过，如果是在几何学上具有规则性的形状的话，则更容易设计，也更容易预测出其效果。
[0076]图13表示适用于单侧电极IC用的组装基板30的例子。在图13所示的组装基板30中，在芯片表面10a一侧的列上形成有对应于形成了电极端子12的半导体芯片10的连接端子32，在与该连接端子32的列相反的一侧形成有电极图案20。能够通过电极图案20沉积剩余的焊剂，同时，能够缓和半导体芯片10的高度偏离。
[0077]在图10到图13中，示出了在组装基板30形成有各种电极图案20的例子，也可以将那样的电极图案20形成在半导体芯片10的芯片表面10a。
[0078]以上，对适于本发明的实施例加以了说明，不用说并不限定于这些描述，能够具有各种各样的变化。
[0079]作为半导体芯片10，较典型的是存储器IC芯片、逻辑IC芯片、或者系统LSI芯片，对于其种类并不加以特别限定。在上述本发明的实施例中，对半导体芯片(半导体元件)10为裸芯片的情况加以了说明，并不限定于裸芯片，例如，也可以将芯片尺寸封装(CSP)那样的半导体封装用作半导体芯片10。而且，半导体芯片10也可以是使裸芯片等半导体元件通过中间基板而被模块化的芯片。该模块包括多个电极(组装用端子)，作为那样的模块，包括RF模块、电源模块等。另外，除了用中间基板进行模块化的以外，也可以是包括多个组装用端子的部品内藏基板模块(例如，SIMPACTTM)那样的模块。
[0080]并且，本发明的实施例所涉及的组装体100可以装载在组装面积受到限制的那样的薄型、小型电子机器中。而且，并不限定于携带电话，能够用在PDA、笔记本电脑中，还可以适用于其它用途(例如，数字静像摄影机、壁挂式薄型电视机(FPD；平板显示器)中。
[0081]另外，在本发明的实施例的组装体100的制造方法中，将含有树脂被加热时沸腾的对流添加剂的树脂浆用作了焊剂树脂浆13，即使用不含该对流添加剂的焊剂树脂浆13，也能够通过形成电极图案20，来发挥防止由焊剂积存处造成的短路的效果。
(工业上的利用可能性)
[0082]使用本发明，能够提供一种在生产性和可靠性方面较高的组装体(倒装芯片式组装体)及其制造方法。

Claims (15)

1、一种组装体，包括半导体芯片和组装上述半导体芯片的组装基板，其特征在于：
在上述半导体芯片中的面朝上述组装基板一侧的芯片表面形成有多个电极端子；
在上述组装基板形成有对应于上述多个电极端子的每一个电极端子的连接端子；
上述组装基板的连接端子与上述电极端子通过自我聚集而成的焊剂凸块而同时电连接；
在上述芯片表面、以及上述组装基板中的对应于该芯片表面的表面的其中至少之一，形成有没有连接在上述电极端子及上述连接端子上的电极图案，且在上述电极图案上聚集有焊剂。
2、根据权利要求1所述的组装体，其特征在于：
上述电极端子被配置在上述半导体芯片的上述芯片表面的周缘区域；
上述电极图案形成在上述组装基板中的对应于上述芯片表面的中央区域的区域。
3、根据权利要求1所述的组装体，其特征在于：
上述电极端子在上述半导体芯片的上述芯片表面以二次元排列；
上述电极图案形成在上述芯片表面的中央区域、及对应于该芯片表面的中央区域的上述组装基板的区域的其中至少之一。
4、根据权利要求1所述的组装体，其特征在于：
上述电极图案在形成在上述组装基板的阻焊剂上形成。
5、根据权利要求1所述的组装体，其特征在于：
上述电极端子形成在上述半导体芯片的上述芯片表面的一侧；
在上述芯片表面中的与上述一侧相反的另一侧的区域、以及对应于该另一侧的区域的上述组装基板的区域的其中至少之一形成有上述电极图案。
6、根据权利要求1所述的组装体，其特征在于：
在上述半导体芯片与上述组装基板之间填充有树脂，上述焊剂凸块是由在上述树脂中分散所含的焊剂粉在上述电极端子与上述连接端子之间自我聚集而成的。
7、根据权利要求6所述的组装体，其特征在于：
聚集在上述电极图案上的焊剂是由在上述树脂中分散所含的焊剂粉自我聚集在上述电极图案上而成的。
8、根据权利要求1所述的组装体，其特征在于：
上述电极图案与上述组装基板的连接端子或者上述半导体芯片的电极端子同时形成，且由相同材料构成。
9、一种电子机器，其特征在于：
包括权利要求1到8中任意一项所述的组装体。
10、一种组装体的制造方法，其特征在于：
包括：工序a，准备好具有排列有电极端子的芯片表面的半导体芯片，
工序b，准备好具有连接端子和电极图案的组装基板，该连接端子对应于上述半导体芯片的上述电极端子排列，该电极图案没有与上述连接端子电连接，
工序c，将在树脂中含有焊剂粉而成的焊剂树脂浆提供到上述组装基板上，
工序d，夹着上述焊剂树脂浆将上述半导体芯片配置在上述组装基板上，以及
工序e，通过对上述焊剂树脂浆进行加热，来让上述焊剂树脂浆中的上述焊剂粉自我聚集，从而使上述半导体芯片所具有的电极端子、与对应于上述电极端子而形成在上述组装基板的连接端子同时电连接；
在上述工序e中，剩余的焊剂粉聚集在上述电极图案上。
11、一种组装体的制造方法，其特征在于：
包括：工序a，准备好具有排列有电极端子的芯片表面的半导体芯片，
工序b，准备好具有连接端子的组装基板，该连接端子对应于上述半导体芯片的上述电极端子排列，
工序c，将在树脂中含有焊剂粉而成的焊剂树脂浆提供到上述组装基板上，
工序d，夹着上述焊剂树脂浆将上述半导体芯片配置在上述组装基板上，以及
工序e，通过对上述焊剂树脂浆进行加热，来让上述焊剂树脂浆中的上述焊剂粉自我聚集，从而使上述半导体芯片所具有的电极端子、与对应于上述电极端子而形成在上述组装基板的连接端子同时电连接；
在上述工序a中所准备的上述半导体芯片的上述芯片表面形成有没有与上述电极端子电连接的电极图案，且在上述工序e中，剩余的焊剂粉聚集在上述电极图案上。
12、根据权利要求10所述的组装体的制造方法，其特征在于：
上述焊剂树脂浆在树脂中还含有该树脂在被加热时沸腾的对流添加剂；
通过在上述工序e中对上述焊剂树脂浆进行加热，来让上述对流添加剂沸腾，让上述树脂产生对流，从而让上述焊剂树脂浆中的上述焊剂粉自我聚集。
13.根据权利要求11所述的组装体的制造方法，其特征在于：
上述焊剂树脂浆在树脂中还含有该树脂在被加热时沸腾的对流添加剂；
通过在上述工序e中对上述焊剂树脂浆进行加热，来让上述对流添加剂沸腾，让上述树脂产生对流，从而让上述焊剂树脂浆中的上述焊剂粉自我聚集。
14、根据权利要求10到13中任意一项所述的组装体的制造方法，其特征在于：
在上述工序a中所准备的上述半导体芯片为将上述电极端子排列在上述芯片表面的周缘区域的外围型芯片。
15、根据权利要求10到13中任意一项所述的组装体的制造方法，其特征在于：
含在上述焊剂树脂浆中的焊剂粉的含量，多于构成焊剂凸块的焊剂量，该焊剂凸块成为使上述电极端子与上述连接端子同时电连接的连接部件。
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