CN102157406A - 芯片与树脂基板的超声振动粘接方法 - Google Patents

芯片与树脂基板的超声振动粘接方法 Download PDF

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CN102157406A
CN102157406A CN 201110022690 CN201110022690A CN102157406A CN 102157406 A CN102157406 A CN 102157406A CN 201110022690 CN201110022690 CN 201110022690 CN 201110022690 A CN201110022690 A CN 201110022690A CN 102157406 A CN102157406 A CN 102157406A
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ultrasonic vibration
resin substrate
bonding
chip
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蔺永诚
方晓南
金浩
姜玉强
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Central South University
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector

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Abstract

一种利用横向超声振动实现各向异性导电膜粘接芯片与FR-4树脂基板的方法，在超声振动时间为2.5～3.0s，基板温度为70～90℃，粘接压力为3.3～6.6MPa，超声功率为2.6～3.0W的条件下，可使芯片与FR-4树脂基板快速低温粘接，并使粘接后的各向异性导电膜的固化率达到约95％，获得与传统热压法相近的粘接强度。实现了低温条件下的粘接，避免了在传统热压法中由于高温压头造成芯片损坏的现象，并且能极大地缩短粘接时间，提高各向异性导电膜的固化速率，很大程度上地提高生产效率。

Description

芯片与树脂基板的超声振动粘接方法
技术领域
本发明是一种新型绿色微电子封装互连工艺。利用横向超声振动产生足够的热量使各向异性导电膜充分固化，实现芯片与FR-4树脂基板的粘接。
背景技术
2003年2月欧盟颁布《报废电子电气设备指令》(WEEE)和《关于在电子电气设备禁止使用某些有害物质指令》(POHS)法案。目前在世界范围内规定投放于市场的新电子电气设备不得包含铅、汞、镉、六价格、多溴联苯、多溴二苯醚等六种有毒有害物质。
因此，芯片与FR-4树脂基板的互连工艺主要采用底充胶和各向异性导电膜两种互连方式。(1)底充胶互连工艺是在聚合物环氧树脂中掺入大量的SiO2微颗粒制成底充胶，填充底充胶材料时，将基板加热至60℃左右，由于底充胶有良好的流动性和浸润性，约20s后，底充胶充满芯片与基板间隙，随后在约150℃下固化20min使其完全固化，实现芯片与FR-4树脂基板的机械连接。(2)各向异性导电膜是一种新兴的绿色环保微电子封装互连材料，它由导电粒子、高分子聚合物基体组成的。传统的各向异性导电膜互连工艺是采用热压法来实现的。热压法工艺包括预粘接和粘接两道工序。预粘接工序是在给定预粘接压力、预粘接时间3～5s、预粘接温度约80℃条件下，完成芯片与FR-4树脂基板的预粘接；粘接工序是把190℃左右的热压头作用在芯片表面同时施加粘接压力，粘接时间约15s后，使各向异性导电膜固化，实现芯片与基板的机械连接。在粘接压力的作用下，导电粒子绝缘膜破裂，芯片上的凸点和与之对应的基板上的电路之间夹着多个受压变形的导电粒子，由这些变形的导电粒子实现上、下凸点之间的电导通。
但是，底充胶互连工艺存在一些不足：固化时间长，因工艺复杂而降低生产效率，容易造成过大的残余应力降低互连器件的可靠性。各向异性导电膜的热压法工艺存在的主要问题是：粘接时间较长，固化速率低，生产效率不高；粘接压头温度过高，容易造成大的热变形与过大残余应力并且容易损伤芯片等。
所以，本发明利用横向超声振动产生足够的热量使各向异性导电膜充分固化，实现芯片与FR-4树脂基板的快速高效粘接。
发明内容：
根据采用底充胶和各向异性导电膜互连芯片与FR-4树脂基板等工艺的不足，发明了一种利用横向超声振动实现芯片与FR-4树脂基板互连的粘接方法。
本发明通过对芯片施加超声振动载荷使芯片、各向异性导电膜和FR-4树脂基板在接触界面上相互摩擦，产生足够的热量使各向异性导电膜充分固化，从而实现芯片与FR-4树脂基板粘接。设定合适的粘接压力、超声振动时间后，通过粘接台温度控制器加热FR-4树脂基板至合适的温度，当粘接压力达到设定值时，自动启动超声振动系统，完成芯片与FR-4树脂基板的振动粘接过程，同时通过压电陶瓷驱动信号的接口电路、数据采集卡和Labview数据采集系统采集压电陶瓷驱动电流电压信号。由此可见，芯片与FR-4树脂基板的超声振动粘接工艺需要准确控制的参数包括超声振动功率、超声振动时间、粘接压力、基板温度。
优化的粘接工参数范围为：超声振动功率为2.6～3.0W、超声振动时间为2.5～3.0s、粘接压力为3.3～6.6MPa，FR-4树脂基板的温度为70～90℃。本发明工艺获得的芯片与FR-4树脂基板的粘接强度与采用传统热压工艺获得的粘接强度相近，且各向异性导电膜的固化率达到95％左右。
有益效果
本发明采用以上技术方案，具有以下特点：
(1)避免了底充胶互连工艺的注胶工序，固化时间从约20min减少至不足3s，极大地缩短了固化时间。
(2)与各向异性导电膜的传统热压粘接工艺相比，粘接时间从15s减少至2.5～3.0s，很大程度地减小粘接时间，加速了各向异性导电膜的固化，提高了生产效率；实现了低温条件下的粘接，避免了各向异性导电膜的传统热压粘接工艺中高温压头造成大的热变形与过大残余应力与损伤芯片的现象。
附图说明
图1是利用超声振动实现各向异性导电膜粘接芯片与FR-4树脂基板的原理图。
图2是基于各向异性导电膜超声振动粘接芯片与FR-4树脂基板的原理图。
具体实施方式
实施例1，下面结合图1和图2来说明具体实施方式，本发明实施利用各向异性导电膜超声振动粘接装置完成。其粘接方法包括以下步骤：
步骤一：开启各向异性导电膜横向超声振动粘接装置，通过操作界面设置超声振动时间为2.5s、粘接压力为4.4MPa；
步骤二：通过粘接台温度控制器(1)加热FR-4树脂基板(3)至70℃，把AC-8955YW-23型各向异性导电膜(4)预粘接到FR-4树脂基板(3)上；
步骤三：通过水平传动装置移动PCF8576DU/2DA型芯片(2)至图像采集装置的视觉系统工作区域，由图像采集装置采集图像信息，完成PCF8576DU/2DA型芯片(2)的定位；
步骤四：下移具有真空吸附能力的粘接工具(5)，开启真空负压，利用粘接工具(5)拾取PCF8576DU/2DA型芯片(2)，并上移粘接工具(5)；
步骤五：通过水平传动装置移动粘接台上的FR-4树脂基板(3)至图像采集装置的视觉系统工作区域内，由图像采集装置采集图像信息，完成FR-4树脂基板(3)的定位；
步骤六：下移真空吸附了PCF8576DU/2DA型芯片(2)的粘接工具(5)，当粘接压力达到4.4MPa时，超声信号发生器(8)接收来自控制系统的指令，启动超声振动系统，开始采集压电陶瓷(6)的驱动电流电压信号。完成PCF8576DU/2DA型芯片(2)与FR-4树脂基板(3)的超声振动粘接过程后，关闭超声振动系统，关闭负压，并上移粘接工具(5)。
通过压电陶瓷驱动信号的接口电路(7)、数据采集卡(9)和Labview、Matlab数据采集分析模块(10)对信号运算处理获得实际的超声振动功率值为2.80W。
测得上述条件下，各向异性导电膜(4)的固化率达到95.8％。
测得上述条件下，PCF8576DU/2DA型芯片(2)与FR-4树脂基板(3)的粘接强度与通过传统热压工艺获得的粘接强度相当。
上面结合附图对本发明的实例进行了描述，但本发明并不局限于上述具体的实施方式，上述的具体实施方式仅是示例性的，不是局限性的，任何不超过本发明权利要求的发明创造，均在本发明的保护之内。

Claims (5)

1.一种利用横向超声振动实现各向异性导电膜互连芯片与FR-4树脂基板的方法，其特征在于：它基于超声振动粘接装置完成，包括以下步骤：
步骤一：开启超声振动粘接装置，通过操作界面设置合适的超声振动功率、超声振动时间、粘接压力；
步骤二：通过粘接台温度控制器(1)加热FR-4树脂基板(3)至一个合适的温度，把AC-8955YW-23型各向异性导电膜(4)预粘接到FR-4树脂基板(3)上；
步骤三：通过水平传动装置移动PCF8576DU/2DA型芯片(2)至图像采集装置的视觉系统工作区域，由图像采集装置采集图像信息，通过信息处理模块完成PCF8576DU/2DA型芯片(2)的定位；
步骤四：下移具有真空吸附能力的粘接工具(5)，开启真空负压，利用粘接工具(5)拾取PCF8576DU/2DA型芯片(2)并上移粘接工具(5)；
步骤五：通过水平传动装置移动粘接台上的FR-4树脂基板(3)至图像采集装置的视觉系统工作区域内，由图像采集装置采集图像信息，通过信息处理模块完成FR-4树脂基板(3)的定位；
步骤六：下移真空吸附了PCF8576DU/2DA型芯片(2)的粘接工具(5)，当粘接压力达到设定值时，超声信号发生器(8)接收来自控制系统的指令，启动超声振动系统，开始采集压电陶瓷(6)的驱动电流电压信号。完成基于AC-8955YW-23型各向异性导电膜(4)的芯片与FR-4树脂基板(3)的超声振动粘接过程后，关闭超声振动系统，关闭负压，并上移粘接工具(5)。
2.根据权利要求1所述的方法，其特征在于步骤一中所述合适的超声振动功率为2.6～3.0W。
3.根据权利要求1所述的方法，其特征在于步骤一中所述合适的超声振动时间为2.5～3.0s。
4.根据权利要求1所述的方法，其特征在于步骤一中所述合适的粘接压力为3.3～6.6MPa。
5.根据权利要求1所述的方法，其特征在于步骤二中所述的合适的FR-4树脂基板(3)温度范围为70～90℃。
CN 201110022690 2011-01-20 2011-01-20 芯片与树脂基板的超声振动粘接方法 Pending CN102157406A (zh)

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CN102110623A (zh) * 2010-12-13 2011-06-29 中南大学 利用超声振动实现各向异性导电膜连接芯片与基板的方法

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CN109314062A (zh) * 2016-05-31 2019-02-05 株式会社新川 管芯的安装方法
CN109314062B (zh) * 2016-05-31 2022-04-29 株式会社新川 管芯的安装方法

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