ATE448548T1 - Mehrspalten-adressierungsmodus-speichersystem mit einem integrierten schaltungsspeicherbaustein - Google Patents

Mehrspalten-adressierungsmodus-speichersystem mit einem integrierten schaltungsspeicherbaustein

Info

Publication number
ATE448548T1
ATE448548T1 AT05799571T AT05799571T ATE448548T1 AT E448548 T1 ATE448548 T1 AT E448548T1 AT 05799571 T AT05799571 T AT 05799571T AT 05799571 T AT05799571 T AT 05799571T AT E448548 T1 ATE448548 T1 AT E448548T1
Authority
AT
Austria
Prior art keywords
storage cells
column
integrated circuit
row
accessible
Prior art date
Application number
AT05799571T
Other languages
English (en)
Inventor
Frederick Ware
Lawrence Lai
Chad Bellows
Wayne S Richardson
Original Assignee
Rambus Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rambus Inc filed Critical Rambus Inc
Application granted granted Critical
Publication of ATE448548T1 publication Critical patent/ATE448548T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/16—Multiple access memory array, e.g. addressing one storage element via at least two independent addressing line groups

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
AT05799571T 2004-09-30 2005-09-12 Mehrspalten-adressierungsmodus-speichersystem mit einem integrierten schaltungsspeicherbaustein ATE448548T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/955,193 US7280428B2 (en) 2004-09-30 2004-09-30 Multi-column addressing mode memory system including an integrated circuit memory device
PCT/US2005/032770 WO2006039106A1 (en) 2004-09-30 2005-09-12 Multi-column addressing mode memory system including an intergrated circuit memory device

Publications (1)

Publication Number Publication Date
ATE448548T1 true ATE448548T1 (de) 2009-11-15

Family

ID=35520698

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05799571T ATE448548T1 (de) 2004-09-30 2005-09-12 Mehrspalten-adressierungsmodus-speichersystem mit einem integrierten schaltungsspeicherbaustein

Country Status (5)

Country Link
US (7) US7280428B2 (de)
EP (1) EP1800311B1 (de)
AT (1) ATE448548T1 (de)
DE (1) DE602005017651D1 (de)
WO (1) WO2006039106A1 (de)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7280428B2 (en) 2004-09-30 2007-10-09 Rambus Inc. Multi-column addressing mode memory system including an integrated circuit memory device
US8595459B2 (en) * 2004-11-29 2013-11-26 Rambus Inc. Micro-threaded memory
US20070260841A1 (en) * 2006-05-02 2007-11-08 Hampel Craig E Memory module with reduced access granularity
US8095745B1 (en) * 2006-08-07 2012-01-10 Marvell International Ltd. Non-sequential transfer of data from a memory
US8068365B2 (en) * 2008-02-04 2011-11-29 Mosaid Technologies Incorporated Non-volatile memory device having configurable page size
WO2009097681A1 (en) * 2008-02-04 2009-08-13 Mosaid Technologies Incorporated Flexible memory operations in nand flash devices
US8127049B1 (en) 2008-03-12 2012-02-28 Matrox Graphics Inc. Input/output pin allocation for data streams of variable widths
US20110016278A1 (en) * 2008-03-31 2011-01-20 Frederick Ware Independent Threading of Memory Devices Disposed on Memory Modules
EP2467852B1 (de) 2009-08-20 2019-05-22 Rambus Inc. Atomare speichervorrichtung
US8325531B2 (en) * 2010-01-07 2012-12-04 Spansion Llc Memory device
US9268719B2 (en) 2011-08-05 2016-02-23 Rambus Inc. Memory signal buffers and modules supporting variable access granularity
US8982649B2 (en) 2011-08-12 2015-03-17 Gsi Technology, Inc. Systems and methods involving multi-bank, dual- or multi-pipe SRAMs
JP6062714B2 (ja) * 2012-10-31 2017-01-18 キヤノン株式会社 メモリ制御装置、メモリ制御方法およびプログラム
US9042198B2 (en) * 2013-03-21 2015-05-26 Yutaka Shirai Nonvolatile random access memory
US9195459B2 (en) * 2013-04-26 2015-11-24 Min-Sung Tseng Simultaneously accessible memory device and method for using the same
WO2015009331A1 (en) * 2013-07-15 2015-01-22 Everspin Technologies, Inc. Memory device with page emulation mode
WO2015048037A1 (en) 2013-09-24 2015-04-02 Rambus Inc. Memory component having internal read-modify-write operation
US9842630B2 (en) * 2013-10-16 2017-12-12 Rambus Inc. Memory component with adjustable core-to-interface data rate ratio
US9135982B2 (en) * 2013-12-18 2015-09-15 Intel Corporation Techniques for accessing a dynamic random access memory array
US10289585B1 (en) 2014-08-20 2019-05-14 Altera Corporation Cross-point programming of pipelined interconnect circuitry
KR20160127525A (ko) * 2015-04-27 2016-11-04 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작 방법
US9870325B2 (en) * 2015-05-19 2018-01-16 Intel Corporation Common die implementation for memory devices with independent interface paths
US10847212B1 (en) 2016-12-06 2020-11-24 Gsi Technology, Inc. Read and write data processing circuits and methods associated with computational memory cells using two read multiplexers
US10770133B1 (en) 2016-12-06 2020-09-08 Gsi Technology, Inc. Read and write data processing circuits and methods associated with computational memory cells that provides write inhibits and read bit line pre-charge inhibits
US10249362B2 (en) 2016-12-06 2019-04-02 Gsi Technology, Inc. Computational memory cell and processing array device using the memory cells for XOR and XNOR computations
US11227653B1 (en) 2016-12-06 2022-01-18 Gsi Technology, Inc. Storage array circuits and methods for computational memory cells
US10854284B1 (en) 2016-12-06 2020-12-01 Gsi Technology, Inc. Computational memory cell and processing array device with ratioless write port
US10725777B2 (en) 2016-12-06 2020-07-28 Gsi Technology, Inc. Computational memory cell and processing array device using memory cells
US10777262B1 (en) 2016-12-06 2020-09-15 Gsi Technology, Inc. Read data processing circuits and methods associated memory cells
US10891076B1 (en) 2016-12-06 2021-01-12 Gsi Technology, Inc. Results processing circuits and methods associated with computational memory cells
US10860320B1 (en) 2016-12-06 2020-12-08 Gsi Technology, Inc. Orthogonal data transposition system and method during data transfers to/from a processing array
US10847213B1 (en) 2016-12-06 2020-11-24 Gsi Technology, Inc. Write data processing circuits and methods associated with computational memory cells
US10943648B1 (en) 2016-12-06 2021-03-09 Gsi Technology, Inc. Ultra low VDD memory cell with ratioless write port
KR101801901B1 (ko) * 2017-04-27 2017-11-27 공재섭 데이터 구역성을 고려하여 액세스되는 메모리 장치 및 이를 포함하는 전자 시스템
US11226909B2 (en) 2018-08-24 2022-01-18 Rambus Inc. DRAM interface mode with interruptible internal transfer operation
CN113439307A (zh) 2019-02-12 2021-09-24 拉姆伯斯公司 具有可变存取粒度的存储器
US12026104B2 (en) * 2019-03-26 2024-07-02 Rambus Inc. Multiple precision memory system
US10930341B1 (en) 2019-06-18 2021-02-23 Gsi Technology, Inc. Processing array device that performs one cycle full adder operation and bit line read/write logic features
US10958272B2 (en) 2019-06-18 2021-03-23 Gsi Technology, Inc. Computational memory cell and processing array device using complementary exclusive or memory cells
US10877731B1 (en) 2019-06-18 2020-12-29 Gsi Technology, Inc. Processing array device that performs one cycle full adder operation and bit line read/write logic features
US11756606B2 (en) 2021-12-13 2023-09-12 Advanced Micro Devices, Inc. Method and apparatus for recovering regular access performance in fine-grained DRAM

Family Cites Families (187)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US37409A (en) * 1863-01-13 Improved manufacture of palm-leaf hats and bonnets
US486421A (en) * 1892-11-22 Fly-net
US4377855A (en) 1980-11-06 1983-03-22 National Semiconductor Corporation Content-addressable memory
US4654781A (en) 1981-10-02 1987-03-31 Raytheon Company Byte addressable memory for variable length instructions and data
US4546451A (en) * 1982-02-12 1985-10-08 Metheus Corporation Raster graphics display refresh memory architecture offering rapid access speed
JPS58147884A (ja) 1982-02-26 1983-09-02 Toshiba Corp ダイナミック型半導体記憶装置
JPS6083291A (ja) 1983-10-13 1985-05-11 Nec Corp 半導体メモリ
US4670745A (en) 1983-11-15 1987-06-02 Motorola Inc. Video display address generator
US4542483A (en) 1983-12-02 1985-09-17 At&T Bell Laboratories Dual stage sense amplifier for dynamic random access memory
US4633434A (en) 1984-04-02 1986-12-30 Sperry Corporation High performance storage unit
JPS60234295A (ja) 1984-05-04 1985-11-20 Fujitsu Ltd 半導体記憶装置
FR2566950B1 (fr) 1984-06-29 1986-12-26 Texas Instruments France Processeur de points d'images video, systeme de visualisation en comportant application et procede pour sa mise en oeuvre
US4800525A (en) 1984-10-31 1989-01-24 Texas Instruments Incorporated Dual ended folded bit line arrangement and addressing scheme
US4758993A (en) 1984-11-19 1988-07-19 Fujitsu Limited Random access memory device formed on a semiconductor substrate having an array of memory cells divided into sub-arrays
JPS61139866A (ja) 1984-12-11 1986-06-27 Toshiba Corp マイクロプロセツサ
US4837465A (en) 1985-01-16 1989-06-06 Digital Equipment Corp Single rail CMOS register array and sense amplifier circuit therefor
US4698788A (en) 1985-07-01 1987-10-06 Motorola, Inc. Memory architecture with sub-arrays
US4700328A (en) 1985-07-11 1987-10-13 Intel Corporation High speed and high efficiency layout for dram circuits
US4740921A (en) 1985-10-04 1988-04-26 Motorola, Inc. Precharge of a dram data line to an intermediate voltage
US4710902A (en) 1985-10-04 1987-12-01 Motorola, Inc. Technique restore for a dynamic random access memory
JPS6280897A (ja) 1985-10-04 1987-04-14 Mitsubishi Electric Corp 半導体記憶装置
JPH0612610B2 (ja) 1986-06-24 1994-02-16 日本電気株式会社 ダイナミツク型半導体メモリ
US7187572B2 (en) 2002-06-28 2007-03-06 Rambus Inc. Early read after write operation memory device, system and method
US4888732A (en) 1987-02-23 1989-12-19 Matsushita Electric Industrial Co., Ltd. Dynamic random access memory having open bit line architecture
US4961168A (en) 1987-02-24 1990-10-02 Texas Instruments Incorporated Bipolar-CMOS static random access memory device with bit line bias control
US4825413A (en) 1987-02-24 1989-04-25 Texas Instruments Incorporated Bipolar-CMOS static ram memory device
US4787858A (en) 1987-03-23 1988-11-29 Digital Equipment Corporation Latching system for computer plug
US5222047A (en) 1987-05-15 1993-06-22 Mitsubishi Denki Kabushiki Kaisha Method and apparatus for driving word line in block access memory
US4796230A (en) 1987-06-24 1989-01-03 Intel Corporation Folded-cascode configured differential current steering column decoder circuit
JPS6413290A (en) 1987-07-07 1989-01-18 Oki Electric Ind Co Ltd Semiconductor memory
US4837743A (en) 1987-08-17 1989-06-06 Texas Instruments Incorporated Architecture for memory multiplexing
US5146592A (en) 1987-09-14 1992-09-08 Visual Information Technologies, Inc. High speed image processing computer with overlapping windows-div
US5274596A (en) 1987-09-16 1993-12-28 Kabushiki Kaisha Toshiba Dynamic semiconductor memory device having simultaneous operation of adjacent blocks
US4843264A (en) 1987-11-25 1989-06-27 Visic, Inc. Dynamic sense amplifier for CMOS static RAM
US4862421A (en) 1988-02-16 1989-08-29 Texas Instruments Incorporated Sensing and decoding scheme for a BiCMOS read/write memory
US5093806A (en) 1988-02-16 1992-03-03 Tran Hiep V Sensing and decoding scheme for a bicmos read/write memory
JPH0212541A (ja) 1988-04-29 1990-01-17 Internatl Business Mach Corp <Ibm> コンピユーテイング・システム及びその動作方法
US4984196A (en) 1988-05-25 1991-01-08 Texas Instruments, Incorporated High performance bipolar differential sense amplifier in a BiCMOS SRAM
JPH02168496A (ja) 1988-09-14 1990-06-28 Kawasaki Steel Corp 半導体メモリ回路
KR910009444B1 (ko) 1988-12-20 1991-11-16 삼성전자 주식회사 반도체 메모리 장치
US5124610A (en) 1989-03-03 1992-06-23 E. F. Johnson Company Tritiated light emitting polymer electrical energy source
US5214610A (en) 1989-09-22 1993-05-25 Texas Instruments Incorporated Memory with selective address transition detection for cache operation
JPH0778994B2 (ja) 1989-10-11 1995-08-23 三菱電機株式会社 半導体記憶装置
US5150330A (en) 1990-01-24 1992-09-22 Vlsi Technology, Inc. Interblock dispersed-word memory architecture
US4991141A (en) 1990-02-08 1991-02-05 Texas Instruments Incorporated Sense amplifier and method for sensing the outputs of static random access memory cells
JPH03235290A (ja) 1990-02-09 1991-10-21 Mitsubishi Electric Corp 階層的な行選択線を有する半導体記憶装置
GB9007789D0 (en) 1990-04-06 1990-06-06 Foss Richard C Method for dram sensing current control
US5046050A (en) 1990-04-10 1991-09-03 National Semiconductor Corporation Shared BiCMOS sense amplifier
US5181205A (en) 1990-04-10 1993-01-19 National Semiconductor Corporation Short circuit detector circuit for memory arrays
IL96808A (en) * 1990-04-18 1996-03-31 Rambus Inc Introductory / Origin Circuit Agreed Using High-Performance Brokerage
JP3058431B2 (ja) 1990-06-12 2000-07-04 株式会社東芝 半導体記憶装置
US5428389A (en) 1990-06-14 1995-06-27 Fuji Photo Film Co., Ltd. Image data storage/processing apparatus
US5132931A (en) 1990-08-28 1992-07-21 Analog Devices, Inc. Sense enable timing circuit for a random access memory
JPH0696582A (ja) 1990-09-17 1994-04-08 Texas Instr Inc <Ti> メモリアレイアーキテクチャ
US5121358A (en) 1990-09-26 1992-06-09 Sgs-Thomson Microelectronics, Inc. Semiconductor memory with power-on reset controlled latched row line repeaters
US5119340A (en) 1990-09-26 1992-06-02 Sgs-Thomson Microelectronics, Inc. Semiconductor memory having latched repeaters for memory row line selection
US5124951A (en) 1990-09-26 1992-06-23 Sgs-Thomson Microelectronics, Inc. Semiconductor memory with sequenced latched row line repeaters
US5128897A (en) 1990-09-26 1992-07-07 Sgs-Thomson Microelectronics, Inc. Semiconductor memory having improved latched repeaters for memory row line selection
JP2630059B2 (ja) 1990-11-09 1997-07-16 日本電気株式会社 半導体メモリ装置
US5193072A (en) 1990-12-21 1993-03-09 Vlsi Technology, Inc. Hidden refresh of a dynamic random access memory
US5241503A (en) 1991-02-25 1993-08-31 Motorola, Inc. Dynamic random access memory with improved page-mode performance and method therefor having isolator between memory cells and sense amplifiers
US5251178A (en) 1991-03-06 1993-10-05 Childers Jimmie D Low-power integrated circuit memory
JP2664810B2 (ja) 1991-03-07 1997-10-22 株式会社東芝 メモリセルアレイ分割型半導体記憶装置
JPH04307495A (ja) 1991-04-04 1992-10-29 Mitsubishi Electric Corp 半導体記憶装置
JPH0562461A (ja) 1991-04-09 1993-03-12 Mitsubishi Electric Corp 半導体記憶装置
US5530814A (en) 1991-10-30 1996-06-25 I-Cube, Inc. Bi-directional crossbar switch with control memory for selectively routing signals between pairs of signal ports
JP2836321B2 (ja) 1991-11-05 1998-12-14 三菱電機株式会社 データ処理装置
US5291444A (en) 1991-12-23 1994-03-01 Texas Instruments Incorporated Combination DRAM and SRAM memory array
JP2973668B2 (ja) 1991-12-27 1999-11-08 日本電気株式会社 高速ダイナミックランダムアクセスメモリ装置
KR950000504B1 (ko) 1992-01-31 1995-01-24 삼성전자 주식회사 복수개의 로우 어드레스 스트로브 신호를 가지는 반도체 메모리 장치
JPH05274879A (ja) 1992-03-26 1993-10-22 Nec Corp 半導体装置
US5390308A (en) 1992-04-15 1995-02-14 Rambus, Inc. Method and apparatus for address mapping of dynamic random access memory
US5432743A (en) * 1992-06-30 1995-07-11 Nec Corporation Semiconductor dynamic RAM for image processing
JP2945216B2 (ja) 1992-09-17 1999-09-06 シャープ株式会社 半導体メモリ装置
US5406526A (en) 1992-10-01 1995-04-11 Nec Corporation Dynamic random access memory device having sense amplifier arrays selectively activated when associated memory cell sub-arrays are accessed
US5485430A (en) 1992-12-22 1996-01-16 Sgs-Thomson Microelectronics, Inc. Multiple clocked dynamic sense amplifier
US5455802A (en) 1992-12-22 1995-10-03 Sgs-Thomson Microelectronics, Inc. Dual dynamic sense amplifiers for a memory array
JPH06267275A (ja) 1993-03-10 1994-09-22 Fujitsu Ltd センスアンプ制御回路及びセンスアンプ制御方法
JPH06314264A (ja) 1993-05-06 1994-11-08 Nec Corp セルフ・ルーティング・クロスバー・スイッチ
JP2725570B2 (ja) 1993-11-02 1998-03-11 日本電気株式会社 半導体メモリ装置
JP2875476B2 (ja) 1993-12-06 1999-03-31 松下電器産業株式会社 半導体メモリ装置
AU1841895A (en) 1994-02-15 1995-08-29 Rambus Inc. Delay-locked loop
JPH07262767A (ja) 1994-03-17 1995-10-13 Fujitsu Ltd シンクロナスｄｒａｍ
US5689195A (en) 1995-05-17 1997-11-18 Altera Corporation Programmable logic array integrated circuit devices
US5675180A (en) 1994-06-23 1997-10-07 Cubic Memory, Inc. Vertical interconnect process for silicon segments
US5655113A (en) 1994-07-05 1997-08-05 Monolithic System Technology, Inc. Resynchronization circuit for a memory system and method of operating same
JP3176228B2 (ja) 1994-08-23 2001-06-11 シャープ株式会社 半導体記憶装置
GB9423038D0 (en) 1994-11-15 1995-01-04 Sgs Thomson Microelectronics An integrated circuit memory device with voltage boost
US5652870A (en) 1995-04-11 1997-07-29 Mitsubishi Denki Kabushiki Kaisha Microcomputer having multiplexable input-output port
US6128700A (en) * 1995-05-17 2000-10-03 Monolithic System Technology, Inc. System utilizing a DRAM array as a next level cache memory and method for operating same
US5787267A (en) 1995-06-07 1998-07-28 Monolithic System Technology, Inc. Caching method and circuit for a memory system with circuit module architecture
US5801985A (en) 1995-07-28 1998-09-01 Micron Technology, Inc. Memory system having programmable control parameters
US5717871A (en) 1995-08-17 1998-02-10 I-Cube, Inc. Crossbar switch with input/output buffers having multiplexed control inputs
US5666322A (en) 1995-09-21 1997-09-09 Nec Electronics, Inc. Phase-locked loop timing controller in an integrated circuit memory
US5748551A (en) 1995-12-29 1998-05-05 Micron Technology, Inc. Memory device with multiple internal banks and staggered command execution
JP3531891B2 (ja) 1996-01-26 2004-05-31 シャープ株式会社 半導体記憶装置
US5793998A (en) 1996-04-17 1998-08-11 Digital Equipment Corporation Method and apparatus for interconnection of multiple modules
US6073204A (en) 1997-04-23 2000-06-06 Micron Technology, Inc. Memory system having flexible architecture and method
US5852725A (en) 1996-05-10 1998-12-22 Yen; Juei-Hsiang PCI/ISA bus single board computer card/CPU card and backplane using eisa bus connectors and eisa bus slots
JPH1031886A (ja) 1996-07-17 1998-02-03 Nec Corp ランダムアクセスメモリ
US5933023A (en) 1996-09-03 1999-08-03 Xilinx, Inc. FPGA architecture having RAM blocks with programmable word length and width and dedicated address and data lines
US5893927A (en) 1996-09-13 1999-04-13 International Business Machines Corporation Memory device having programmable device width, method of programming, and method of setting device width for memory device
US5892981A (en) 1996-10-10 1999-04-06 Hewlett-Packard Company Memory system and device
US5689472A (en) 1996-10-31 1997-11-18 Silicon Magic Corporation System and method for providing efficient access to a memory bank
JPH10172283A (ja) 1996-12-10 1998-06-26 Hitachi Ltd 半導体記憶装置及びシステム
JP3455040B2 (ja) 1996-12-16 2003-10-06 株式会社日立製作所 ソースクロック同期式メモリシステムおよびメモリユニット
US5748554A (en) 1996-12-20 1998-05-05 Rambus, Inc. Memory and method for sensing sub-groups of memory elements
JPH1139871A (ja) 1997-01-10 1999-02-12 Mitsubishi Electric Corp 同期型半導体記憶装置
US6047347A (en) 1997-02-04 2000-04-04 Advanced Micro Devices, Inc. Computer system with programmable bus size
US6125157A (en) 1997-02-06 2000-09-26 Rambus, Inc. Delay-locked loop circuitry for clock delay adjustment
JPH10302471A (ja) 1997-02-28 1998-11-13 Mitsubishi Electric Corp 半導体記憶装置
JP3476646B2 (ja) * 1997-03-07 2003-12-10 シャープ株式会社 半導体記憶装置
US5996051A (en) 1997-04-14 1999-11-30 Advanced Micro Devices, Inc. Communication system which in a first mode supports concurrent memory acceses of a partitioned memory array and in a second mode supports non-concurrent memory accesses to the entire memory array
EP0887737B1 (de) 1997-06-26 2003-01-22 Hewlett-Packard Company, A Delaware Corporation Umkehrbarer Stecker
US6049855A (en) 1997-07-02 2000-04-11 Micron Electronics, Inc. Segmented memory system employing different interleaving scheme for each different memory segment
US5958033A (en) 1997-08-13 1999-09-28 Hewlett Packard Company On- the-fly partitionable computer bus for enhanced operation with varying bus clock frequencies
US6247084B1 (en) 1997-10-08 2001-06-12 Lsi Logic Corporation Integrated circuit with unified memory system and dual bus architecture
AU9693398A (en) 1997-10-10 1999-05-03 Rambus Incorporated Apparatus and method for pipelined memory operations
US6052327A (en) 1997-10-14 2000-04-18 Altera Corporation Dual-port programmable logic device variable depth and width memory array
US6742098B1 (en) 2000-10-03 2004-05-25 Intel Corporation Dual-port buffer-to-memory interface
US5936885A (en) 1998-02-23 1999-08-10 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory capable of preventing erroneous inversion of data read from memory transistors
US5933387A (en) 1998-03-30 1999-08-03 Richard Mann Divided word line architecture for embedded memories using multiple metal layers
JP4198271B2 (ja) 1998-06-30 2008-12-17 富士通マイクロエレクトロニクス株式会社 半導体記憶装置
US6185149B1 (en) 1998-06-30 2001-02-06 Fujitsu Limited Semiconductor integrated circuit memory
JP4540137B2 (ja) 1998-07-24 2010-09-08 ルネサスエレクトロニクス株式会社 同期型半導体記憶装置
CA2341014A1 (en) * 1998-08-19 2000-03-02 Alexander Roger Deas A system and method for defining transforms of memory device addresses
KR100297716B1 (ko) * 1998-09-03 2001-08-07 윤종용 높은멀티비트자유도의반도체메모리장치
US6050983A (en) 1998-10-27 2000-04-18 Moore; Diane Sound-insulated gas-diverting colostomy container
US6138185A (en) 1998-10-29 2000-10-24 Mcdata Corporation High performance crossbar switch
WO2000029958A1 (en) * 1998-11-12 2000-05-25 Boris Nikolayevich Vilkov A system and a method for transformation of memory device addresses
US6311313B1 (en) 1998-12-29 2001-10-30 International Business Machines Corporation X-Y grid tree clock distribution network with tunable tree and grid networks
KR100564421B1 (ko) 1998-12-31 2006-06-23 주식회사 하이닉스반도체 메모리 소자의 데이터폭 설정회로
US6446158B1 (en) 1999-05-17 2002-09-03 Chris Karabatsos Memory system using FET switches to select memory banks
EP1059588A1 (de) 1999-06-09 2000-12-13 Texas Instruments Incorporated Multikanal-DMA mit Datenverkehrplanung auf die Ausgänge
KR100316713B1 (ko) 1999-06-26 2001-12-12 윤종용 반도체 메모리 장치 및 이에 적합한 구동신호 발생기
US6708248B1 (en) 1999-07-23 2004-03-16 Rambus Inc. Memory system with channel multiplexing of multiple memory devices
US7363422B2 (en) 2000-01-05 2008-04-22 Rambus Inc. Configurable width buffered module
US7356639B2 (en) 2000-01-05 2008-04-08 Rambus Inc. Configurable width buffered module having a bypass circuit
US6160750A (en) 2000-02-04 2000-12-12 Advanced Micro Devices, Inc. Noise reduction during simultaneous operation of a flash memory device
US6988154B2 (en) 2000-03-10 2006-01-17 Arc International Memory interface and method of interfacing between functional entities
US6240040B1 (en) 2000-03-15 2001-05-29 Advanced Micro Devices, Inc. Multiple bank simultaneous operation for a flash memory
US6434081B1 (en) 2000-05-12 2002-08-13 Micron Technology, Inc. Calibration technique for memory devices
KR100335504B1 (ko) 2000-06-30 2002-05-09 윤종용 제어 및 어드레스 버스를 공유하는 2채널 메모리 시스템및 이에 채용되는 메모리 모듈
US6748556B1 (en) 2000-08-15 2004-06-08 International Business Machines Corporation Changing the thread capacity of a multithreaded computer processor
US6725316B1 (en) 2000-08-18 2004-04-20 Micron Technology, Inc. Method and apparatus for combining architectures with logic option
US6625687B1 (en) * 2000-09-18 2003-09-23 Intel Corporation Memory module employing a junction circuit for point-to-point connection isolation, voltage translation, data synchronization, and multiplexing/demultiplexing
US6396764B1 (en) 2000-11-16 2002-05-28 Silicon Aquarius, Inc. Segmented memory architecture and systems and methods using the same
US6813688B2 (en) 2000-12-04 2004-11-02 Sun Microsystems, Inc. System and method for efficient data mirroring in a pair of storage devices
US6889304B2 (en) * 2001-02-28 2005-05-03 Rambus Inc. Memory device supporting a dynamically configurable core organization
US6877079B2 (en) 2001-03-06 2005-04-05 Samsung Electronics Co., Ltd. Memory system having point-to-point bus configuration
TW561485B (en) 2001-03-22 2003-11-11 Fujitsu Ltd Semiconductor memory device and information processing system
US6587917B2 (en) * 2001-05-29 2003-07-01 Agilent Technologies, Inc. Memory architecture for supporting concurrent access of different types
JP2003007052A (ja) 2001-06-20 2003-01-10 Mitsubishi Electric Corp 半導体記憶装置およびそれを用いたメモリシステム
US6825841B2 (en) 2001-09-07 2004-11-30 Rambus Inc. Granularity memory column access
KR100429878B1 (ko) 2001-09-10 2004-05-03 삼성전자주식회사 메모리 모듈과 그에 사용되는 인쇄회로기판
US6920540B2 (en) 2001-10-22 2005-07-19 Rambus Inc. Timing calibration apparatus and method for a memory device signaling system
US6950910B2 (en) 2001-11-08 2005-09-27 Freescale Semiconductor, Inc. Mobile wireless communication device architectures and methods therefor
US6678204B2 (en) 2001-12-27 2004-01-13 Elpida Memory Inc. Semiconductor memory device with high-speed operation and methods of using and designing thereof
US7573939B2 (en) * 2002-01-11 2009-08-11 Sony Corporation Memory cell circuit, memory device, motion vector detection device, and motion compensation prediction coding device
JP2003272377A (ja) 2002-03-13 2003-09-26 Fujitsu Ltd 半導体記憶装置
JP4136429B2 (ja) 2002-04-10 2008-08-20 富士通株式会社 半導体装置
US6895474B2 (en) 2002-04-29 2005-05-17 Micron Technology, Inc. Synchronous DRAM with selectable internal prefetch size
JP4025584B2 (ja) 2002-05-31 2007-12-19 エルピーダメモリ株式会社 半導体記憶装置
US7043599B1 (en) 2002-06-20 2006-05-09 Rambus Inc. Dynamic memory supporting simultaneous refresh and data-access transactions
US6854042B1 (en) 2002-07-22 2005-02-08 Chris Karabatsos High-speed data-rate converting and switching circuit
JP4159415B2 (ja) 2002-08-23 2008-10-01 エルピーダメモリ株式会社 メモリモジュール及びメモリシステム
KR100468761B1 (ko) 2002-08-23 2005-01-29 삼성전자주식회사 분할된 시스템 데이터 버스에 연결되는 메모리 모듈을구비하는 반도체 메모리 시스템
US6925643B2 (en) 2002-10-11 2005-08-02 Sandbridge Technologies, Inc. Method and apparatus for thread-based memory access in a multithreaded processor
KR100560646B1 (ko) 2002-12-20 2006-03-16 삼성전자주식회사 지연된 오토프리챠지 기능을 갖는 반도체 메모리 장치
US6754120B1 (en) * 2003-02-11 2004-06-22 Rambus Inc. DRAM output circuitry supporting sequential data capture to reduce core access times
US6931479B2 (en) 2003-03-04 2005-08-16 Micron Technology, Inc. Method and apparatus for multi-functional inputs of a memory device
KR100532432B1 (ko) 2003-05-02 2005-11-30 삼성전자주식회사 커맨드 신호와 어드레스 신호의 고속 전송이 가능한메모리 시스템
US6982892B2 (en) 2003-05-08 2006-01-03 Micron Technology, Inc. Apparatus and methods for a physical layout of simultaneously sub-accessible memory modules
US7133324B2 (en) 2003-12-24 2006-11-07 Samsung Electronics Co., Ltd. Synchronous dynamic random access memory devices having dual data rate 1 (DDR1) and DDR2 modes of operation and methods of operating same
US7281079B2 (en) * 2003-12-31 2007-10-09 Intel Corporation Method and apparatus to counter mismatched burst lengths
JP4489454B2 (ja) 2004-02-16 2010-06-23 富士通マイクロエレクトロニクス株式会社 半導体集積回路
DE102005021894A1 (de) 2004-05-08 2006-01-12 Samsung Electronics Co., Ltd., Suwon Speichersytem, IC-Speicherbauelement und Betriebsverfahren
US8190808B2 (en) 2004-08-17 2012-05-29 Rambus Inc. Memory device having staggered memory operations
JP2006065697A (ja) 2004-08-27 2006-03-09 Hitachi Ltd 記憶デバイス制御装置
US7280428B2 (en) 2004-09-30 2007-10-09 Rambus Inc. Multi-column addressing mode memory system including an integrated circuit memory device
US7254075B2 (en) 2004-09-30 2007-08-07 Rambus Inc. Integrated circuit memory system having dynamic memory bank count and page size
US7266667B2 (en) 2004-11-12 2007-09-04 Infineon Technologies Ag Memory access using multiple sets of address/data lines
US7464225B2 (en) 2005-09-26 2008-12-09 Rambus Inc. Memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology
US20070260841A1 (en) 2006-05-02 2007-11-08 Hampel Craig E Memory module with reduced access granularity
US20080028135A1 (en) 2006-07-31 2008-01-31 Metaram, Inc. Multiple-component memory interface system and method
EP3200189B1 (de) 2007-04-12 2021-06-02 Rambus Inc. Speichersystem mit punkt-zu-punkt-anforderungsverbindung
WO2009089301A1 (en) 2008-01-07 2009-07-16 Rambus Inc. Variable-width memory module and buffer

Also Published As

Publication number Publication date
US20110153932A1 (en) 2011-06-23
WO2006039106A1 (en) 2006-04-13
US8050134B2 (en) 2011-11-01
EP1800311A1 (de) 2007-06-27
US7280428B2 (en) 2007-10-09
US20140003131A1 (en) 2014-01-02
US8908466B2 (en) 2014-12-09
DE602005017651D1 (de) 2009-12-24
US20080062807A1 (en) 2008-03-13
US20120170399A1 (en) 2012-07-05
EP1800311B1 (de) 2009-11-11
US8432766B2 (en) 2013-04-30
US20120020178A1 (en) 2012-01-26
US20060072366A1 (en) 2006-04-06
US7907470B2 (en) 2011-03-15
US20090193202A1 (en) 2009-07-30
US7505356B2 (en) 2009-03-17
US8154947B2 (en) 2012-04-10

Similar Documents

Publication Publication Date Title
ATE448548T1 (de) Mehrspalten-adressierungsmodus-speichersystem mit einem integrierten schaltungsspeicherbaustein
TW200710661A (en) Memory controller interface for micro-tiled memory access
TW200710662A (en) Micro-tile memory interfaces
TW200737227A (en) Memory device and method having multiple address, data and command buses
WO2011034673A3 (en) Memory device and method
KR970071830A (ko) 동일한 반도체칩상에 프로세서를 집적화하는데 적합한 멀티뱅크 dram
WO2008002713A3 (en) Integrated circuit having a memory with low voltage read/write operation
TW200733099A (en) Dynamic semiconductor memory with improved refresh mechanism
EP2363859A3 (de) Multibankspeicher mit zeitverschachtelten oder parallelen Bankzugriffen
TW200627472A (en) Memory device capable of refreshing data using buffer and refresh method thereof
JP2016526749A5 (de)
TW200701225A (en) Semiconductor memory device
CN107369464A (zh) 存储模块及包括其的系统
JP2012033248A (ja) 半導体装置
JP2018512690A (ja) 記憶素子をリフレッシュするためのシステムおよび方法
KR20120067509A (ko) 메모리 장치, 이를 포함하는 메모리 시스템 및 그 제어 방법
TW200518095A (en) Dynamic random access memory with smart refresh scheduler
ATE229219T1 (de) Speicheranordnung mit adressverwürfelung
JP2010146678A5 (de)
JP2016520937A (ja) 組み込みｅｃｃアドレスマッピング
TW200514080A (en) Semiconductor memory device
US6525989B2 (en) Activation of word lines in semiconductor memory device
US6501699B2 (en) Refresh control for semiconductor memory device
SG131754A1 (en) Semiconductor storage device and information apparatus
CN1975922A (zh) 半导体存储器件

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties