WO2015121947A1 - レジスト等のウエハ周縁部からの溶解除去方法 - Google Patents
レジスト等のウエハ周縁部からの溶解除去方法 Download PDFInfo
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- WO2015121947A1 WO2015121947A1 PCT/JP2014/053334 JP2014053334W WO2015121947A1 WO 2015121947 A1 WO2015121947 A1 WO 2015121947A1 JP 2014053334 W JP2014053334 W JP 2014053334W WO 2015121947 A1 WO2015121947 A1 WO 2015121947A1
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- wafer
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- 230000002093 peripheral effect Effects 0.000 title claims abstract description 18
- 238000000034 method Methods 0.000 title claims description 24
- 239000000463 material Substances 0.000 claims abstract description 62
- 239000002904 solvent Substances 0.000 claims abstract description 13
- 238000000576 coating method Methods 0.000 claims abstract description 8
- 239000011248 coating agent Substances 0.000 claims abstract description 6
- 238000010438 heat treatment Methods 0.000 claims abstract description 6
- 238000004140 cleaning Methods 0.000 claims abstract description 4
- 239000007788 liquid Substances 0.000 claims description 26
- 238000004519 manufacturing process Methods 0.000 claims description 12
- 239000004065 semiconductor Substances 0.000 claims description 11
- 238000005507 spraying Methods 0.000 claims description 4
- 239000004642 Polyimide Substances 0.000 claims description 2
- 229920001721 polyimide Polymers 0.000 claims description 2
- 235000012431 wafers Nutrition 0.000 description 62
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 239000007921 spray Substances 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/16—Coating processes; Apparatus therefor
- G03F7/168—Finishing the coated layer, e.g. drying, baking, soaking
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/16—Coating processes; Apparatus therefor
- G03F7/162—Coating on a rotating support, e.g. using a whirler or a spinner
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02082—Cleaning product to be cleaned
- H01L21/02087—Cleaning of wafer edges
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02082—Cleaning product to be cleaned
- H01L21/0209—Cleaning of wafer backside
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31058—After-treatment of organic layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67028—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like
- H01L21/6704—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing
- H01L21/67051—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing using mainly spraying means, e.g. nozzles
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67075—Apparatus for fluid treatment for etching for wet etching
- H01L21/6708—Apparatus for fluid treatment for etching for wet etching using mainly spraying means, e.g. nozzles
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67103—Apparatus for thermal treatment mainly by conduction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/6715—Apparatus for applying a liquid, a resin, an ink or the like
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54493—Peripheral marks on wafers, e.g. orientation flats, notches, lot number
Definitions
- the present invention relates to a method of manufacturing a semiconductor device used for manufacturing, for example, an LSI (large scale integrated circuit).
- LSI large scale integrated circuit
- Patent Document 1 discloses that the peripheral portion of a resist (material) formed on the surface of a wafer is dissolved and removed.
- the present invention has been made to solve the above-described problems, and it is an object of the present invention to provide a method of manufacturing a semiconductor device capable of reliably removing the material formed on the outer peripheral portion of the surface of a wafer.
- a coating step of coating a material containing a solvent on the surface of a wafer a volatilization step of heating the material to volatilize the solvent, and rotating the wafer
- the material formed on the outer periphery of the surface of the wafer can be reliably removed.
- the wafer 12 is vacuum suctioned by the spin chuck 10. Then, the material 14 is applied to the surface of the wafer 12. Specifically, the material 14 is supplied to the wafer 12 rotated by the spin chuck 10 from a nozzle 16 provided above the wafer 12. This process is called a coating process.
- the material 14 is a resist containing a solvent.
- FIG. 2 is a diagram for explaining the preliminary rinse process.
- the spin chuck 10 is rotated to rotate the wafer 12, and the edge rinse liquid is sprayed onto the outer peripheral portion of the front surface of the wafer 12 to spray the back rinse liquid onto the back surface of the wafer 12.
- an edge rinse liquid 22 for dissolving and removing the material 14 is jetted from the first nozzle 20 provided above the wafer 12.
- the edge rinse liquid 22 is jetted to the outer peripheral portion of the surface of the wafer 12.
- a back rinse liquid 26 for cleaning the back surface of the wafer 12 is jetted from the second nozzle 24 provided below the wafer 12.
- the back rinse liquid 26 is jetted to the back surface of the wafer 12.
- the edge rinse liquid 22 and the back rinse liquid 26 are organic solvents, such as (gamma) -butyl lactone or NMP, for example, it is not specifically limited to this.
- the material 14 concentrically spreads out as the wafer 12 rotates, so the material 14 on the outer periphery of the surface of the wafer 12 can not be completely removed.
- the reason that the material 14 spreads outward in the pre-rinsing step is that the solvent remains in the material 14.
- FIG. 3 is a diagram for explaining the volatilization process.
- the wafer 12 is transferred to the hot plate 30.
- the material 14 is heated (baked and dried) by the hot plate 30 to evaporate the solvent.
- the material 14A from which the solvent has volatilized is slightly thinner than the material 14 of FIG.
- FIG. 4 is a diagram for explaining the rinse process.
- the rinse step first, the wafer 12 is transferred to the spin chuck 10. Then, while rotating the wafer 12, the edge rinse liquid 22 for removing the material 14 A is jetted from the first nozzle 20 to the outer peripheral portion of the surface of the wafer 12. At this time, since the solvent of the material 14A is volatilized, the material 14A is dry, and the material 14A does not spread outward. Therefore, the portion of the material 14A formed on the outer peripheral portion of the surface of the wafer 12 can be reliably removed.
- a back rinse liquid 26 for cleaning the back surface of the wafer 12 is jetted from the second nozzle 24 to the back surface of the wafer 12. Thereby, the back surface of the wafer 12 can be cleaned.
- the portion of the material 14A in contact with the orientation flat in plan view (hereinafter referred to as the orientation flat adjacent material 14a) is removed.
- 5 and 6 are diagrams showing removal of the orientation flat adjacent material 14a. As shown in FIG. 5, since the position of the first nozzle 20 is adjusted so that the edge rinse liquid 22 contacts the material applied to the outer peripheral portion of the wafer, the edge rinse liquid 22 does not hit the orientation flat adjacent material 14a.
- the second nozzle 24 is provided on the center side (the center side of the spin chuck 10) of the wafer 12 than the first nozzle 20, and the back rinse liquid 26 jetted from the second nozzle 24 rotates the wafer 12.
- the inside of the wafer 12 is always in contact with the back surface.
- the above-described orientation flat adjacent material 14 a causes the back rinse liquid 26 jetted from the second nozzle 24 to wrap around the surface of the wafer 12 and is removed. It is shown in FIG. 5 that the back rinse liquid 26 has flowed to the surface side of the wafer 12 and removed a part of the orientation flat adjacent material 14 a.
- FIG. 6 shows that the removal of the orientation flat adjacent material 14a is further advanced from the state of FIG. 5, and the orientation flat adjacent material is removed.
- the back rinse liquid 26 jetted from the second nozzle 24 in order to cause the back rinse liquid 26 jetted from the second nozzle 24 to move to the surface of the wafer 12, 100 to 150 ml / min from the second nozzle 24 while rotating the wafer 12 at 700 to 1000 rpm. It is preferable to spray the back rinse liquid at a flow rate. If the rotation speed of the wafer 12 is lower than the above range, the removal amount of the material 14A other than the ori-fla adjacent material 14a rapidly increases. On the other hand, when the rotation speed of the wafer 12 is higher than the above range, the back rinse liquid 26 does not get into the surface of the wafer 12.
- FIG. 7 is a plan view of the wafer 12 after the rinse process.
- the material on the periphery of the surface of the wafer 12 has been removed. Moreover, since the ori-fla adjacent material is also removed, the entire outside portion of the wafer 12 is exposed.
- the wafer 12 is transferred to an exposure apparatus and a known lithography process is performed.
- a known lithography process is performed.
- the material formed on the outer peripheral portion of the surface of wafer 12 can be reliably removed.
- the most important feature of the present invention is to provide a volatilization step to prevent the material 14A from spreading outward due to centrifugal force in the rinse step. Therefore, the method of manufacturing a semiconductor device according to the above-described embodiment can be variously modified without departing from this feature.
- the effects of the present invention can be obtained by performing the above-described steps even for a wafer having a notch.
- it is not necessary to remove a portion of the material in contact with the orientation flat or the notch in plan view it is not necessary to cause the back rinse liquid 26 jetted from the second nozzle 24 to flow around the surface of the wafer 12.
- the rotational speed of the wafer 12 in the rinse step and the flow rate of the back rinse liquid 26 sprayed from the second nozzle 24 are not particularly limited.
- the second nozzle 24 itself may be omitted.
- the pre-rinsing step between the application step and the volatilization step is not essential.
- the pre-rinsing step when the wafer 12 after the coating step is transported to the hot plate 30, the material adheres to the transport arm, and the wafer is prevented from adhering to the transport arm and dropping from the transport arm.
- the pre-rinsing step is not essential unless the above-mentioned adverse effects occur.
- a spin chuck that can be heated and using the spin chuck as a hot plate, it is possible to eliminate the transfer of the wafer when proceeding from the application step to the volatilization step.
- the wafer 12 may be heated by means other than the hot plate 30.
- the wafer 12 may be introduced into a heating furnace, or a heating wire for heating the wafer 12 may be provided in a chamber for performing a coating process.
- the material 14 is not limited to a resist, and may be, for example, polyimide. Therefore, the process after finishing the rinsing process is not limited to the exposure process.
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- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Cleaning Or Drying Semiconductors (AREA)
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Abstract
Description
まず、図1に示すように、スピンチャック10でウエハ12を真空吸着する。そして、ウエハ12の表面に材料14を塗布する。具体的には、スピンチャック10で回転させられたウエハ12に対し、ウエハ12の上方に設けられたノズル16から材料14を供給する。この工程を塗布工程と称する。なお、材料14は溶媒を含むレジストである。
Claims (5)
- ウエハの表面に溶媒を含む材料を塗布する塗布工程と、
前記材料を加熱して前記溶媒を揮発させる揮発工程と、
前記ウエハを回転させつつ、前記材料を除去するエッジリンス液を第1ノズルから前記ウエハの表面の外周部へ噴射するリンス工程と、を備えたことを特徴とする半導体装置の製造方法。 - 前記ウエハはオリフラ又はノッチを有し、
前記リンス工程では、前記ウエハの裏面を洗浄するバックリンス液を第2ノズルから前記ウエハの裏面へ噴射し、
前記リンス工程では、前記材料のうち平面視で前記オリフラ又はノッチに接する部分を、前記第2ノズルから噴射したバックリンス液を前記ウエハの表面に回りこませて除去することを特徴とする請求項1に記載の半導体装置の製造方法。 - 前記リンス工程では、前記ウエハを700~1000rpmで回転させつつ、前記第2ノズルから100~150ml/分の流量で前記バックリンス液を噴射することを特徴とする請求項2に記載の半導体装置の製造方法。
- 前記塗布工程と前記揮発工程の間に、前記ウエハを回転させつつ、前記ウエハの表面の外周部にエッジリンス液を噴射し前記ウエハの裏面にバックリンス液を噴射する予備リンス工程を備え、
前記予備リンス工程の後に前記ウエハをホットプレートへ搬送し、
前記揮発工程では、前記ホットプレートにより前記材料を加熱することを特徴とする請求項1~3のいずれか1項に記載の半導体装置の製造方法。 - 前記材料はレジスト又はポリイミドであることを特徴とする請求項1~4のいずれか1項に記載の半導体装置の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
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DE112014006368.1T DE112014006368B4 (de) | 2014-02-13 | 2014-02-13 | Halbleitervorrichtungsfertigungsverfahren |
US15/102,329 US9760007B2 (en) | 2014-02-13 | 2014-02-13 | Semiconductor device manufacturing method |
JP2015562623A JP6472760B2 (ja) | 2014-02-13 | 2014-02-13 | レジスト等のウエハ周縁部からの溶解除去方法 |
CN201480075475.5A CN105993061A (zh) | 2014-02-13 | 2014-02-13 | 半导体装置的制造方法 |
PCT/JP2014/053334 WO2015121947A1 (ja) | 2014-02-13 | 2014-02-13 | レジスト等のウエハ周縁部からの溶解除去方法 |
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PCT/JP2014/053334 WO2015121947A1 (ja) | 2014-02-13 | 2014-02-13 | レジスト等のウエハ周縁部からの溶解除去方法 |
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JP (1) | JP6472760B2 (ja) |
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Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2017139320A (ja) * | 2016-02-03 | 2017-08-10 | 東京エレクトロン株式会社 | 基板処理方法、基板処理装置及びコンピュータ読み取り可能な記録媒体 |
WO2018031896A1 (en) * | 2016-08-12 | 2018-02-15 | Inpria Corporation | Methods of reducing metal residue in edge bead region from metal-containing resists |
JP2019067894A (ja) * | 2017-09-29 | 2019-04-25 | エイブリック株式会社 | 半導体装置の製造方法 |
WO2021124929A1 (ja) * | 2019-12-17 | 2021-06-24 | 東京エレクトロン株式会社 | 基板処理方法及び基板処理システム |
WO2022080158A1 (ja) * | 2020-10-12 | 2022-04-21 | 日産化学株式会社 | 機能膜付きウエハーの製造方法 |
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JP7240944B2 (ja) * | 2019-04-23 | 2023-03-16 | 東京エレクトロン株式会社 | 基板処理方法及び基板処理装置 |
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DE112014006368T5 (de) | 2016-10-27 |
JP6472760B2 (ja) | 2019-02-20 |
US20170207080A1 (en) | 2017-07-20 |
JPWO2015121947A1 (ja) | 2017-03-30 |
DE112014006368B4 (de) | 2024-05-08 |
CN105993061A (zh) | 2016-10-05 |
US9760007B2 (en) | 2017-09-12 |
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