WO2014034411A1 - 電力用半導体装置 - Google Patents
電力用半導体装置 Download PDFInfo
- Publication number
- WO2014034411A1 WO2014034411A1 PCT/JP2013/071622 JP2013071622W WO2014034411A1 WO 2014034411 A1 WO2014034411 A1 WO 2014034411A1 JP 2013071622 W JP2013071622 W JP 2013071622W WO 2014034411 A1 WO2014034411 A1 WO 2014034411A1
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- power semiconductor
- electrode
- semiconductor device
- bonding
- semiconductor element
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- H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
- H01L2924/15747—Copper [Cu] as principal constituent
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
- H01L2924/1576—Iron [Fe] as principal constituent
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
- H01L2924/1617—Cavity coating
- H01L2924/16171—Material
- H01L2924/16172—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/16251—Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Definitions
- the present invention relates to a semiconductor device, and more particularly to a power semiconductor device that requires heat dissipation.
- Power semiconductor devices are becoming widespread in every product from industrial equipment to home appliances and information terminals. Especially for home appliances, downsizing and high reliability are required. Moreover, since the power semiconductor device handles a high voltage and a large current, it generates a large amount of heat, and it is necessary to efficiently dissipate heat to the outside. Furthermore, it is simultaneously required to be compatible with a wide band gap semiconductor material such as SiC which is likely to become the mainstream in the future because of its high operating temperature and excellent efficiency.
- a power semiconductor element is often disposed on a substrate on which an electronic circuit is formed.
- heat generated in the power semiconductor element is radiated to the outside through the substrate.
- the thermal conductivity of the substrate itself greatly affects the heat dissipation.
- an AlN substrate that is considered to have excellent thermal conductivity is poorly available.
- readily available alumina substrates and glass epoxy (Garaepo) substrates have a thermal conductivity of only about 1/20 to 1 / 1,000 of that of metals with excellent thermal conductivity such as copper. Therefore, high heat dissipation cannot be expected.
- Japanese Patent Laid-Open No. 10-12812 paragraphs 0012 to 0020, FIGS. 4 and 5) Japanese Unexamined Patent Publication No. 7-7033 (paragraphs 0009 to 0012, FIGS. 1 and 2) JP 2004-214522 A (paragraphs 0022 to 0027, FIG. 3)
- the present invention has been made to solve the above-described problems, and an object thereof is to easily obtain a power semiconductor device that is small in size and excellent in heat dissipation.
- the power semiconductor device has a predetermined interval with respect to a heat transfer plate to which a heat dissipation member is bonded via an insulating layer on a surface opposite to the mounting surface, and the mounting surface of the heat transfer plate.
- a printed circuit board that is disposed so as to be opposed to each other, an electrode pattern is formed on a surface opposite to the surface facing the heat transfer plate, and an opening is provided in the vicinity of the electrode pattern; and the heat transfer
- a power semiconductor element disposed between a board and the printed circuit board and having a back surface bonded to the mounting surface of the heat transfer plate, and a first junction of an element electrode formed on the surface of the power semiconductor element
- a wiring member having one end bonded to the second electrode and the other end bonded to the second bonding portion of the electrode pattern, and in a space extending in the vertical direction of the mounting surface from the element electrode toward the printed circuit board, When at least a part of the second joining portion enters
- the electrode pattern and the opening are arranged in a space extending in the
- the electrode pattern of the printed circuit board can be brought close to the region of the electrode surface of the power semiconductor element, a power semiconductor device having a small size and excellent heat dissipation can be easily obtained.
- FIG. 1 is a partial plan view of a power semiconductor device, a partial plan view through which some members are transmitted, and a partial cross-sectional view for explaining the configuration of the power semiconductor device according to the first embodiment of the present invention; It is a fragmentary sectional view for demonstrating the structure of the power semiconductor device concerning Embodiment 2 of this invention. It is a fragmentary sectional view for demonstrating the structure of the power semiconductor device concerning Embodiment 3 of this invention. It is a fragmentary sectional view for demonstrating the structure of the power semiconductor device concerning Embodiment 4 of this invention.
- FIG. 1A and 1B are diagrams for explaining the configuration of a power semiconductor device according to a first embodiment of the present invention.
- FIG. 1A is a partial plan view of the power semiconductor device, and FIG. Although it is a top view which shows the same part as (a), it is a top view at the time of permeate
- FIG. 2 is a cross-sectional view including different cutting positions along line C1-C2 (parallel lines) in FIG.
- the back electrode of the power semiconductor element is bonded to the opposite surface of the heat spreader on which the heat dissipating member is mounted, and the main surface of the power semiconductor element is further removed.
- the surface electrode through which power flows is electrically connected by wire bonding to the portion of the electrode pattern formed on the interposer substrate that overlaps with a portion of the surface electrode when viewed from the direction perpendicular to the surface electrode surface. It is what I did. Details will be described below.
- the copper heat spreader 4 (15 mm ⁇ 20 mm ⁇ thickness 1 mm) has an aluminum chassis that functions as a heat dissipation member 9 through an insulating layer 8 on the back side.
- a back electrode 21E of a 10 mm ⁇ 10 mm IGBT (Insulated Gate Bipolar Transistor), which is a power semiconductor element 2 is solder 6 (Sn—Ag—Cu: melting point 217 ° C.).
- the interposer substrate 3 is disposed on the surface side of the heat spreader 4 where the power semiconductor elements 2 are bonded, with the potting resin 71 interposed so as to face the heat spreader 4 with a predetermined gap. That is, the power semiconductor element 2 is disposed in the gap between the heat spreader 4 and the interposer substrate 3 so that the back surface is bonded to the heat spreader 4 and the front surface is opposed to the back surface of the interposer substrate 3.
- the interposer substrate 3 is formed by forming a copper electrode pattern 32 on a base 31 made of glass epoxy (commonly called glass epoxy) formed by impregnating glass fiber with an epoxy resin, and has an opening 3a (width 2 mm ⁇ length). 15 mm), at least a part of the main power electrode 21 ⁇ / b> C and the control electrode 21 ⁇ / b> G, which are electrodes on the surface side of the power semiconductor element 2, is exposed.
- a bonding electrode 32 p (wire bond pad) for connecting at least the main power electrode 21 C (for example, collector electrode) on the front side of the power semiconductor element 2 in the electrode pattern 32 is perpendicular to the surface of the interposer substrate 3. When viewed from the right direction (z), it is arranged at a position overlapping with at least a part of the main power electrode 21C.
- the portion exposed from the opening 3a of the main power electrode 21C includes a bonding position for electrical connection with the bonding electrode 32p and a space necessary for bonding.
- the main power electrode 21C and the bonding electrode 32p on the front surface can be bonded by the aluminum bonding wire 5 having a thickness of 0.5 mm from above the interposer substrate.
- the stroke length in the extending direction of the surface (xy) of the bonding wire 5 is shorter than the distance (5 mm) from the center to the end of the main power electrode 21C.
- the bonding electrode 32p for connecting to the control electrode 21G is also at least of the main power electrode 21C when viewed from a direction perpendicular to the surface of the interposer substrate 3. It is arranged in a position that overlaps part.
- the bonding electrode 5p for gate electrode is electrically connected by the bonding wire 5 having a short process length.
- the opening 3a is opened longer than the length of the power semiconductor element 2 in the y direction.
- a predetermined position of the heat spreader 4 exposed from the opening 3 a and another bonding electrode 32 p are electrically connected by the bonding wire 5.
- a predetermined region between the heat spreader 4 and the interposer substrate 3 and on the upper surface side of the interposer substrate 3 is sealed with a sealing body 7 made of resin so as to enclose the power semiconductor element 2 and the bonding wire 5.
- the power semiconductor device 1 having an appearance (part) as shown in FIG. 1A can be formed.
- the electrode pattern 32 continues from the bonding electrode 32p portion to the external terminal portion 32e (the portion exposed in FIG. 1A) via the portion 32b covered with the solder resist 35.
- the electrodes 21C, 21G, and 21E formed on the power semiconductor element 2 are electrically connected to the outside by the external terminal portions 32e exposed from the sealing body 7.
- the bonding electrode 32p for connecting the opening 3a provided in the interposer substrate 3 to the main power electrode 21C on the front side is over at least a part of the main power electrode 21C. Arranged to wrap. Thereby, the electrode pattern 32 can be formed so as to bite into the region of the power semiconductor element 2 in the surface extending direction (xy), and the mounting area can be suppressed. Further, since the insulating layer 8 for joining the heat spreader 4 and the heat radiating member 9 does not require rigidity like a circuit board, it is possible to easily ensure thermal conductivity.
- the power semiconductor device 1 When the power semiconductor device 1 configured as described above is operated, a current flows through the power semiconductor element 2 and the power semiconductor element 2 generates heat. Heat generated in the power semiconductor element 2 is transmitted to the heat radiating member 9 through the heat spreader 4. At this time, since the power semiconductor element 2 and the heat radiating member 9 are connected by a material having excellent thermal conductivity, the generated heat can be efficiently radiated from the heat radiating member 9. In other words, by providing the opening 3a in which the positional relationship with the power semiconductor element 2 is adjusted, processing corresponding to solder bonding is not performed, and operation from a predetermined direction like ultrasonic bonding such as wire bonding can be performed. Even when a power semiconductor element that requires necessary wiring is used, a power semiconductor device that is small in size, has high heat dissipation, and high reliability can be obtained.
- the width of the opening 3a (direction parallel to the wire bonding direction: x direction in the drawing) needs to be larger than the bonding length of the wire bond, but considering the insertion space of the wire bond tool. It is considered that 200% or more of the wire diameter is necessary.
- the sealing body 7 in order to prevent deformation of the bonding wire 5 and ensure high insulation, a material with high flexibility is often used for the sealing body 7.
- the potting resin 71 serving as a spacer is necessary for forming a desired interval between the heat spreader 4 and the interposer substrate 3, and the surface of the power semiconductor element 2 having a complicated shape such as a trench structure is formed on the interposer substrate 3. There is an effect of preventing direct contact. Further, in order to ensure heat dissipation, the interposer substrate 3 is often screwed to the heat dissipation member 9 for the purpose of pressing the heat spreader 4 against the heat dissipation member 9.
- the stress at this time is received by the potting resin 71 serving as a spacer and transmitted to the heat spreader 4, so that the flexible sealing body is deformed so that the stress is not transmitted to the power semiconductor element 2 and the bonding wire 5. .
- the potting resin 71 is harder (has a higher elastic modulus) than the sealing body 7 and is more effective.
- the interposer board 3 which is one of the printed boards has been described as an example.
- the present invention is not limited to the interposer board 3 and is applicable to various printed boards including a mother board, for example. Is possible. That is, in the power semiconductor device according to the present embodiment and each of the following embodiments, the interposer substrate 3 can be read as a printed circuit board and applied.
- the power semiconductor device 1 is a heat transfer plate in which the heat dissipation member 9 is joined to the surface opposite to the mounting surface via the insulating layer 8.
- the heat spreader 4 and the mounting surface of the heat transfer plate (heat spreader 4) are arranged so as to face each other with a predetermined interval, and the surface opposite the inner surface facing the heat transfer plate (heat spreader 4)
- a printed circuit board (interposer substrate 3) having an electrode pattern 32 formed on the outer side and an opening 3a provided in the vicinity of the electrode pattern 32, a heat transfer plate (heat spreader 4), and a printed circuit board (interposer substrate 3)
- a power semiconductor element 2 having a back surface bonded to a mounting surface of a heat transfer plate (heat spreader 4), and an element electrode formed on the surface of the power semiconductor element 2, for example, main power A bonding wire 5 that is a wiring member having one end bonded to the first bonding portion of the electrode 21 ⁇ / b> C and the other end
- At least a part of the second bonding portion enters the space extending in the vertical direction (z) of the mounting surface from the main power electrode 21C) toward the printed circuit board (interposer substrate 3), and an opening portion.
- the electrode pattern 32 and the opening 3a are arranged so that the first junction is included in the space extending in the vertical direction (z) from the element 3a toward the element electrode (main power electrode 21C). Configured. As a result, heat dissipation can be ensured, and the electrode pattern 32 can be applied to the surface even when wiring is performed by ultrasonic bonding that requires an operation from the surface side without using a power semiconductor element in which the surface electrode is adjusted for solder bonding.
- the mounting area can be reduced by biting into the electrode region. That is, a power semiconductor device that is small and excellent in heat dissipation can be easily obtained.
- the upper surface of the power semiconductor element 2 is a wire bonding electrode, and in order to expose this electrode entirely, a slit larger than the power semiconductor element 2 (corresponding to the opening 3a of the present embodiment). ) Has to be formed, and there is a problem that the mounting area is increased as compared with the normal bare chip mounting.
- the electrode pattern 32 on the printed circuit board (interposer substrate 3) to be connected to the upper surface electrode of the power semiconductor element 2 They were placed so as to overlap when viewed from (a position away from the mounting surface in a direction perpendicular to the mounting surface). Therefore, it is possible to reduce the mounting area and the occupied area of the printed circuit board (interposer substrate 3) by reducing the slit (opening 3a).
- the wiring member is a bonding wire 5 which is a bonding wire
- the opening 3a is a region necessary for bonding the bonding wire 5 to the first bonding portion of the element electrode (main power electrode 21C). Therefore, it can be bonded through the opening 3a and can be manufactured efficiently. Furthermore, since the bonding process is shortened, the electrical resistance can be reduced.
- the power semiconductor element 2 is a vertical semiconductor element such as an IGBT having an electrode 21E formed on the back surface.
- FIG. 2 is a partial cross-sectional view for explaining the configuration of the power semiconductor device according to the second embodiment, which corresponds to FIG. 1C in the first embodiment, but the cutting position is shown in FIG. Corresponds to the portion of line b) extended from line C2.
- components similar to those described in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.
- both ends of the heat spreader 4 are raised from the mounting surface to form a tray, and the interposer substrate 3 is supported by support portions 4s formed at both ends.
- a back electrode pattern 33 is formed at a position corresponding to the support portion 4s, and the position of the interposer substrate 3 with respect to the heat spreader 4 is obtained by soldering the back electrode pattern 33 and the support portion 4s. Is fixed. Therefore, the potting resin 71 shown in the first embodiment is not used.
- a part of the back side electrode pattern 33 of the interposer substrate 3 extends to the outside of the sealing body 7 and can be electrically connected to the outside at that part.
- the connection with the back surface electrode 21E of the power semiconductor element 2 does not require wire bonding through the opening 3a as shown in the first embodiment, and the length of the opening 3a is reduced to the surface side. It can be made smaller than the length of the main power electrode 21C.
- restrictions on the arrangement of the electrode patterns 32 on the front surface side are reduced, and the mounting area can be further reduced.
- the facing end of the heat transfer plate (heat spreader 4) is directed from the mounting surface to the printed circuit board (interposer substrate 3). Since the support portion 4s that supports the printed circuit board (interposer substrate 3) is formed, a gap with the printed circuit board (interposer substrate 3) is secured, productivity is increased, and airtightness by the sealing body 7 is increased. It becomes possible.
- the power semiconductor element 2 is a vertical semiconductor element such as an IGBT having an electrode 21E formed on the back surface, and an electrode portion (back side electrode pattern 33) and a support portion formed on a printed circuit board (interposer substrate 3). Since the configuration is such that 4s is electrically connected, for example, the length of the opening 3a can be made smaller than the element size, and the mounting area can be further reduced.
- FIG. 3 is a partial cross-sectional view for explaining the configuration of the power semiconductor device according to the third embodiment, and corresponds to the partial cross-sectional view in the second embodiment.
- components similar to those described in the second embodiment are denoted by the same reference numerals, and description thereof is omitted.
- the main power electrode 21C on the surface of the power semiconductor element 2 and the bonding electrode 32j of the interposer substrate 3 (the bonding electrode 32p described in the first and second embodiments).
- the electrode member 51 was used instead of the bonding wire.
- the electrode member 51 is made of copper and has a so-called canned cap shape in which a flat bottom portion 51f is formed at one end of a cylindrical shape, and a collar-shaped terminal portion 51t extending to the outer edge side is formed at the other end.
- the bottom 51f side is inserted from the opening 3a, the bottom 51f is ultrasonically connected to the main power electrode 21C, and the terminal 51t is soldered to the bonding electrode 32j.
- both ends of the heat spreader 4 are formed with support portions 4s similar to those in the second embodiment, but the other end is extended in the surface extending direction (xy) in the same manner as the support portions 4s.
- a protruding portion 4p protruding in the vertical direction (z) is formed.
- a through hole covered with copper is formed at a position corresponding to the protruding portion 4p of the interposer substrate 3, and the protruding portion 4p passing through the through hole is joined to the electrode 34 in the through hole by solder.
- the interval between the interposer substrate 3 and the heat spreader 4 can be fixed without using the potting resin 71, and positioning in the surface extending direction (xy) is also possible.
- the opening 3a is reduced to reduce restrictions on the arrangement of the electrode patterns 32 on the front surface side, and the mounting area can be further reduced.
- the wiring member to be bonded to the main power electrode 21C is a bottom portion that is a flat portion for ultrasonic bonding to the first bonding portion. Since the electrode member 51 is provided with 51f and the joining electrode 32j which is the second joining portion and the terminal portion 51t for solder joining, for example, compared with the case where solder bumps and through holes are used. A circuit with a small electrical resistance can be formed.
- At least one of the support portions 4s formed at the opposite ends of the heat transfer plate (heat spreader 4) passes through a through hole provided in the printed circuit board (interposer substrate 3). Since the protruding portion 4p exposed on the second surface (outside) side is provided, positioning in the extending direction (xy) of the surface of the printed circuit board (interposer substrate 3) can be easily performed.
- the power semiconductor element 2 is a vertical semiconductor element such as an IGBT having an electrode 21E formed on the back surface.
- the through-hole electrode 34 and the support part 4s which are electrode parts of the printed circuit board (interposer substrate 3). Since the projecting portion 4p is configured to be electrically connected, wiring can be performed only on one surface (outside) of the printed circuit board (interposer substrate 3), so that wiring can be performed efficiently.
- FIG. 4 is a partial cross-sectional view for explaining the configuration of the power semiconductor device according to the fourth embodiment, and corresponds to the partial cross-sectional view in the second embodiment.
- the same components as those described in the first to third embodiments are denoted by the same reference numerals, and the description thereof is omitted.
- the heat spreader 4 is divided into independent plates 4a and 4b and an independent plate in the depth direction (not shown) by a separating portion 4i made of insulating resin.
- the back electrode 21Ea of the power semiconductor element 2a is joined to the independent plate 4a by the solder 6
- the back electrode 21Eb of the power semiconductor element 2b is joined to the independent plate 4b by the solder 6.
- one end side of the independent plate 4b (right side in the figure) penetrates the through hole formed in the interposer substrate 3, and is joined to the electrode 34 in the through hole by solder.
- a protruding portion 4p is formed.
- a support portion 4s that protrudes toward the interposer substrate 3 but does not reach the interposer substrate 3 is formed on one end side (left in the drawing) of the independent plate 4a.
- potting resin 71 serving as spacers.
- the potting resin 71r is formed between the independent plate 4b and the interposer substrate 3 as in the first embodiment. It is formed so as to be interposed therebetween.
- one end of the potting resin 71 s faces the interposer substrate 3, but the other end is formed so that the support portion 4 s bites.
- the main power electrode 21Ca which is an electrode on the surface side of the power semiconductor element 2a bonded to the independent plate 4a, and a control electrode 21Ga (not shown) are exposed. It is installed to do.
- the bonding electrode 32p portion for connecting at least the main power electrode 21Ca on the front side of the power semiconductor element 2a in the electrode pattern 32 is viewed from the direction (z) perpendicular to the surface of the interposer substrate 3.
- the main power electrode 21Ca is disposed at a position overlapping with at least a part of the main power electrode 21Ca.
- the main power electrode 21Ca on the surface and the bonding electrode 32p are electrically connected by wire bonding from above the interposer substrate 3 by an aluminum bonding wire 5a having a thickness of 0.5 mm.
- the bonding electrode 32p for connecting to the control electrode 21Ga also overlaps at least a part of the main power electrode 21Ca when viewed from the direction perpendicular to the surface of the interposer substrate 3. It is arranged at the position to do.
- the gate electrode bonding electrode 32p is electrically connected by a bonding wire having a short process length.
- the gate electrode 21Gb (not shown) of the power semiconductor element 2b is electrically connected to the independent plate 4c (not shown) (positioned behind the independent plate 4b) by the bonding wire 5 and further insulated from the protruding portion 4p in the drawing. It is configured so that it can be connected from the front side of the interposer substrate 3 through another projecting portion (not shown).
- the heat spreader 4 is divided into a plurality of independent plates that are electrically insulated, and an opening is provided in the power semiconductor element at a position that is electrically an end. At that time, it is possible to provide an opening for each power semiconductor element at both ends, but for the power semiconductor element at the other end as in the present embodiment.
- the protruding portion 4p may be used.
- each protrusion when a plurality of protrusions are insulated from each other, each protrusion can be used as an external electrode for electrical connection. Further, by covering the support 4s of the heat spreader 4 with an insulating resin (potting resin 71s), the support 4s can be reinforced while being electrically insulated. Furthermore, since the independent plates 4a, 4b,... Insulated from each other are mechanically connected by the separating portion 4i, the electricity between the power semiconductor elements (between one power semiconductor element and the adjacent independent plate) Connection (wire bonding) can also be performed on a single heat spreader 4.
- an insulating resin potting resin 71s
- the heat transfer plate (heat spreader 4) is composed of a plurality of electrically insulated independent plates 4a, 4b,.
- a plurality of power semiconductor elements (2a, 2b) including a power semiconductor element 2a to which a wiring member (bonding wire 5a) is bonded are separately mounted on the plurality of independent plates 4a, 4b,.
- other power semiconductor elements mounted on different independent plates are arranged between the heat transfer plate (heat spreader 4) and the printed circuit board (interposer substrate 3). Since the wiring members (bonding wires 5b) are electrically connected to each other, the space can be effectively used to further reduce the size.
- the potting resin 71 can reduce the stress of the board screwing applied to the solder joint of the protrusion 4p. . Therefore, also in the power semiconductor device 1 according to the second or third embodiment, as in the first embodiment, by forming the insulating potting resin 71 as a spacer, the solder of the support portion 4s and the protruding portion 4p is formed. The stress of board screwing applied to the joint can be reduced.
- the same effect can be obtained not only with copper but also with a metal such as aluminum, iron, or copper-tungsten as the material of the heat spreader 4.
- a metal such as aluminum, iron, or copper-tungsten
- the example of aluminum was shown here as a raw material of a wire bond, the same effect is acquired also with a copper or a gold wire.
- Sn—Ag—Cu system is shown for the solder joint, the same effect can be obtained with SnSb or SnBi.
- the same effect can be obtained by using a conductive adhesive instead of solder.
- the insulating layer 8 may be made of heat conductive grease instead of a so-called insulating sheet.
- the resin constituting the sealing body 7 can be replaced with silicon gel, and may be omitted if there is no problem of weather resistance.
- a glass epoxy substrate is taken as an example of a material that can be easily obtained without considering thermal conductivity, but a paper phenol substrate, a polyimide substrate, an alumina substrate, The same effect can be obtained with an aluminum base metal substrate.
- the position of the opening 3a is defined at least with respect to the main power electrode among the surface electrodes. This is because when the control electrode (21G) and the main power electrode (21C) are formed on the same surface, the main power electrode (collector electrode 21C) occupies most of the surface, and thus occupies that surface. This is because the effect of reducing the mounting area is higher when overlapping with the electrodes. However, there is an effect even if the electrodes occupy a small area. Therefore, it is not always necessary to overlap the main power supply. Needless to say, the constituent elements of the first to third embodiments described above can be appropriately increased or decreased or combined.
- the configuration shown in the above description as the power semiconductor device 1 is a simplified diagram showing only main members, and it goes without saying that various configurations are made in an actual power semiconductor device.
- the power semiconductor element 2 that is a main heat source in the power semiconductor device 1 is not limited to the IGBT, but other switching elements such as MOSFET (Metal Oxide Semiconductor Field Effect Transistor), or rectification.
- MOSFET Metal Oxide Semiconductor Field Effect Transistor
- rectification As an element, it is an element which controls electric power.
- heat dissipation and miniaturization can be achieved even if an element whose surface electrode is not compatible with solder bonding is used. It does not exclude an element having a surface electrode on which a gold layer is formed.
- a so-called wide band gap semiconductor based on silicon carbide SiC
- silicon carbide gallium nitride-based materials, diamond, and the like are used as the wide band gap semiconductor material.
- the power loss is lower than an element formed of silicon that has been conventionally used.
- the efficiency of the power semiconductor device can be increased.
- the withstand voltage is high and the allowable current density is also high, the power semiconductor device can be downsized.
- the wide band gap semiconductor element has high heat resistance, it can operate at high temperature, and the heat radiating member 9 and the water cooling part can be air cooled. It becomes possible.
- the SiC element can withstand a higher temperature than the conventional Si element, the operating temperature environment of the power semiconductor device on which such a power semiconductor element 2 is mounted is higher than the conventional temperature.
- the temperature range may be reached. Therefore, the importance of heat dissipation increases more and the heat dissipation by this invention is high, and the effect which can be reduced in size appears more notably.
Abstract
Description
図1は、本発明の実施の形態1にかかる電力用半導体装置の構成を説明するためのもので、図1(a)は電力用半導体装置の部分平面図、図1(b)は図1(a)と同じ部分を示す平面図であるが、封止樹脂およびインタポーザ基板の基材部分を透過させた場合の平面図、図1(c)は封止樹脂部分を除いた状態での、図1(b)のC1-C2線(平行線)による異なる切断位置を含む断面図である。
本実施の形態2では、実施の形態1と較べてインタポーザ基板の支持構造を変え、さらに支持構造を利用して電気接続経路も変更したものである。図2は本実施の形態2にかかる電力用半導体装置の構成を説明するための部分断面図で、実施の形態1における図1(c)に対応するものであるが、切断位置は図1(b)のC2線延長した部分に対応する。図中、実施の形態1で説明したものと同様のものには同様の符号を付して説明を省略する。
本実施の形態3では、上記実施の形態1および2と較べて、電力用半導体素子の表面電極とインタポーザ基板との電気接続部材を変更したものである。さらに、実施の形態2と較べてインタポーザ基板とヒートスプレッダの電気接続する部分の構造を変更したものである。図3は本実施の形態3にかかる電力用半導体装置の構成を説明するための部分断面図で、実施の形態2における部分断面図に対応する部分である。図中、実施の形態2で説明したものと同様のものには同様の符号を付して説明を省略する。
本実施の形態4では、上記実施の形態1~3と較べて、ヒートスプレッダが絶縁体によって複数の独立板に分割されており、それぞれの独立板に搭載された電力用半導体素子間の接続を、インタポーザ基板の配線を介さずに、直接ワイヤボンドで行うように変更したものである。さらにヒートスプレッダの突出部を電気的に絶縁して複数に分割することで、それぞれを外部電極として活用できるように変更したものである。図4は本実施の形態4にかかる電力用半導体装置の構成を説明するための部分断面図で、実施の形態2における部分断面図に対応する部分である。図中、実施の形態1~3で説明したものと同様のものには同様の符号を付して説明を省略する。
21C:主電力用電極(素子電極)、 21E:裏面電極、
3:インタポーザ基板(プリント基板)、 3a:開口部、
31:基材、 32:電極パターン、
32p:ボンディング電極(第2の接合部)、
32j:接合電極(第2の接合部)、
33:裏側電極パターン(電極部)、
34:貫通孔の電極(電極部)、 35:ソルダレジスト、
4:ヒートスプレッダ(伝熱板)、 4s:支持部、
4p:突出部、 5:ボンディングワイヤ(配線部材)、
8:絶縁層、 9:放熱部材、 51:電極部材(配線部材)、
51f:底部(平坦部)、 51t:端子部。
Claims (10)
- 実装面の反対側の面に、絶縁層を介して放熱部材が接合される伝熱板と、
前記伝熱板の実装面に対して、所定の間隔をあけて対向するように配置され、前記伝熱板への対向面の反対側の面に電極パターンが形成されるとともに、前記電極パターンの近傍に開口部が設けられたプリント基板と、
前記伝熱板と前記プリント基板との間に配置され、裏面が前記伝熱板の実装面に接合された電力用半導体素子と、
前記電力用半導体素子の表面に形成された素子電極の第1の接合部に一端が接合され、他端が前記電極パターンの第2の接合部に接合された配線部材と、を備え、
前記素子電極から前記プリント基板に向かって前記実装面の垂直方向に延びる空間に、前記第2の接合部の少なくとも一部が入るとともに、前記開口部から前記素子電極に向かって前記垂直方向に延びる空間に、前記第1の接合部が包含されるように、前記電極パターンと前記開口部が配置されていることを特徴とする電力用半導体装置。 - 前記配線部材は、ボンディング用のワイヤであり、
前記開口部は、前記ワイヤを前記第1の接合部にボンディングするために必要な領域を有していることを特徴とする請求項1に記載の電力用半導体装置。 - 前記配線部材は、前記第1の接合部と超音波接合するための平坦部と、前記第2の領域とはんだ接合するための端子部とが設けられた電極部材であることを特徴とする請求項1に記載の電力用半導体装置。
- 前記伝熱板の対向する端部に、それぞれ前記実装面から前記プリント基板に向かって立ち上がり、前記プリント基板を支える支持部が形成されていることを特徴とする請求項1ないし3のいずれか1項に記載の電力用半導体装置。
- 前記対向する端部に形成された支持部の内、少なくとも一方の支持部には、前記プリント基板に設けられた貫通孔内を貫通して第2の面側に露出する突出部が設けられていることを特徴とする請求項4に記載の電力用半導体装置。
- 前記電力用半導体素子は、裏面にも電極が形成された縦型半導体素子であり、
前記伝熱板と前記電極パターンの他の接合部とが、前記開口部を介して配線部材によって電気接続されていることを特徴とする請求項1ないし5のいずれか1項に記載の電力用半導体装置。 - 前記電力用半導体素子は、裏面にも電極が形成された縦型半導体素子であり、
前記プリント基板に形成された電極部と前記支持部とが電気接続されていることを特徴とする請求項4または5に記載の電力用半導体装置。 - 前記伝熱板は、電気的に絶縁された複数の独立板からなり、
前記複数の独立板には、それぞれ前記配線部材が接合された電力用半導体素子を含めた複数の電力用半導体素子が分かれて実装されており、
前記複数の電力用半導体素子のうち、異なる独立板に実装された電力用半導体素子同士が、当該伝熱板と前記プリント基板との間に配置された他の配線部材で電気接続されていることを特徴とする請求項1ないし7のいずれか1項に記載の電力用半導体装置 - 前記電力用半導体素子がワイドバンドギャップ半導体材料により形成されていることを特徴とする請求項1ないし8のいずれか1項に記載の電力用半導体装置。
- 前記ワイドバンドギャップ半導体材料は、炭化ケイ素、窒化ガリウム系材料、およびダイヤモンドのうちのいずれかであることを特徴とする請求項9に記載の電力用半導体装置。
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