WO2012090252A1 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- WO2012090252A1 WO2012090252A1 PCT/JP2010/007611 JP2010007611W WO2012090252A1 WO 2012090252 A1 WO2012090252 A1 WO 2012090252A1 JP 2010007611 W JP2010007611 W JP 2010007611W WO 2012090252 A1 WO2012090252 A1 WO 2012090252A1
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- electrode
- group iii
- semiconductor device
- iii nitride
- layer
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- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- H01S5/32308—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm
- H01S5/32341—Structure or shape of the active region; Materials used for the active region comprising PN junctions, e.g. hetero- or double- heterostructures in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser emitting light at a wavelength less than 900 nm blue laser based on GaN or GaP
Definitions
- the present invention relates to a structure of a semiconductor device using a group III nitride semiconductor formed by epitaxial growth and a manufacturing method thereof.
- Group III nitride semiconductors typified by GaN are widely used as materials for light-emitting elements and power elements such as blue and green LEDs (light-emitting diodes) and LDs (laser diodes) because of their wide band gaps.
- silicon which is a representative semiconductor material
- a large-diameter wafer obtained by cutting out a large-diameter bulk crystal is generally used.
- a bulk crystal having a large diameter for example, 4 inches diameter or more.
- a wafer obtained by heteroepitaxially growing the compound semiconductor on a substrate made of a different material is generally used.
- a pn junction and a heterojunction constituting the LED and LD can be obtained by further epitaxial growth thereon.
- sapphire is known as a material for an epitaxial growth substrate on which a GaN single crystal can be grown.
- sapphire it is relatively easy to obtain a large-diameter bulk single crystal, and GaN can be heteroepitaxially grown on a substrate made of the single crystal by appropriately selecting the plane orientation. Thereby, a wafer on which a large-diameter GaN single crystal is formed can be obtained.
- a pn junction is formed by forming a p-type GaN layer and an n-type GaN layer on a sapphire substrate.
- obtaining a good p-type GaN layer means obtaining an n-type GaN layer.
- a thick n-type GaN layer is formed on a sapphire substrate, and a thin p-type GaN layer is sequentially formed on the n-type GaN layer by epitaxial growth.
- the sapphire serving as the substrate is insulative, electrical contact to the p-type GaN layer and the n-type GaN layer is often taken from the upper side (the side opposite to the substrate). Since sapphire is transparent, light emission can be extracted from the lower side in the light emitting element (flip chip structure).
- FIG. 9 shows a simplified manufacturing process of the light emitting device having this configuration.
- this manufacturing method first, as shown in FIG. 9A, an n-type GaN layer 92 and a p-type GaN layer 93 are sequentially formed on a sapphire substrate 91.
- a buffer layer is often formed between the n-type GaN layer 92 and the sapphire substrate 91 in order to improve the crystallinity of the n-type GaN layer 92, but the description thereof is omitted here.
- FIG. 9A shows a simplified manufacturing process of the light emitting device having this configuration.
- the surface is partially etched to form a region where the n-type GaN layer 92 is exposed, and an n-side electrode 94 is formed in this portion, and the p-type is formed.
- a p-side electrode 95 is formed on the surface of the GaN layer 93.
- Patent Document 1 The material configuration of the electrode in such a configuration is described in Patent Document 1, for example.
- a structure in which Cr or a Cr alloy is formed by sputtering as a layer in contact with the n-type GaN layer 92 in the n-side electrode 94 and an Au layer is formed thereon via Ti is formed on the n-type GaN layer 92.
- Patent Document 2 describes that an alloy of Ti and Al has good ohmic contact characteristics with respect to the n-type GaN layer 92. That is, by connecting the electrodes having these configurations to the n-type GaN layer 92, the electrode resistance can be lowered, and a light emitting element having good light emission characteristics can be obtained.
- FIG. 10 shows a simplified manufacturing method of the light emitting element having this configuration.
- an n-type GaN layer 92 and a p-type GaN layer 93 are sequentially formed on a sapphire substrate 91 via a lift-off layer 96.
- the lift-off layer 96 is removed by chemical treatment (chemical lift-off) or laser light irradiation (laser lift-off).
- the sapphire substrate 91 and the n-type GaN layer 92 are separated, and the lower surface of the n-type GaN layer 92 is exposed.
- FIG. 10A an n-type GaN layer 92 and a p-type GaN layer 93 are sequentially formed on a sapphire substrate 91 via a lift-off layer 96.
- the lift-off layer 96 is removed by chemical treatment (chemical lift-off) or laser light irradiation (laser lift-off).
- the sapphire substrate 91 and the n-type GaN layer 92 are separated, and the lower surface of the n-type GaN layer 92 is exposed.
- the n-side electrode 94 can be formed on a part of the lower surface of the n-type GaN layer 92, and the p-side electrode 95 can be formed on the upper surface of the p-type GaN layer 93. .
- the p-side electrode 95 can be formed on the upper surface of the p-type GaN layer 93. .
- the area of the p-side electrode 95 that is not transparent to the light is increased, and the p-side electrode is formed over a wide range of the surface of the p-type GaN layer 93. 95 can also be formed.
- the resistivity of the p-type GaN layer 93 is generally higher than that of the n-type GaN layer 92, widening the area of the p-side electrode 95 is effective in reducing the resistance of the electrode portion.
- a material having a high reflectance with respect to the emission wavelength is used as the p-type ohmic electrode in contact with the p-type GaN layer, light from the light-emitting layer is reflected to the opposing surface side, and higher luminous efficiency can be obtained.
- GaN which is a compound semiconductor
- group IV semiconductors such as silicon.
- the ⁇ 0001 ⁇ plane of GaN having a wurtzite structure is a so-called polar plane, and is composed of a (0001) Ga polar plane composed only of Ga atoms and an N (nitrogen) atom (000-1).
- N (nitrogen) polar faces are formed in different orientations.
- the upper surface is this (0001) Ga polar surface (hereinafter also referred to as Ga polar surface or Ga-Polar)
- the lower surface parallel to the upper surface Is necessarily a (000-1) N polar face (hereinafter also referred to as a nitrogen polar face or N-Polar). Since the constituent elements of the two types of surfaces are completely different, their properties are also greatly different. Therefore, for example, in the configurations shown in FIGS. 9 and 10, when the upper surface of the n-type GaN layer 92 is a Ga polar surface, the lower surface is a nitrogen polar surface. In this case, when the n-type electrode is formed on the upper surface of the n-type GaN layer and when it is formed on the lower surface, the chemical reactivity, electrical characteristics, and the like are different.
- n-type GaN layer when an n-type GaN layer is heteroepitaxially grown on a sapphire substrate, a sapphire substrate having a (0001) plane orientation in the c-axis direction is often used.
- the crystal structure of sapphire is rhombohedral, it is generally expressed in a hexagonal system.
- the upper surface of the n-type GaN layer 92 in FIGS. 9 and 10 is a (0001) Ga polar plane, and the lower surface is a (000-1) N polar plane.
- the present invention has been made in view of such problems, and an object thereof is to provide an invention that solves the above problems.
- the semiconductor device of the present invention is a semiconductor device comprising an n-type group III nitride semiconductor layer and an electrode that is in ohmic contact with the surface of the n-type group III nitride semiconductor layer, wherein the surface is a semipolar surface. It is characterized by being.
- the semipolar plane is composed of ⁇ 10-1-1 ⁇ plane groups.
- the surface is formed by anisotropic chemical etching a (000-1) N polar face of an n-type group III nitride semiconductor, and the surface of the n-type group III nitride semiconductor device is It has the unevenness
- the n-type group III nitride semiconductor layer is a single crystal formed on a sapphire substrate by epitaxial growth
- the (000-1) N polar surface is a surface on the sapphire substrate side obtained by separating the n-type group III nitride semiconductor layer and the sapphire substrate after epitaxial growth.
- the electrode has a configuration in which titanium (Ti), nickel (Ni), and gold (Au) are sequentially stacked on the semipolar surface of the n-type group III nitride semiconductor layer.
- the semiconductor device according to the present invention is characterized in that it operates when a current flows from the electrode in a direction perpendicular to the main surface of the surface.
- the electrode is formed on a surface composed of a semipolar surface on one main surface side in the n-type group III nitride semiconductor layer, and the other electrode connected to the electrode is The n-type group III nitride semiconductor layer is formed on the other main surface (0001) group III polar surface side.
- the other electrode is formed on a bottom surface of a recess structure formed on the other main surface side of the group III nitride semiconductor.
- the other electrode has a structure in which chromium (Cr), nickel (Ni), and gold (Au) are sequentially stacked on a (0001) group III polar surface.
- a method for manufacturing a semiconductor device is a method for manufacturing a semiconductor device in which an n-type group III nitride semiconductor layer is used, and a growth step of epitaxially growing the n-type group III nitride semiconductor layer on a growth substrate; A lift-off process for separating the n-type group III nitride semiconductor layer and the growth substrate and exposing a surface of the n-type group III nitride semiconductor layer on the growth substrate side; and the n-type group III nitride By performing anisotropic chemical etching on the surface on the growth substrate side in the semiconductor semiconductor layer, a surface with a semipolar surface exposed on the surface on the sapphire substrate side in the n-type group III nitride semiconductor layer is formed.
- a surface etching step, and an electrode forming step of forming an electrode on the surface are separated.
- the anisotropic etching in the surface etching step is wet etching using an alkaline solution.
- the n-type nitride semiconductor layer is formed on the growth substrate via a lift-off layer, and the lift-off layer is selectively etched in the lift-off step. By doing so, the n-type group III nitride semiconductor layer and the growth substrate are separated.
- a good ohmic junction can be formed with respect to the n-type group III nitride semiconductor also on the surface on the growth substrate side.
- an electrode is formed on at least a semipolar plane of the n-type group III nitride semiconductor.
- a polar (Polar) surface, a non-polar (None-polar) surface, and a semi-polar (Semi-polar) surface will be briefly described.
- the nitride semiconductor single crystal has a wurtzite hexagonal structure, and a group III element surface and a nitrogen element surface are alternately stacked in the c-axis direction. Since the bond has some ionicity, spontaneous polarization occurs, and when strain is applied, piezo polarization is also added. Therefore, the polarization state is different between the (0001) group III plane and the (000-1) N (nitrogen) plane.
- the elements exposed on the surface are in a ratio of 1: 1 for both the group III element and the nitrogen element, so that the polarization is canceled out and the so-called nonpolar plane has no apparent polarity.
- the m-plane ⁇ 10-10 ⁇ and the a-plane ⁇ 11-20 ⁇ correspond to it.
- a plane that forms an angle with respect to the c-axis (c-plane) is a semipolar plane, such as ⁇ 11-22 ⁇ plane, ⁇ 20-21 ⁇ plane, ⁇ 0-1-3 ⁇ plane, ⁇ 10-1
- the -1 ⁇ plane corresponds to that.
- the (0001) group III polar surface is expressed as a Ga polar surface for convenience, and even when expressed as a Ga polar surface, the surface is not limited to Ga, and may be a surface containing Al, In, or the like.
- the ohmic characteristics can be improved as confirmed in the examples described later.
- the reason is considered as follows.
- Contact resistance is related to bending of the semiconductor band structure at the interface between the electrode and the semiconductor layer. It is clear that the curvature of the band structure is largely related to the polarity of the semiconductor surface. For this reason, when one kind of electrode material is selected, the ohmic characteristics can be obtained only on one of the polar faces, or the ohmic characteristics cannot be obtained on either polar face.
- the semipolar plane has a different selectivity with respect to the electrode material than the polar plane, and in some cases, good ohmic characteristics can be obtained in a metal configuration different from other polar planes.
- a group III nitride semiconductor is generally formed by heteroepitaxial growth on a substrate, and the growth surface cannot be freely selected from the viewpoint of obtaining good characteristics.
- the growth surface itself is a polar surface so that good characteristics can be obtained in the growing group III nitride semiconductor, but the semipolar surface is forcibly exposed. By doing so, the electrode and the semipolar surface are brought into direct contact.
- FIG. 1 is a process cross-sectional view showing a method for manufacturing this semiconductor device.
- the n-type GaN layer 11 is formed on the sapphire substrate (growth substrate) 20 by heteroepitaxial growth, and the n-type GaN layer on the side where the sapphire substrate 20 is removed.
- 11 is forcibly made a semipolar surface by anisotropic etching, and an n-side electrode (electrode) 12 is formed in contact with the surface.
- the surface on which the n-side electrode 12 is formed is a semipolar surface, but this does not mean that this surface itself is a flat surface and this flat surface is a semipolar surface. This means that this surface is not a flat surface but is composed of fine irregularities, and the micro surface constituting the irregularities is a semipolar surface.
- a metal chromium (Cr) film having a thickness of, for example, about 20 nm is formed as a lift-off layer 21 by, for example, a sputtering method or a vacuum evaporation method.
- a sputtering method for example, a sputtering method or a vacuum evaporation method.
- a single crystal having a quasi-hexagonal c-plane as a main surface is particularly preferably used.
- the growth substrate and the lift-off layer are not limited to the above.
- a substrate such as an AlN template may be used as the growth substrate.
- a nitriding treatment may be performed in this state, for example, at a high temperature of 1040 ° C. or higher in an ammonia atmosphere.
- a nitriding treatment may be performed in this state, for example, at a high temperature of 1040 ° C. or higher in an ammonia atmosphere.
- the vicinity of the surface of the lift-off layer 21 is nitrided to become a chromium nitride layer.
- the thickness of the chromium nitride layer can be set by adjusting the film thickness of the Cr film, the processing time, the temperature, and the like.
- an n-type GaN layer 11 and a p-type GaN layer 13 are sequentially formed on the lift-off layer 21 (growth step).
- layers such as a single quantum well and a multiquantum well structure are located between the n-type layer and the p-type layer.
- the n-type GaN layer 11 is doped with an impurity serving as a donor
- the p-type GaN layer 13 is doped with an impurity serving as an acceptor.
- the n-type GaN layer 11 and the p-type GaN layer 13 with few crystal defects can be grown on the chromium nitride layer.
- the surface (upper surface) of the n-type GaN layer 11 or the surface (upper surface) of the p-type GaN layer 12 grown thereon is a (0001) Ga surface.
- the side in contact with the growth substrate is a (000-1) N polar plane.
- the p-side electrode 14 is formed on the surface (upper surface) of the p-type GaN layer 13.
- Ag can be used as the p-side electrode 14.
- the p-side electrode 14 is patterned by photolithography using an etching method or the like.
- the p-side electrode may be patterned by a lift-off method.
- Ag can form a good ohmic contact with p-type GaN (Ga polar plane), and has a high reflectance of 85% or more, particularly in the visible light region. Therefore, as shown in FIG. The light from the light emitting layer is reflected on the surface side, which contributes to high efficiency of the light emitting element.
- a copper block 32 is connected to the entire upper surface via a cap metal 31 as a support structure after the next lift-off process.
- a cap metal 31 for example, Ni / Au can be used.
- the support structure may be formed by a dry plating method, a wet plating method, or a bonding method with a bonding material between the support metal and the cap metal. Further, the material of the support structure portion may be a metal, an alloy, or a conductive semiconductor.
- the lift-off layer 21 is removed by chemical treatment (lift-off process).
- lift-off process By selective wet etching, only the lift-off layer 21 is selectively removed as shown in FIG. 1E without affecting the n-type GaN layer 11, the p-type layer 13, the support structure, and the like. Can do.
- This process is the same as the process known as chemical lift-off described in JP2009-54888A.
- the lower surface of the n-type GaN layer 11 is exposed. This surface is a (000-1) N polar surface opposite to the upper surface of the n-type GaN layer 11.
- anisotropic wet etching is performed on the laminated structure of the n-type GaN layer 11 and the p-type GaN layer 12 where this surface is exposed (surface etching step).
- anisotropic wet etching is different from etching for the purpose of removing the lift-off layer and cleaning the surface, which etches the surface evenly.
- etching so that a semipolar surface appears with respect to a polar surface is called anisotropic etching. That is, in the present invention, the semipolar plane is a plane whose surface can be formed by etching the polar plane, and is, for example, a ⁇ 10-1-1 ⁇ plane group.
- an alkaline etching solution such as a potassium hydroxide (KOH) solution, a sodium hydroxide (NaOH) solution, or a mixed alkali solution of both may be used.
- KOH potassium hydroxide
- NaOH sodium hydroxide
- etching occurs when OH ⁇ ions oxidize group III atoms (Ga, Al) of GaN or AlGaN.
- GaN since three nitrogen atoms exist below the Ga atom on the Ga polar face side, the OH-ion cannot oxidize Ga.
- FIG. 2 The electron microscope (SEM) photograph of the form after this etching is shown in FIG. 2 (a: Ga polar plane, b: Nitrogen polar plane).
- the hexagonal pyramid shape has six ⁇ 10-1-1 ⁇ planes having a hexagonal bottom surface on the (000-1) plane and an angle of 62 ° with respect to the bottom surface. A group appears. Whether it is the (10-1-1) plane can be determined by determining the angle of the side surface with respect to the bottom surface from shape observation by SEM observation.
- the interface between the n-type GaN layer 11 and the n-side electrode (electrode) 12 is a saw having an angle of about 62 ° to the n-type GaN layer 11 side. It has a blade shape. As shown in FIG. 1 (f) and FIG. 2 (b), after the above etching, the surface shape is composed of unevenness composed of six ⁇ 10-1-1 ⁇ plane groups.
- the effective surface area is about twice as large regardless of the size of the unevenness because it is composed of a group of ⁇ 10-1-1 ⁇ planes which are semipolar planes compared to a flat nitrogen polar plane. Thereby, even if the electrode dimensions in the planar direction are the same, the effective contact area with the n-type electrode is increased, which is effective in reducing the contact resistance value. Since the size of the unevenness can be controlled by the concentration, temperature, and time conditions of the etching solution, it should be a size that is suitable not only for reducing the above contact resistance value but also for improving the light extraction efficiency using Snell's law. Is preferred. For example, the height of the hexagonal pyramid shape is unevenness of 0.3 to 4.5 ⁇ m.
- an n-side electrode (electrode) 12 is formed on the lower surface (semipolar surface after anisotropic etching) of the n-type GaN layer 11 in this state, for example, Ti / Ni. / Au (structure in which Ti, Ni, and Au are laminated in this order) is formed (electrode formation step).
- This formation is preferably performed by, for example, a sputtering method or a vacuum evaporation method.
- the film forming method and patterning method are the same as those for the p-side electrode 14. Since the surface of the n-type GaN layer 11 is composed of the semipolar plane as described above, the ohmic property between the n-side electrode 12 and the n-type GaN layer 11 is good, and the contact resistance can be reduced. .
- the resistivity of the p-type GaN layer 13 is higher than the resistivity of the n-type GaN layer 11.
- the configuration in which the area of the p-side electrode 14 and the area of the n-side electrode 11 are reduced as shown in FIG. 1 reduces the influence of the electrode resistance. preferable.
- light emission is not taken out from the p-side electrode 14 side (reflected by the p-side electrode), and light emission is taken out from the small-area n-side electrode 12 side.
- It can be a diode (light emitting element).
- the above configuration that can reduce the resistance on the n-side electrode 12 side having a small area is extremely effective.
- a semiconductor layer composed of an n-type layer and a p-type layer is sequentially grown on a growth substrate, and then the growth substrate is removed.
- the reason for performing these steps is to take out the p-side electrode and the n-side electrode from different sides of the semiconductor layer after the stacked structure of the p-type layer and the n-type layer is formed.
- this semiconductor device is a light emitting diode or a laser diode using this pn junction, the electrode resistance is lowered by such a configuration, and theoretically, the forward resistance is low and high luminous efficiency can be obtained.
- Such a configuration is not limited to a light-emitting diode or a laser diode, but is clearly effective for all semiconductor devices that operate with a current flowing in a direction perpendicular to the main surface of the semiconductor layer.
- Non-Patent Document 1 Schnitzer et al., Appl. Phys. Lett. 63 (1993) 2174.30% external quantum efficiency from surface textured, thin-film light-emitting diodes.
- the light extraction efficiency is higher when the light emitting surface is formed with unevenness.
- the n-side electrode may be formed on a part of the uneven surface after forming the unevenness, the process is simple, and this effect can be obtained at the same time.
- the group III element of the III nitride semiconductor forming the electrode preferably contains Ga, and more preferably contains 30% or more of Ga.
- the surface on which the electrode is formed is uneven, and the micro surface forming the uneven surface is a semipolar surface.
- the entire surface on which the electrode is formed is a semipolar surface. It is clear that the electrode having the above-described configuration is effective even when it is configured in a plane (for example, when a GaN crystal is physically cut along a semipolar plane).
- the n-side electrode is divided into two parts, an n-side first electrode and an n-side second electrode, and the latter has the same configuration as described above.
- the n-side second electrode (electrode) is formed on the surface composed of a semipolar plane on one main surface side of the n-type GaN layer, as described above.
- the n-side first electrode (other electrode) is formed on the other main surface side of the n-type GaN layer.
- the n-side first electrode is formed on the bottom surface of the recess structure formed on the other main surface side.
- the n-side second electrode and the n-side first electrode With the n-side second electrode and the n-side first electrode, it is possible to establish ohmic connection to the n-type GaN layer from both main surface sides of the n-type GaN layer. As a result, the total contact area between the n-type layer and the n-side electrode is increased to further reduce the electrode resistance and increase the effective light emitting area.
- 3 (a) to 3 (e), 4 (f) to (i), 5 (j) and 5 (k) are a plan view (upper side) and a cross-sectional view (lower side) showing the method of manufacturing the semiconductor device. It is.
- a cross section is a cross section in the location in which the n side electrode was formed.
- an n-type GaN layer 11 and a p-type GaN layer 13 are sequentially formed on a sapphire substrate 20 via a lift-off layer 21 (growth step). Thereafter, a mask is formed on the p-type GaN layer 13, the growth layer other than the element region is removed by dry etching, and isolation grooves capable of individually separating the elements are formed (separation groove forming step).
- a filler is formed at the removed lift-off layer 21 (not shown).
- This filler is made of a material that can be etched together with the lift-off layer 21 in a later lift-off process, and may be the same material as the lift-off layer 21. This is because the etching path of the lift-off layer 21 is ensured even after the insulating layer 43 is formed.
- a groove 41 reaching the n-type GaN layer 11 from the surface of the p-type GaN layer 13 is formed.
- the groove 41 has an annular shape (square annular shape) in plan view, and its depth extends through the p-type GaN layer 13 to the middle of the n-type GaN layer 11.
- the groove 41 can be deformed into a comb shape, a well-shaped shape, a grid shape, a concentric shape, or the like in a plan view.
- the n-side first electrode 42 is formed on the bottom surface of the groove 41. Since the surface on which the n-side first electrode 42 is directly formed is a growth surface of the n-type layer 11, it is generally a Ga polar surface.
- the material of the n-side first electrode 42 capable of making ohmic contact for example, the same material as described in Patent Documents 1 and 2 may be used, but Cr / Ni / Au is used as will be described later. Is preferred.
- the shape of the n-side first electrode 42 corresponds to the groove 41 and is a square ring whose width is narrower than that of the groove 41. With this configuration, the n-side first electrode 42 is formed on the bottom surface of the recess structure in the n-type GaN layer 11.
- the insulating layer 43 is formed in a form that fills the groove 41 and covers the ends of the p-type GaN layer 13 and the n-type GaN layer 11. However, most of the surface of the p-type GaN layer 13 is exposed.
- the insulating layer 43 it is possible to form a film in this form, and for example, SiO2 or the like can be used as a highly insulating material.
- the patterning of the insulating layer 43 can be performed by using photolithography and etching.
- Ti may be inserted on the Au as an adhesion metal.
- the p-side electrode 44 is formed so as to cover the surface of the p-type GaN layer 13 and the insulating layer 43 on the groove 41.
- the surface on which the p-side electrode 44 is formed is the same as in the case of FIG. 1C, and Ag or the like can also be used as the material. The same applies to the patterning and the like.
- a copper block 46 is connected to the entire surface on the side where the p-side electrode 44 is formed via a cap metal 45.
- the copper block 46 will be a support structure portion of the semiconductor layer thereafter.
- the support structure portion may be formed by a dry plating method, a wet plating method, or a bonding method with a bonding material between the support metal and the cap metal. Further, the material of the support structure portion may be a metal, an alloy, or a conductive semiconductor.
- the shape of the support structure is preferably the same as the shape described in International Application PCT / JP2009 / 069230.
- the sapphire substrate 20 is separated by removing the lift-off layer 21 (lift-off process). Thereby, the lower surface of the n-type GaN layer 11 is exposed. As described above, this surface is a nitrogen polar surface. This state is shown upside down in FIG. 4 (h).
- a surface etching step similar to that shown in FIG. 1F is performed (surface etching step).
- the nitrogen polar face is etched, and hexagonal pyramid irregularities formed of six ⁇ 10-1-1 ⁇ face groups which are semipolar faces are formed on the surface of the n-type GaN layer 11.
- contact holes 47 are formed in the n-type GaN layer 11 at locations corresponding to the two vertices of the square annular n-side first electrode 42.
- the n-side first electrode 42 is exposed on the bottom surface of the contact hole 47.
- the process of forming the contact hole 47 is based on dry etching, since the Cr / Ni / Au Ni used for the first electrode can serve as an etch stop layer, the etching stop reproducibility is excellent.
- Conventionally used Cr or Cr alloy / Ti / Au and Ti / Al / Ti / Au have poor reproducibility of etch stop, and the latter has an oxide film formed when Al is exposed. A problem arises because the contact resistance with the electrode increases.
- the contact hole 47 is buried and an n-side second electrode 48 is formed in a wider range (electrode formation step).
- the n-side second electrode 48 the same material as that of the n-side electrode 12 in the case of FIG. 1 can be used. That is, Ti / Ni / Au can be used as a material suitable for the (10-1-1) plane which is a semipolar plane. Since Ni as an etch stop layer of the n-side first electrode 42 can maintain a clean surface, the n-side first electrode 42 and the n-side second electrode 48 can be easily joined, and the junction is highly resistant by oxidation. There will be no change.
- the n-type GaN layer 11 can be contacted from the Ga polar face side by the n-side first electrode 42 and from the nitrogen polar face side by the n-side second electrode 48.
- the n-side first electrode 42 using a material made of Cr / Ni / Au is used on the Ga polar face side.
- the face directly contacting the n-side second electrode 48 is converted to a ⁇ 10-1-1 ⁇ face that is a semipolar face, and Ti / Ni / Au By adopting a layer structure, good ohmic contact can be obtained.
- the n-side first electrode 42 and the n-side second electrode 48 are configured as shown in FIG. 5 (k), the area where this electrode blocks this light emission can be reduced, and high luminous efficiency can be obtained. It is possible. For this reason, it becomes a light emitting element of a favorable characteristic.
- the layout and shape of the n-side first electrode 42 and the n-side second electrode 48 can be appropriately changed. The arrangement of the contact holes 47 and the like can be appropriately set according to this.
- an n-side electrode is formed on the three types of Ga polar face, nitrogen polar face, and hexagonal pyramid-shaped semipolar face by vacuum vapor deposition (the degree of vacuum during vapor deposition is 8 ⁇ 10 ⁇ 4 Pa or less). The results of examining the characteristics will be described.
- a sapphire substrate (C surface) was used as a growth substrate, Cr (thickness 20 nm) was formed on the sapphire substrate by sputtering, and nitriding was performed at 1080 ° C. in an ammonia atmosphere.
- the nitriding treatment is performed in order to improve the crystallinity of the upper n-type GaN layer and facilitate lift-off.
- n-type GaN Si-doped carrier concentration: about 5 ⁇ 10 18 cm ⁇ 3 , thickness 5 ⁇ m
- the exposed surface after the lift-off process is a (000-1) N polar surface opposite to the above.
- etching treatment at 60 ° C. for 30 minutes using a 6 mol / L KOH aqueous solution, a surface shape as shown in FIG. 7 was obtained.
- the irregularities had a hexagonal pyramid shape, and the triangular surface of the hexagonal pyramid shape was at an angle of 62 ° with respect to the (000-1) bottom surface. -1-1 ⁇ face group was confirmed.
- Electrodes made of various materials are formed on the three types of semipolar planes formed as described above, (0001) Ga plane and (000-1) N plane which are not subjected to an etching step, and TLM (Transmission Line) is formed.
- the current-voltage characteristics at the contacts were examined by the Model method.
- TLM method electrodes having a length of 400 ⁇ m and a width of 150 ⁇ m were formed at intervals of 20, 40, 80, and 160 ⁇ m.
- the current-voltage characteristics were measured by contacting prober needles with these electrode patterns.
- FIG. 8 shows the current-voltage characteristics when the electrode spacing is 80 ⁇ m.
- FIGS. 8 (a) to 8 (c) show the case of Cr / Ni / Au, and no heat treatment after film formation (As Depo). .), Samples after heat treatment at 250 ° C. and 400 ° C.
- the heat-resistant temperature of a silicone-based resin-encapsulated package with a high heat-resistant temperature is about 150 ° C., so it is rare that the device is used at 150 ° C. or higher, and there is no problem in practicality as an electrode. It is judged that there is. For example, as shown in FIG. 8D to FIG. 8F, there is rectification on the Ga polar face, and good ohmic characteristics cannot be obtained.
- the resistance value is smaller on the N-polar surface than on the Ga-polar surface, the ohmic characteristics are inferior to that on the semipolar surface. Rather, since the formation of the n-side electrode is performed at the final stage after the lift-off, it is not necessarily necessary to apply heat to the element after forming the n-side electrode. Therefore, for example, it is practically preferable to obtain ohmic characteristics in the range from As Depo to 250 ° C.
- the n-side electrode In a metal configuration in which ohmic characteristics cannot be obtained unless heat treatment is performed at a higher temperature, for example, 400 ° C., the n-side electrode
- diffusion at a p-side electrode or a junction formed in advance or a problem such as peeling due to a difference in thermal expansion coefficient between Cu and the group III nitride semiconductor used for the support structure occurs. Not suitable.
- the n-side first electrode 42 can be made of Cr / Ni / Au that can form a good ohmic contact with the Ga polar surface.
- the contact resistance can be particularly reduced, so that the area of the n-side electrode can be reduced and the efficiency of the light emitting element can be increased.
- a dispersive electrode in order to make the current density flowing in the element uniform, not only the bonding pad or bump part for connection to the outside of the element but also an auxiliary It is common to install a dispersive electrode.
- the n-side first electrode 42 may be a main dispersion electrode
- the n-side second electrode 48 may be an auxiliary dispersion electrode.
- the electrode area on the element surface can be reduced, light shielding by the electrode is reduced, and the efficiency of the light emitting element can be increased.
- the first electrode and the second electrode layout can be combined and modified as shown in FIG.
- Ti / Al electrodes were formed on the Ga polar face, the nitrogen polar face and the semipolar face as ohmic electrodes of the n-type nitride semiconductor.
- the film thicknesses of Ti and Al were 20 nm and 300 nm, respectively. Other than that was produced by the same method as in Example 1. As Depo. In the state, the current-voltage characteristics of the Ga polar plane, nitrogen polar plane and semipolar plane were all in a good linear relationship, and the ohmic characteristics were good.
- the contact resistance value ⁇ c is 6 ⁇ 10 ⁇ 5 ⁇ ⁇ cm 2 for the Ga polar surface, 4 ⁇ 10 ⁇ 4 ⁇ ⁇ cm 2 for the nitrogen polar surface, and 6 ⁇ 10 ⁇ 4 ⁇ ⁇ cm 2 for the semipolar surface.
- the nitrogen polar surface and the semipolar surface were about one digit larger than the Ga polar surface, and the semipolar surface had the highest resistance.
- the contact resistance value is 1 ⁇ 10 ⁇ 3 ⁇ ⁇ cm 2 for the Ga polar surface sample, 6 ⁇ 10 ⁇ 3 ⁇ ⁇ cm 2 for the nitrogen polar surface, and 5 ⁇ 10 5 for the semipolar surface.
- the contact resistance value increased, and the Ga polar face had ohmic properties, but the ones on the nitrogen polar face and the semipolar face lost their linearity and became ohmic. lost. From the above, it was reconfirmed that the Ti / Al electrode can be practically used as an ohmic electrode material with respect to the Ga polar face. However, when this electrode is used as the n-side first electrode 42 in the semiconductor device having the structure shown in FIG. 5K, Ti is more easily etched than Ni in dry etching when forming a through hole.
- the reproducibility of the etch stop is poor, and the oxide film on the Al surface generated during the process in the atmosphere has an adverse effect on the contact resistance with the n-side second electrode 48 and is likely to increase the resistance.
- the resistance value is inferior to that when Ti / Ni / Au is applied to a semipolar surface, and there is a problem of heat resistance. I understood.
- the Ti / Al-based electrode conventionally used for the Ga polar face is not suitable for the Ga polar face side having a structure as shown in FIG.
- the Ti / Ni / Au electrode in particular has a good ohmic contact when the n-side electrode is formed on the semipolar plane, and on the side where the growth substrate is removed using this electrode. It was shown that a semiconductor device having a good n-side electrode can be manufactured.
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Abstract
Description
本発明の半導体装置は、n型III族窒化物半導体層と、当該n型III族窒化物半導体層の表面にオーミック接触する電極とを具備する半導体装置であって、前記表面は半極性面であることを特徴とする。また、半極性面は{10-1-1}面群で構成される。
本発明の半導体装置において、前記表面はn型III族窒化物半導体の(000-1)N極性面を異方性化学エッチングすることによって形成され、前記n型III族窒化物半導体装置の表面は前記半極性面で構成された凹凸を具備することを特徴とする。
本発明の半導体装置において、前記n型III族窒化物半導体層はエピタキシャル成長によってサファイア基板上に形成された単結晶であり、
前記(000-1)N極性面は、エピタキシャル成長後に前記n型III族窒化物半導体層と前記サファイア基板を分離することによって得られた前記サファイア基板側の面であることを特徴とする。
本発明の半導体装置は、前記電極は、前記n型III族窒化物半導体層の半極性面にチタン(Ti)、ニッケル(Ni)、金(Au)が順次積層された構成を具備することを特徴とする。
本発明の半導体装置は、前記電極から前記表面における主面と垂直方向に電流が流されて動作することを特徴とする。
本発明の半導体装置は、前記電極が前記n型III族窒化物半導体層における一方の主面側において半極性面で構成された表面上に形成され、かつ前記電極と連結された他の電極が前記n型III族窒化物半導体層における他方の主面(0001)III族極性面側に形成されたことを特徴とする。
本発明の半導体装置において、前記他の電極は、前記III族窒化物半導体における他方の主面側で形成されたリセス構造の底面に形成されたことを特徴とする。
本発明の半導体装置において、前記他の電極は、(0001)III族極性面にクロム(Cr)、ニッケル(Ni)、金(Au)が順次積層された構成を具備することを特徴とする。
本発明の半導体装置の製造方法は、n型III族窒化物半導体層が用いられる半導体装置の製造方法であって、前記n型III族窒化物半導体層を成長用基板上にエピタキシャル成長させる成長工程と、前記n型III族窒化物半導体層と前記成長用基板とを分離し、前記n型III族窒化物半導体層における前記成長用基板側の面を露出させるリフトオフ工程と、前記n型III族窒化物半導体層における前記成長用基板側の面に対して異方性化学エッチングを施すことにより、前記n型III族窒化物半導体層における前記サファイア基板側の面において半極性面が露出した表面を形成する表面エッチング工程と、前記表面上に電極を形成する電極形成工程と、を具備することを特徴とする。
本発明の半導体装置の製造方法において、前記表面エッチング工程における異方性エッチングは、アルカリ系溶液を用いたウェットエッチングであることを特徴とする。
本発明の半導体装置の製造方法は、前記成長工程において、前記n型窒化物半導体層はリフトオフ層を介して前記成長用基板上に形成され、前記リフトオフ工程において、前記リフトオフ層を選択的にエッチングすることにより、前記n型III族窒化物半導体層と前記成長用基板とを分離することを特徴とする。
また、支持構造部の材質は金属、合金、導電性を有する半導体であってもよい。
以下では、Ga極性面、窒素極性面、六角錘形状の半極性面の3種類に、真空蒸着法(蒸着時の真空度は8×10-4Pa以下)によりn側電極を形成し、その特性について調べた結果について説明する。
12、94 n側電極(電極)
13 p型GaN層(p型III族窒化物半導体層)
14、44、95 p側電極
20 サファイア基板(成長用基板)
21、96 リフトオフ層
31、45 キャップメタル
32、46 銅ブロック
41 溝
42 n側第1電極(電極)
43 絶縁層
47 コンタクト孔
48 n側第2電極(電極)
Claims (13)
- n型III族窒化物半導体層と、当該n型III族窒化物半導体層の表面にオーミック接触する電極とを具備する半導体装置であって、
前記表面は半極性面であることを特徴とする半導体装置。 - 前記半極性面は{10-1-1}面群で構成されることを特徴とする請求項1に記載の半導体装置
- 前記表面はn型III族窒化物半導体の窒素極性面を異方性化学エッチングすることによって形成され、前記n型III族窒化物半導体装置の表面は前記半極性面で構成された凹凸を具備することを特徴とする請求項2に記載の半導体装置。
- 前記n型III族窒化物半導体層はエピタキシャル成長によって成長用基板上に形成された単結晶であり、
前記窒素極性面は、エピタキシャル成長後に前記n型III族窒化物半導体層と前記成長用基板を分離することによって得られた前記成長用基板側の面であることを特徴とする請求項3に記載の半導体装置。 - 前記電極は、前記n型III族窒化物半導体層の半極性面にチタン(Ti)、ニッケル(Ni)、金(Au)が順次積層された構成を具備することを特徴とする請求項1から請求項4までのいずれか1項に記載の半導体装置。
- 前記電極から前記表面における主面と垂直方向に電流が流されて動作することを特徴とする請求項1から請求項5までのいずれか1項に記載の半導体装置。
- 前記電極が前記n型III族窒化物半導体層における一方の主面側において半極性面で構成された表面上に形成され、かつ前記電極と連結された他の電極が前記n型III族窒化物半導体層における他方の主面側に形成されたことを特徴とする請求項1から請求項6までのいずれか1項に記載の半導体装置。
- 前記他の電極は、前記III族窒化物半導体におけるGa極性面側で形成されたリセス構造の底面に形成されたことを特徴とする請求項7に記載の半導体装置。
- 前記他の電極は、ニッケル(Ni)を含むことを特徴とする請求項7から請求項8までのいずれか1項に記載の半導体装置。
- 前記他の電極は、クロム(Cr)、ニッケル(Ni)、金(Au)が順次積層された構成を具備することを特徴とする請求項7から請求項8までのいずれか1項に記載の半導体装置。
- n型III族窒化物半導体層が用いられる半導体装置の製造方法であって、
前記n型III族窒化物半導体層を成長用基板上にエピタキシャル成長させる成長工程と、
前記n型III族窒化物半導体層と前記成長用基板とを分離し、前記n型III族窒化物半導体層における前記成長用基板側の面を露出させるリフトオフ工程と、
前記n型III族窒化物半導体層における前記成長用基板側の面に対して異方性化学エッチングを施すことにより、前記n型III族窒化物半導体層における前記成長用基板側の面において半極性面が露出した表面を形成する表面エッチング工程と、
前記表面上に電極を形成する電極形成工程と、
を具備することを特徴とする半導体装置の製造方法。 - 前記表面エッチング工程における異方性エッチングは、アルカリ性溶液を用いたウェットエッチングであることを特徴とする請求項11に記載の半導体装置の製造方法。
- 前記成長工程において、前記n型窒化物半導体層はリフトオフ層を介して前記成長用基板上に形成され、
前記リフトオフ工程において、前記リフトオフ層を選択的にエッチングすることにより、前記n型III族窒化物半導体層と前記成長用基板とを分離することを特徴とする請求項11又は12に記載の半導体装置の製造方法。
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JP2015177135A (ja) * | 2014-03-17 | 2015-10-05 | 株式会社東芝 | 半導体発光素子 |
WO2017150280A1 (ja) * | 2016-03-01 | 2017-09-08 | スタンレー電気株式会社 | 縦型紫外発光ダイオード |
JP2019205970A (ja) * | 2018-05-29 | 2019-12-05 | 日本電信電話株式会社 | 半導体光電極 |
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