TWI690995B - 半導體裝置的製造方法 - Google Patents
半導體裝置的製造方法 Download PDFInfo
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- TWI690995B TWI690995B TW105142915A TW105142915A TWI690995B TW I690995 B TWI690995 B TW I690995B TW 105142915 A TW105142915 A TW 105142915A TW 105142915 A TW105142915 A TW 105142915A TW I690995 B TWI690995 B TW I690995B
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
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- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
- H01L21/0231—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to electromagnetic radiation, e.g. UV light
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
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Abstract
本發明之實施例提供一種半導體裝置的製造方法。方法包括:形成輻射可移除材料(RRM)層於基底上方;藉由將基底的第一區中之輻射可移除材料(RRM)層的第一部份曝光至輻射束,以移除輻射可移除材料(RRM)層的第一部份。在基底的第一區中之輻射可移除材料(RRM)層的第一部份移除之後,基底的第二區中之輻射可移除材料(RRM)層的第二部分留下。方法亦包括:形成選擇性形成層(SFL)於基底的第二區中之輻射可移除材料(RRM)層的第二部分上方;以及形成材料層於基底的第一區上方。
Description
本發明實施例係關於半導體裝置的製造方法。
半導體積體電路(IC)產業歷經了指數成長。IC材料及設計上的技術進步已產生了數代的IC,其中每一代皆比前一代具有體積更小且更精密的電路。在IC發展的進程上,功能密度(即,每一晶片之內連線裝置的數量)逐漸增加的同時,幾何尺寸(即,利用製程步驟可以產生之最小元件(或線))逐漸縮小。
此微縮化(scaling down)製程通常可提供增加產率及降低相關成本之益處。此微縮化亦增加了IC製造的複雜度。為了實現這些進展,IC製造也需要類似發展。雖然IC裝置現有的製造方法通常已足以達到所欲之目的,但並非在每個方面都十分令人滿意。例如,仍需要改良材料層之圖案化。
本發明提供許多製造半導體裝置之不同實施例,其提供對現有方法之一或多個改良。在一實施例中,一種製造半導體裝置的方法包括:形成輻射可移除材料(RRM)層於基底上方;藉由將基底的第一區中之輻射可移除材料(RRM)層的第一部份曝光至輻射束,以移除輻射可移除材料(RRM)層的第一部份。因此,在基底的第一區中之輻射可移除材料(RRM)層的
第一部份移除之後,基底的第二區中之輻射可移除材料(RRM)層的第二部分留下。方法亦包括:形成選擇性形成層(SFL)於基底的第二區中之輻射可移除材料(RRM)層的第二部分上方;以及形成材料層於基底的第一區上方。
在另一實施例中,方法包括:形成輻射可移除材料(RRM)層於基底上方;以及藉由穿過光罩的極紫外(EUV)光束來曝光基底的第一區中之輻射可移除材料(RRM)層,以移除輻射可移除材料(RRM)層的第一部份。因此,在基底的第一區中之輻射可移除材料(RRM)層的第一部份移除之後,基底的第二區中之輻射可移除材料(RRM)層的第二部分留下。方法亦包括:形成自組裝單分子層(SAM)於第二區中之輻射可移除材料(RRM)層的第二部分上方;以及形成材料層於基底的第一區上方。
在又一實施例中,方法包括:對介電基底實行六甲基二矽氮烷(HMDS)處理,以改質介電基底的表面;以及在氫氣環境下,將介電基底曝光至穿過光罩的極紫外(EUV)光束,以移除介電基底的第一區中經改質表面的第一部份。因此,在第一區中之經改質表面的第一部份移除之後,介電基底的第二區中之經改質表面的第二部份留下。方法亦包括:形成自組裝單分子層(SAM)於第二區中之經改質表面的第二部分上方;以及形成金屬氧化層於介電基底的第一區上方。
100:方法
102:步驟
104:步驟
106:步驟
108:步驟
110:步驟
112:步驟
200:半導體裝置
210:基底
310:輻射可移除材料(RRM)層
340:未曝光區(第一區)
350:曝光區(第二區)
410:光源
420:輻射束
430:氫氣
440:光罩
450:圖案化輻射可移除材料(RRM)層
510:選擇性形成層(SFL)
510:自組裝單分子層(SAM)
610:材料層
620:圖案化材料層
以下將配合所附圖式詳述本發明之實施例,應注意的是,依照工業上的標準實施,以下圖示並未按照比例繪
製,事實上,可能任意的放大或縮小元件的尺寸以便清楚表現出本發明的特徵。而在說明書及圖式中,除了特別說明外,同樣或類似的元件將以類似的符號表示。
第1圖係根據一些實施例,製造半導體裝置之例示方法之流程圖。
第2、3A、3B、4、5及6圖係根據一些實施例,例示半導體裝置的剖面圖。
以下提供許多不同的實施方法或是例子來實行各種實施例之不同特徵。以下描述具體的元件及其排列的例子以闡述本發明。當然這些僅是例子且不該以此限定本發明的範圍。例如,元件的尺寸並不限定於所揭露的範圍或數值,而是取決於製程條件及/或裝置所期望的性質。此外,在描述中提及第一個元件形成於第二個元件上時,其可以包括第一個元件與第二個元件直接接觸的實施例,也可以包括有其他元件形成於第一個與第二個元件之間的實施例,其中第一個元件與第二個元件並未直接接觸。為簡化及清楚起見,各種特徵可任意繪製成不同尺寸。
此外,其中可能用到與空間相關的用詞,像是“在…下方”、“下方”、“較低的”、“上方”、“較高的”及類似的用詞,這些關係詞係為了便於描述圖示中一個(些)元件或特徵與另一個(些)元件或特徵之間的關係。這些空間關係詞包括使用中或操作中的裝置之不同方位,以及圖示中所描述的方位。裝置可能被轉向不同方位(旋轉90度或其他方位),則
其中使用的空間相關形容詞也可相同地照著解釋。
第1圖係根據一些實施例,製造一或多個半導體裝置之方法100之流程圖。下方將配合如第2、3A、3B、4、5及6所示之半導體裝置200來詳細說明方法100。
請參照第1及2圖,方法100開始於步驟102,提供基底210。基底210包括矽。替代地或額外地,基底210可包括其他元素半導體,例如鍺。基底210亦可包括化合物半導體,例如碳化矽、砷化鎵、砷化銦及磷化銦。基底210可包括合金半導體,例如矽鍺、碳化矽鍺、磷化鎵砷及磷化鎵銦。在一實施例中,基底210可包括磊晶層。舉例來說,基底可具有上覆於塊狀半導體之磊晶層。此外,基底210可包括絕緣體上半導體(semiconductor-on-insulator,SOI)基底。舉例來說,基底210可包括藉由諸如以氧離子植入矽晶隔離法(separation by implanted oxygen,SIMOX)來分離之製程或藉由諸如晶圓接合及研磨之其它合適技術所形成之埋藏氧化物層(buried oxide layer,BOX)。
基底210亦可包括介電基底,例如氧化矽、氮化矽、氮氧化矽、低介電常數(low-k)介電質、碳化矽及/或其他合適的層。
基底210亦可包括各種p型摻雜區及/或n型摻雜區,其係藉由諸如離子佈植及/或擴散之製程來植入。這些摻雜區包括n井、p井、光摻雜區(light doped region,LDD)及各種通道摻雜輪廓(profiles),其設置以形成各種積體電路(IC)裝置,例如:互補金氧半場效電晶體(complimentary
metal-oxide-semiconductor field-effect transistor,CMOSFET)、影像感測器及/或發光二極體(light emitting diode,LED)。基底210更可包括其它功能性特徵,例如:電阻及/或電容形成於基底之中及/或之上。
基底210亦可包括各種隔離特徵。隔離特徵分隔基底210中之各種裝置區。隔離特徵包括藉由使用不同製程技術所形成之不同結構。例如,隔離特徵可包括淺溝槽隔離(shallow trench isolation,STI)特徵。淺溝槽隔離(STI)之形成可包括蝕刻溝槽於基底210中,以及以諸如氧化矽、氮化矽及/或氮氧化矽之絕緣材料填充溝槽。填充的溝槽可具有多層結構,例如以氮化矽填充溝槽之熱氧化物襯層。可實行化學機械拋光(chemical mechanical polishing,CMP)以回拋(polish back)過多的絕緣材料及平坦化絕緣特徵的頂表面。
基底210亦可包括藉由介電層及電極層所形成之閘極堆疊。介電層可包括界面層(interfacial layer,IL)及高介電常數(high-k,HK)介電層,其係藉由合適的技術所沉積,例如:化學氣相沉積(chemical vapor deposition,CVD)、原子層沉積(atomic layer deposition,ALD)、物理氣相沉積(physical vapor deposition,PVD)、熱氧化、上述組合及/或其它合適技術。界面層(IL)可包括氧化物、HfSiO及氮氧化物,且高介電常數(HK)介電層可包括LaO、AlO、ZrO、TiO、Ta2O5、Y2O3、SrTiO3(STO)、BaTiO3(BTO)、BaZrO、HfZrO、HfLaO、HfSiO、LaSiO、AlSiO、HfTaO、HfTiO、(Ba,Sr)TiO3(BST)、Al2O3、Si3N4、(SiON)氮氧化物及/或其它合適材料。電極層可包括單層或多層結構,
例如:具有功函數以增進裝置性能之金屬層(功函數金屬層)、襯層、潤濕層、黏合層以及金屬、金屬合金或金屬矽化物之導電層之各種組合。金屬閘極(MG)電極420可包括Ti、Ag、Al、TiAlN、TaC、TaCN、TaSiN、Mn、Zr、TiN、TaN、Ru、Mo、Al、WN、Cu、W、任何合適材料及/或上述之組合。
基底210亦可包括複數個層間介電(inter-level dielectric,ILD)層及導電特徵,其整合以形成配置來耦合各種p型及n型摻雜區與其它功能性特徵(例如閘極電極)之互連結構,產生一功能性積體電路。在一實例中,基底210可包括互連結構的一部分,且互連結構包括多層互連(multi-layer interconnect,MLI)結構及與多層互連(MLI)結構整合的介層介電(ILD)層,提供電性佈線以將基底210中之各種裝置耦合至輸入/輸出功率及信號。互連結構包括各種金屬線、接觸件及介層窗特徵(或介層插塞)。金屬線提供水平電性佈線。接觸件提供矽基底與金屬線之間的垂直連接,而介層窗特徵提供金屬線於不同金屬層之間的垂直連接。
通常,基底210或基底210上方的膜層將藉由光微影製程來圖案化。光微影製程使用光以將圖案(例如幾何圖案)從光罩轉移至基底上的光敏感層(例如:光阻(photoresist)或簡稱”阻層(resist)”)。光在光敏感層的曝光區中造成化學變化,其可增加或減少曝光區的溶解度。可在曝光基底之前或之後實行烘烤製程,例如後曝光烘烤製程。顯影製程利用顯影劑於基底上方創造曝光圖案,以選擇性移除曝光或未曝光區。當光阻曝光至極紫外(EUV)光時,產生小量的酸於曝光區域之中。於
後曝光烘烤(post-exposure bake,PEB)步驟期間,此酸催化了附著至光阻的聚合物鏈之基團的片段(去保護)並改變其化學性質。最後,光阻的去保護部分溶解在液體顯影劑中。於後曝光烘烤(PEB)步驟期間,光阻中酸的擴散導致圖案化區域之邊緣模糊,並造成解析度限制、線邊緣粗糙(line edge roughness,LER)及圖案崩壞之問題。本發明實施例提供一種圖案化製程,其不使用光阻及隨後的顯影製程。
請再次參照第1及2圖,方法100繼續至步驟104,形成輻射可移除材料(radiation-removable-material,RRM)層310於基底210上方。當在隨後步驟中曝光至輻射時,輻射可移除材料(RRM)層310將被移除。在本實施例中,輻射可移除材料(RRM)層310可包括具有非環狀結構及環狀結構之有機材料,且環狀結構可為芳香環及非芳香環,其可以包含官能基以增加附著性,例如:-F、-Cl、-Br、-I、-PO(OH)2、-PO4、-BO3、-C2O4、-NO3、-SO3、-CO3、-S、-CN、-CH3COO、-NH2、-ClO4、-ClO3、-ClO2、-ClO、-COOH、-OH、-SH、-N3、-S(=O)-、亞胺、醚、乙烯基醚、縮醛、半縮醛、酯、醛,酮、醯胺、碸、醋酸、氰化物。可藉由化學氣相沉積(CVD)、原子層沉積(ALD)、物理氣相沉積(PVD)、熱氧化、旋轉塗佈、上述組合或其它合適技術來沉積輻射可移除材料(RRM)層310。
或者,可藉由實行六甲基二矽氮烷(hexamethyldisilizane,HMDS)處理來形成輻射可移除材料(RRM)層310,以將基底210的頂部(表面)改質成輻射可移除材料(RRM)層310。在一實施例中,對氧化矽基底210的頂表面實
行六甲基二矽氮烷(HMDS)處理。在六甲基二矽氮烷(HMDS)處理中,以氣相形式將六甲基二矽氮烷(HMDS)試劑引入含有氧化矽基底210的腔室中。作為一”羥基吸收劑(hydroxyl getter)”,六甲基二矽氮烷(HMDS)化學移除表面OH基。首先,六甲基二矽氮烷(HMDS)與氧化物表面的水反應以產生氣態NH3、氧及惰性六甲基二矽氧烷(hexamethyldisiloxane)。這產生了脫水表面。接著,額外的六甲基二矽氮烷(HMDS)與釋放的氧反應以形成三甲基甲矽烷基(thrimethylsilyl)氧化物種類(species),其化學接合至上述表面。這些反應持續進行直到氧化物基底210的整個表面被上述種類覆蓋,或氧化物基底210的整個表面被改質成輻射可移除材料(RRM)層310,其被稱為六甲基二矽氮烷(HMDS)輻射可移除材料(RRM)層310。在一實施例中,於約90℃至約150℃的溫度下實行六甲基二矽氮烷(HMDS)處理約2秒至約1000秒的時間。
請參照第1及3A圖,方法100繼續至步驟106,將輻射可移除材料(RRM)層310曝光至輻射束以形成圖案化輻射可移除材料(RRM)層450於基底210上方。在本實施例中,輻射可移除材料(RRM)層310曝光至從光源410穿過光罩(罩幕或網線(reticle))440之輻射束420。
根據欲製造之IC產品的規格,光罩440具有為IC產品所設計之預定義圖案(具有複數個第一區340及第二區350)。光罩440的圖案相應於構成IC裝置的各種元件之材料的圖案。舉例來說,IC設計佈局的一部分包括各種IC特徵,其形成於基底210及設置在基底210上之各種材料層中,上述IC特徵例如:
主動區、閘極電極、源極及汲極、介層互連結構之金屬線或介層窗,以及接合墊之開口。在第一區340中,藉由光罩440阻擋輻射束420,使其免於到達輻射可移除材料(RRM)層310,其係為未曝光區(第一區)340。而在第二區350中,輻射束420未被光罩440阻擋且可以穿過光罩440以到達輻射可移除材料(RRM)層310,其係為曝光區(第二區)350。如此一來,在曝光區(第二區)350中,輻射可移除材料(RRM)層310接收輻射束420且接著被移除;而在未曝光區(第一區)340中,輻射可移除材料(RRM)層310未接收輻射束420且留下來。換句話說,如第3B圖所示,形成具有圖案的圖案化輻射可移除材料(RRM)層450,其圖案係藉由光罩440的預定義圖案所定義。形成圖案化輻射可移除材料(RRM)層450,使得基底210在未曝光區(第一區)340中被輻射可移除材料(RRM)層310所覆蓋,而暴露於曝光區(第二區)350中。
光源410可為各種來源,包括氟化氪(Krypton Fluoride,KrF)準分子雷射(excimer lasers)之248nm光束、氟化氬(Argon Fluoride,ArF)準分子雷射之193nm光束、氟氣(Fluoride,F2)準分子雷射之157nm光束或具有較長波長之其它光源。光源410亦可包括光學來源,其選自於由紫外(ultraviolet,UV)光源、深紫外(deep ultraviolet,DUV)光源、極紫外(EUV)光源及X射線光源所組成之群組及/或其它合適光源。
在本實施例中,如第3A圖所示,在氫氣430的環境下,將穿過光罩440的極紫外(EUV)輻射束420實行至六甲基二矽氮烷(HMDS)輻射可移除材料(RRM)層310,以移除曝光區(第
二區)350中之六甲基二矽氮烷(HMDS)輻射可移除材料(RRM)層310,並接著形成圖案化六甲基二矽氮烷(HMDS)輻射可移除材料(RRM)層450。如此一來,未曝光區(第一區)340中的六甲基二矽氮烷(HMDS)輻射可移除材料(RRM)層310(經改質表面)留下,而不具六甲基二矽氮烷(HMDS)輻射可移除材料(RRM)層310之氧化物基底210暴露於曝光區(第二區)350中。也就是說,不同於典型的光微影製程,將輻射可移除材料(RRM)層310圖案化而未實行顯影步驟。
請參照第1及4圖,方法100繼續至步驟108,形成選擇性形成層(selective-forming-layer,SFL)510於未曝光區(第一區)340中殘留的輻射可移除材料(RRM)層310上方,並留下基底210暴露於曝光區(第二區)350中。在本實施例中,選擇性形成層(SFL)510為自組裝單分子層(self-assembled monolayer,SAM)510。自組裝單分子層(SAM)510可包括非環狀結構及環狀結構、芳香環及非芳香環。其包含至少一個單牙配位基膦酸。在一實施例中,藉由將十八烷基膦酸(octadecylphosphonic acid,ODPA)之溶液塗覆至具有圖案化六甲基二矽氮烷(HMDS)輻射可移除材料(RRM)層450的氧化物基底210,接著以甲醇沖洗並藉由壓縮空氣乾燥,以形成自組裝單分子層(SAM)510。因此,自組裝單分子層(SAM)510被稱為十八烷基膦酸(ODPA)自組裝單分子層(SAM)510。舉例來說,藉由將氧化物基底210浸入十八烷基膦酸(ODPA)之溶液中以形成十八烷基膦酸(ODPA)自組裝單分子層(SAM)510。又舉例來說,藉由以十八烷基膦酸(ODPA)之溶液來沖洗氧化物基底210以形成十八烷基膦酸
(ODPA)自組裝單分子層(SAM)510。
請參照第1及5圖,方法100繼續至步驟110,形成材料層610於曝光區(第二區)350中暴露的基底210上方。在本實施例中,藉由區域選擇性原子層沉積(ALD)技術或區域選擇性分子層沉積(molecular layer deposition,MLD)技術來形成材料層610,使得材料層610選擇性沉積在暴露的基底210上方,而未沉積於選擇性形成層(SFL)510上方。
材料層610可包括諸如Ce、La、Sb、Bi、Pb、Hf、Zr、Ti、Cr、W、Mo、Fe、Ru、Os、Co、Rh、Ir、Ni、Pd、Pt、Cu、Ag、Au、Zn、Cd、Al、Ga、Tl、Ge、Sn、Pb及Bi等金屬的氧化物、氟化物及有機金屬化合物。有機金屬錯合物的配位基可包括具有諸如環氧、偶氮化合物、鹵烷、亞胺、烯、炔、過氧化物、酮、醛、丙二烯、芳香基或雜環基等官能基之C3-C20烷基。芳香結構可包括苯基、萘基、菲基、蒽基、萉基(phenalenyl)及其它含有一至五員環之芳香衍生物。
材料層610亦可包括金屬,例如:Ce、La、Sb、Bi、Pb、Hf、Zr、Ti、Cr、W、Mo、Fe、Ru、Os、Co、Rh、Ir、Ni、Pd、Pt、Cu、Ag、Au、Zn、Cd、Al、Ga、Tl、Ge、Sn、Pb、Bi及/或其它合適金屬。
材料層610亦可包括聚合物,其具有諸如非環狀結構及環狀結構之化學結構。環狀結構可包括芳香環及非芳香環。聚合物可包含官能基,例如:F、-Cl、-Br、-I、-PO(OH)2、-PO4、-BO3、-C2O4、-NO3、-SO3、-CO3、-S、-CN、-CH3COO、-NH2、-ClO4、-ClO3、-ClO2、-ClO、-COOH、-OH、-SH、-N3、
-S(=O)-、亞胺、醚、乙烯基醚、縮醛、半縮醛、酯、醛,酮、醯胺、碸、醋酸、氰化物及/或其它合適聚合物化學結構。
在本實施例中,材料層610為金屬氧化物層,其藉由原子層沉積(ALD)技術選擇性地沉積在氧化物基底210上方。
請參照第1及6圖,方法100繼續至步驟112,選擇性地移除選擇性形成層(SFL)510及從未曝光區(第一區)340中殘留的輻射可移除材料(RRM)層310。可藉由選擇性濕蝕刻、選擇性乾蝕刻及/或其組合來移除選擇性形成層(SFL)510及殘留的輻射可移除材料(RRM)層310。舉例來說,選擇性濕蝕刻溶液可包括TMAH、HNO3、NH4OH、KOH、HF、HCl、NaOH、H3PO4及/或其它合適濕蝕刻溶液或上述組合。或者,選擇性乾蝕刻製程可使用含氯氣體(例如:Cl2、CHCl3、CCl4及/或BCl3)、含溴氣體(例如:HBr及/或CHBr3)、含碘氣體、含氟氣體(例如:CF4、SF6、CH2F2、CHF3及/或C2F6)及/或其它合適氣體,及/或電漿,及/或上述之組合。
在本實施例中,可藉由四甲基氫氧化銨(TMAH)濕蝕刻以選擇性移除十八烷基膦酸(ODPA)自組裝單分子層(SAM)510及六甲基二矽氮烷(HMDS)輻射可移除材料(RRM)層310。
在移除選擇性形成層(SFL)510及殘留的輻射可移除材料(RRM)層310之後,材料層610保留在具有圖案的基底上方,其稱為圖案化材料層620,且光罩440的圖案係設計用於圖案化材料層620。形成圖案化材料層620使得材料層610形成於曝光區(第二區)350上方,但未形成於未曝光區(第一區)340上
方。
可以於方法100之前、期間及之後提供額外的步驟,且一些所述之步驟在方法100之額外的實施例中可以被取代、刪除或移動。
基於上述,本發明之實施例提供藉由極紫外(EUV)曝光、自組裝單分子層(SAM)形成及原子層沉積/分子層沉積(ALD/MLD)以將材料層圖案化的方法。此方法採用實行六甲基二矽氮烷(HMDS)處理以改質基底之表面,並於氫氣環境下實行極紫外(EUV)曝光製程,以在所選區域中移除經改質基底之頂表面。也就是說,此方法達成將材料層圖案化而不需經過典型的顯影製程,其包括於曝光基底之後施用顯影溶液。此方法更顯示將材料層圖案化,使其具有提高的解析度並減少圖案崩壞的問題。
本發明提供許多製造半導體裝置之不同實施例,其提供對現存方法之一或多個改善。在一實施例中,一種製造半導體裝置的方法包括:形成輻射可移除材料(RRM)層於基底上方;藉由將基底的第一區中之輻射可移除材料(RRM)層的第一部份曝光至輻射束,以移除輻射可移除材料(RRM)層的第一部份。因此,在基底的第一區中之輻射可移除材料(RRM)層的第一部份移除之後,基底的第二區中之輻射可移除材料(RRM)層的第二部分留下。方法亦包括:形成選擇性形成層(SFL)於基底的第二區中之輻射可移除材料(RRM)層的第二部分上方;以及形成材料層於基底的第一區上方。
在一些實施例中,其中藉由將輻射可移除材料
(RRM)層的第一部份曝光至輻射束以移除基底的第一區中之輻射可移除材料(RRM)層的第一部份包括:藉由穿過光罩的輻射束來曝光輻射可移除材料(RRM)層的第一部分,其中光罩阻擋基底的第二區中之輻射束。
在一些實施例中,其中輻射束為極紫外(EUV)光束。
在一些實施例中,其中形成輻射可移除材料(RRM)層於基底上方包括實行六甲基二矽氮烷(HMDS)處理以改質基底的一部份。
在一些實施例中,其中基底為介電基底。
在一些實施例中,其中藉由將輻射可移除材料(RRM)層的第一部份曝光至輻射束以移除基底的第一區中之輻射可移除材料(RRM)層的第一部份包括:在氫氣環境下,將介電基底曝光至極紫外(EUV)光束。
在一些實施例中,其中形成選擇性形成層(SFL)於第二區中之輻射可移除材料(RRM)層上方包括:形成自組裝單分子層(SAM)。
在一些實施例中,其中形成自組裝單分子層(SAM)包括:將十八烷基膦酸(ODPA)之溶液施用至基底。
在一些實施例中,其中形成材料層於基底的第一區上方包括:藉由原子層沉積(ALD)或分子層沉積(MLD)來選擇性形成材料層。
在一些實施例中,其中形成材料層於基底的第一區上方包括:形成金屬氧化物層於基底的第一區上方。
在一些實施例中,方法更包括:在形成材料層於基底的第一區上方之後,移除基底的第二區中之選擇性形成層(SFL)及輻射可移除材料(RRM)層。
在另一實施例中,方法包括:形成輻射可移除材料(RRM)層於基底上方;以及藉由穿過光罩的極紫外(EUV)光束來曝光基底的第一區中之輻射可移除材料(RRM)層,以移除輻射可移除材料(RRM)層的第一部份。因此,在基底的第一區中之輻射可移除材料(RRM)層的第一部份移除之後,基底的第二區中之輻射可移除材料(RRM)層的第二部分留下。方法亦包括:形成自組裝單分子層(SAM)於第二區中之輻射可移除材料(RRM)層的第二部分上方;以及形成材料層於基底的第一區上方。
在一些實施例中,其中基底為氧化物基底;及其中形成輻射可移除材料(RRM)層於基底上方包括:對氧化物基底實行六甲基二矽氮烷(HMDS)處理。
在一些實施例中,其中藉由穿過光罩的極紫外(EUV)光束來曝光基底包括:在氫氣環境下,藉由極紫外(EUV)光束來曝光氧化物基底。
在一些實施例中,其中形成自組裝單分子層(SAM)於第二區中之輻射可移除材料(RRM)層上方包括:將十八烷基膦酸(ODPA)之溶液施用至氧化物基底。
在一些實施例中,其中形成材料層於基底的第一區上方包括:形成金屬氧化物層於基底的第一區上方。
在一些實施例中,方法更包括:在形成材料層於
基底的第一區上方之後,移除基底的第二區中之自組裝單分子層(SAM)。
在又一實施例中,方法包括:對介電基底實行六甲基二矽氮烷(HMDS)處理,以改質介電基底的表面;以及在氫氣環境下,將介電基底曝光至穿過光罩的極紫外(EUV)光束,以移除介電基底的第一區中經改質表面的第一部份。因此,在第一區中之經改質表面的第一部份移除之後,介電基底的第二區中之經改質表面的第二部份留下。方法亦包括:形成自組裝單分子層(SAM)於第二區中之經改質表面的第二部分上方;以及形成金屬氧化層於介電基底的第一區上方。
在一些實施例中,其中形成自組裝單分子層(SAM)包括:將十八烷基膦酸(ODPA)之溶液施用至具有經改質表面的介電基底。
在一些實施例中,方法更包括:在形成金屬氧化層於介電基底的第一區上方之後,移除第二區中之自組裝單分子層(SAM)。
前述內文概述了許多實施例的特徵,使本技術領域中具有通常知識者可以更佳的了解本發明的各個方面。本技術領域中具有通常知識者應該可理解,他們可以很容易的以本發明為基礎來設計或改質其它製程及結構,並以此達到相同的目的及/或達到與本發明介紹的實施例相同的優點。本技術領域中具有通常知識者也應該了解這些相等的結構並不會背離本發明的發明精神與範圍。本發明可以作各種改變、置換、修改而不會背離本發明的發明精神與範圍。
100‧‧‧方法
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Claims (10)
- 一種半導體裝置的製造方法,包括:形成一輻射可移除材料(radiation-removable-material,RRM)層於一基底上方;藉由將該基底的一第一區中之該輻射可移除材料(RRM)層的一第一部份曝光至一輻射束,以移除該輻射可移除材料(RRM)層的該第一部份,其中,在該基底的該第一區中之該輻射可移除材料(RRM)層的該第一部份移除之後,該基底的一第二區中之該輻射可移除材料(RRM)層的一第二部分留下;形成一選擇性形成層(selective-forming-layer,SFL)於該基底的該第二區中之該輻射可移除材料(RRM)層的該第二部分上方;以及形成一材料層於該基底的該第一區上方。
- 如申請專利範圍第1項所述之半導體裝置的製造方法,其中藉由將該輻射可移除材料(RRM)層的該第一部份曝光至該輻射束以移除該基底的該第一區中之該輻射可移除材料(RRM)層的該第一部份包括:藉由穿過一光罩的該輻射束來曝光該輻射可移除材料(RRM)層的該第一部分,其中該光罩阻擋該基底的該第二區中之該輻射束。
- 如申請專利範圍第1項所述之半導體裝置的製造方法,其中該輻射束為極紫外(EUV)光束。
- 如申請專利範圍第1項所述之半導體裝置的製造方法,其中形成該輻射可移除材料(RRM)層於該基底上方包括實行六 甲基二矽氮烷(hexamethyldisilizane,HMDS)處理以改質該基底的一部份。
- 如申請專利範圍第1項所述之半導體裝置的製造方法,其中形成該選擇性形成層(SFL)於該第二區中之該輻射可移除材料(RRM)層上方包括:形成一自組裝單分子層(self-assembled monolayer,SAM)。
- 如申請專利範圍第5項所述之半導體裝置的製造方法,其中形成該自組裝單分子層(SAM)包括:將十八烷基膦酸(octadecylphosphonic acid,ODPA)之溶液施用至該基底。
- 一種半導體裝置的製造方法,包括:於一基底上方形成一輻射可移除材料(radiation-removable-material,RRM)層;藉由穿過一光罩的一極紫外(EUV)光束來曝光該輻射可移除材料(RRM)層,以移除該基底的該第一區中之該輻射可移除材料(RRM)層的一第一部份,其中在移除該第一區中之該輻射可移除材料(RRM)層的該第一部份之後,留下該基底的一第二區中之該輻射可移除材料(RRM)層的一第二部分;於該第二區中之該輻射可移除材料(RRM)層的該第二部分上方形成一自組裝單分子層(self-assembled monolayer,SAM);以及於該基底的該第一區上方形成一材料層。
- 如申請專利範圍第7項所述之半導體裝置的製造方法,其中該基底為一氧化物基底,且其中於該基底上方形成該輻射可移除材料(RRM)層包括:對該氧化物基底實行六甲基二矽氮 烷(hexamethyldisilizane,HMDS)處理。
- 如申請專利範圍第8項所述之半導體裝置的製造方法,其中藉由穿過該光罩的該極紫外(EUV)光束來曝光該基底包括:在氫氣環境下,藉由該極紫外(EUV)光束來曝光該氧化物基底。
- 一種半導體裝置的製造方法,包括:對一介電基底實行六甲基二矽氮烷(hexamethyldisilizane,HMDS)處理,以改質該介電基底的一表面;在氫氣環境下,將該介電基底曝光至穿過一光罩的一極紫外(EUV)光束,以移除該介電基底的一第一區中經改質的該表面的一第一部份,在移除該第一區中經改質的該表面的該第一部份之後,留下該介電基底的一第二區中經改質的該表面的一第二部份;於該第二區中經改質的該表面的該第二部份上方形成一自組裝單分子層(self-assembled monolayer,SAM);以及在該介電基底的該第一區上方形成一金屬氧化層。
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CN (1) | CN107068542B (zh) |
TW (1) | TWI690995B (zh) |
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