TWI517327B - 半導體裝置 - Google Patents

半導體裝置 Download PDF

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Publication number
TWI517327B
TWI517327B TW101128382A TW101128382A TWI517327B TW I517327 B TWI517327 B TW I517327B TW 101128382 A TW101128382 A TW 101128382A TW 101128382 A TW101128382 A TW 101128382A TW I517327 B TWI517327 B TW I517327B
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Taiwan
Prior art keywords
crack stopper
hollow cylinder
crack
conductor
semiconductor device
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TW101128382A
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English (en)
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TW201334137A (zh
Inventor
余振華
史達元
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台灣積體電路製造股份有限公司
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Publication of TW201334137A publication Critical patent/TW201334137A/zh
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Publication of TWI517327B publication Critical patent/TWI517327B/zh

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Description

半導體裝置
本發明主要是關於一種半導體裝置及其形成方法，特別是關於一半導體裝置中，防裂的系統與方法。
一般而言，一半導體晶片可使用球閘陣列(ball grid arrays)或塌陷高度控制晶片連接(controlled collapse chip connection；C4)的軟銲凸塊，與另一基板例如有機印刷電路板接合。在此類製程中，可使用例如電鍍、錫膏模板印刷或植球的方法，將一軟銲凸塊形成於此半導體晶片與此基板的其中之一或二者上，然後使軟銲料重流而成為所需的凸塊形狀。一旦完成軟銲凸塊的形成，便使上述半導體晶片上的接點對準上述基板上與其對應的接點，其中軟銲凸塊是位於這些接點之間。一旦完成對準，再度使軟銲凸塊重流並液化，液化的軟銲料會流到上述接點上並加以潤濕，而在上述半導體晶片與上述基板之間提供電性及物理性的連接。
然而，一半導體晶片與上述基板的熱膨脹係數有相當程度的差異。因此，當上述半導體晶片與上述基板接合時，二者均會歷經熱機械循環(thermomechanical cycling)，熱機械循環可用來模擬系統的開機與關機的循環，以符合JEDEC可靠度測試需求，上述半導體晶片與上述基板會以不同的程度在加熱升溫的循環的過程膨脹、在冷卻降溫的循環的過程收縮。在此膨脹的情況會造成應力作用在作為 上述半導體晶片與上述基板的內連線之軟銲接合物。
此問題特別是普遍地存在於上述半導體晶片與上述基板之間的連接。尤其由上述半導體晶片與上述基底之間的熱膨脹係數的不匹配造成的應力，是劇烈到足以使裂縫可實際上在作為上述半導體晶片與上述基板的內連線之軟銲接合物內成長。這些裂縫的傳播可能會隨後穿過整個接合物而使上述半導體晶片與上述基板之間的電性導通及/或物理性連接劣化或甚至毀損。這些缺陷會使構件失效並需要完全的重製。
本發明的一實施例是提供一種半導體裝置，其包含一導體墊與一第一止裂器(crack stopper)。上述導體墊是位於一基板上。上述第一止裂器是延伸自上述導體墊，上述第一止裂器為環形並沿著上述導體墊的一外圍區域設置。
在上述之半導體裝置中，較好為：上述第一止裂器在其環形中具有一第一開口。
在上述之半導體裝置中，較好為：更包含環形的一第二止裂器，上述第二止裂器的直徑小於上述第一止裂器的直徑，並與上述第一止裂器橫向並列。
在上述之半導體裝置中，較好為：上述第一止裂器在其環形中具有一第一開口，上述第二止裂器在其環形中具有一第二開口。
在上述之半導體裝置中，較好為：上述環形是不連續的環形。
在上述之半導體裝置中，較好為：上述不連續的環形包含複數個部分重疊的弧形物。
在上述之半導體裝置中，較好為：上述第一止裂器是沿著上述導體墊的一外圍區域排列的複數個止裂器的其中之一。
在上述之半導體裝置中，較好為：更包含一第二止裂器，上述第二止裂器設置在上述導體墊的一中央區域中。
本發明的另一實施例是提供一種半導體裝置，其包含位於一基底上的一凸塊下金屬與一第一止裂器。上述凸塊下金屬包含一中心區域與圍繞上述中心區域的一外圍區域。上述第一止裂器是位於上述外圍區域中的上述凸塊下金屬上，上述第一止裂器具有一第一圓形。
在上述之半導體裝置中，較好為：上述第一止裂器是不連續的圓形。
在上述之半導體裝置中，較好為：在上述凸塊下金屬上更包含一第二止裂器，上述第二止裂器具有一第二圓形。
在上述之半導體裝置中，較好為：更包含具有一第二圓形的一第二止裂器與具有一第三圓形的一第三止裂器。上述第一止裂器、上述第二止裂器、與上述第三止裂器較好是在上述外圍區域中彼此橫向分離。
在上述之半導體裝置中，較好為：上述第一圓形、上述第二圓形、與上述第三圓形為實心的圓形。
在上述之半導體裝置中，較好為：更包含具有一第四圓形的一第四止裂器，上述第四止裂器是設置在上述凸塊下金屬的上述中心區域中。
在上述之半導體裝置中，較好為：更包含：一支持基板、一第二止裂器及一導體材料。上述支持基板較好為具有面向上述凸塊下金屬的一導體層。上述一第二止裂器較好為位於上述導體層上。上述導體材料較好為接觸上述第一止裂器與上述第二止裂器二者。
本發明的又另一實施例是提供一種半導體裝置，其包含一導體區與一第一止裂器。上述導體區是位於一第一半導體基板上。上述第一止裂器是位於上述導體區上，上述第一止裂器具有一銲線，上述銲線以銲線接合的方式與上述第一半導體基板上的上述導體區接合。
在上述之半導體裝置中，較好為：上述第一止裂器具有複數個銲線，上述銲線以銲線接合的方式與上述第一半導體基板上的上述導體區接合。
在上述之半導體裝置中，較好為：上述些銲線的高度低於200μm。
在上述之半導體裝置中，較好為：上述銲線是柱形。
在上述之半導體裝置中，較好為：上述導體區是一凸塊下金屬。
為讓本發明之上述和其他目的、特徵、和優點能更明顯易懂，下文特舉出較佳實施例，並配合所附圖式，作詳細說明如下：
實施例會以特定型態的實施例來敘述，也就是一止裂器，其適用於一晶圓級晶片封裝、C4或封裝疊加 (Package-on-Package；PoP)內連線結構中的一半導體晶片與一基板之間的一軟銲接合物。然而，本實施例亦可應用於其他的連接製程。
現在請參考第1A圖，圖中顯示一半導體積體電路晶片100，其具有一半導體基材基板101、一主動元件103、一金屬化層105、一第一鈍化層107、一第一接觸墊109、一第二鈍化層111、一凸塊下金屬(underbump metallization；UBM)113、以及一第一止裂器115。半導體基材基板101可包含已摻雜或未摻雜的塊矽(bulk silicon)或一絕緣層上覆矽(silicon-on-insulator；SOI)基板的一主動層。一般而言，一絕緣層上覆矽基板是包含一半導體材料層，其半導體材料例如為矽、鍺、矽鍺(silicon germanium)、絕緣層上覆矽、絕緣層上覆矽鍺(silicon germanium on insulator；SGOI)、或上述之組合。亦可使用的其他基板包含多層基板、組成漸變基板、或混合取向基板(hybrid orientation substrate)。
主動元件103(為了圖式的簡潔，僅在第1A圖繪示眾多主動元件中的一個)可形成於半導體基材基板101上。對於本發明所屬技術領域中具有通常知識者而言，可理解主動元件103可包含種類繁多的主動元件及例如電容器、電阻器、電感器等被動元件，可滿足半導體積體電路晶片100設計上的結構性與功能性的需求。可使用任何適當方法將主動元件103形成於半導體基材基板101的表面中或半導體基材基板101的表面上。
金屬化層105可形成在半導體基材基板101與主動元 件103的上方，並被設計來連接各種主動元件103來形成功能性電路。雖然僅在第1A圖中繪示單層的金屬化層105，但可以以交互、多層的介電材料(例如低介電常數介電材料)及導體材料(例如銅)來形成金屬化層105，另外金屬化層105可使用任何適當的製程(例如沉積、鑲嵌、雙鑲嵌等)來形成。在一實施例中，可藉由至少一層的層間介電層(interlayer dielectric layer；ILD)，將四層的金屬化層與半導體基材基板101分離，但金屬化層105的確切的數量是視半導體積體電路晶片100的設計而定。
第一鈍化層107可形成於半導體基材基板101上的金屬化層105的上方。可以一或多種適當的介電材料例如氧化矽、氮化矽、摻碳的氧化物等的低介電常數介電材料、多孔質之摻碳的二氧化矽等的極低介電常數介電材料、或上述之組合等等，來形成第一鈍化層107。可經由任何適當的製程例如化學氣相沉積(chemical vapor deposition；CVD)製程來形成第一鈍化層107，且第一鈍化層107的厚度可以是0.5μm~5μm，例如約9.25KÅ。
在完成第一鈍化層107的形成之後，可藉由移除部分的第一鈍化層107來形成穿透第一鈍化層107的一開口，以曝露金屬化層105的至少一部分。上述穿透第一鈍化層107的開口，可使第一接觸墊109與金屬化層105的一導體部分發生接觸。可使用任何適當的製程例如一適當的微影遮罩及蝕刻製程來形成上述穿透第一鈍化層107的開口，以曝露金屬化層105的一部分。
可經由上述開口將第一接觸墊109形成於金屬化層 105的一導體部分的上方並與其發生電性接觸。第一接觸墊109可包含鋁，但亦可以以其他材料例如銅來取代鋁。第一接觸墊109的形成可使用一沉積製程例如濺鍍來形成一材料層(未繪示)，然後可經由一適當的製程(例如微影遮罩及蝕刻)來移除此材料層的一部分，以形成第一接觸墊109。然而，可使用任何其他的製程來形成第一接觸墊109。第一接觸墊109的形成厚度可以是0.5μm~4μm，例如1.45μm。
在完成第一接觸墊109的形成之後，可在第一接觸墊109與第一鈍化層107的上方形成第二鈍化層111。第二鈍化層111可由一聚合物例如聚醯亞胺(polyimide)來形成第二鈍化層111。此外，亦可以以與用作第一鈍化層107的材料類似的材料例如氧化矽、氮化矽、低介電常數介電材料、極低介電常數介電材料、或上述之組合等等，來形成第二鈍化層111。第二鈍化層111的形成厚度可以是2μm~15μm，例如5μm。
在完成第二鈍化層111的形成之後，可藉由移除部分的第二鈍化層111來形成穿透第二鈍化層111的一開口，以曝露第一接觸墊109的至少一部分。上述開口可使第一接觸墊109與凸塊下金屬113(會在後文作詳細敘述)發生接觸。可使用任何適當的製程例如一適當的微影遮罩及蝕刻製程來形成上述開口，以曝露第一接觸墊109的一部分。
在完成穿透第二鈍化層111的上述開口之形成以曝露第一接觸墊109的至少一部分之後，可越過上述開口而形成凸塊下金屬113，並將凸塊下金屬113形成於第二鈍化 層111的上方且與第一接觸墊109發生接觸。在一實施例中，凸塊下金屬113可包含三層導電材料，例如為一鈦層、一銅層與一鎳層。然而對於本發明所屬技術領域中具有通常知識者而言，可理解有許多合適的材料及層的配置是適用於凸塊下金屬113的形成，這些合適的材料及層的配置例如為鉻/鉻一銅合金/銅/金的配置、鈦鎢/銅/鎳的配置、或是鈦/銅/鎳/金的配置。可用於形成凸塊下金屬113的任何適當的材料或不同材料層的組合，均包含於本專利申請案的範圍內。
可藉由在第二鈍化層111與第一接觸墊109的上方形成各層而成為凸塊下金屬113。可使用一鍍膜製程例如電鍍法(electrochemical plating)來執行各層的形成，但根據所需求的材料亦可使用其他形成製程例如濺鍍、蒸鍍、或電漿增益化學氣相沈積(plasma enhanced chemical vapor deposition；PECVD)製程等，取代上述鍍膜法。凸塊下金屬113的形成厚度可以是0.7μm~10μm，例如3μm。一旦已完成所需的各層的形成，然後可經由一適當的微影遮罩及蝕刻製程來移除不需要的材料以移除各層的一部分，從而留下所需形狀的凸塊下金屬113，例如凸塊下金屬113圓形、八邊形、正方形或矩形，但亦可形成為任何需要的形狀來取代上述形狀。
第一止裂器115可形成於凸塊下金屬113上並與其發生物理性接觸。第一止裂器115的位置與形狀可呈現自凸塊下金屬113延伸並最終延伸至一導體材料207(未繪示在第1A圖，但繪示在後文討論的第2A圖)的樣式。此外， 第一止裂器115的位置與形狀可呈現以下樣式：攔截並阻擋可能起源於導體材料207的邊緣的任何裂縫，並阻止裂縫進一步向導體材料207的內部伸展。
第1B圖是顯示第一止裂器115之如上所述的位置與形狀，其中第1B圖是第一止裂器115、凸塊下金屬113、與第二鈍化層111(其中第二鈍化層111下方的第一接觸墊109是以虛線顯示)的俯視圖。在本實施例中，可將第一止裂器115置於凸塊下金屬113的外緣附近，其形狀可以是環形，例如為一第一空心柱體117，第一空心柱體117的外緣是在凸塊下金屬113的整個外周的附近延伸。在本實施例中，第一止裂器115的第一空心柱體117的外徑可比凸塊下金屬113的邊緣外徑小約35μm。而且第一止裂器115的第一空心柱體117的壁厚可小於25μm。
藉由將第一止裂器115形成為以第一空心柱體117圍繞凸塊下金屬113的外緣，可能沿著導體材料207(未繪示在第1A圖，但繪示在後文討論的第2A圖)產生的任何裂縫會向內延伸並垂直地碰到第一止裂器115。如此垂直的互動有益於阻擋裂縫進一步朝導體材料207內延伸。在此樣式中，第一止裂器115可阻止任何裂縫，使其不致使導體材料207的功能劣化。
然而，本案申請人並無將第一止裂器115限制為前述第一空心柱體117的形狀之意圖。第1C-1E圖顯示其他實施例，可用來取代前述的第一止裂器115的形狀。例如在繪示於第1C圖的實施例中，第一止裂器115是包含一第二空心柱體119，用來使其與第一空心柱體117一起阻擋可 能發生的裂縫的增生。第一空心柱體117可以是類似於前文對第1B圖敘述的第一空心柱體117，並沿著凸塊下金屬113的外周的附近(例如相距小於30μm)延伸。第二空心柱體119可放置在第一空心柱體117的橫向內側，其外徑可比凸塊下金屬113的邊緣外徑小約65μm，且其壁厚可小於30μm。第二空心柱體119可以以大於10μm的一第二距離d2的程度，而與第一空心柱體117分離，並被第一空心柱體117圍繞。
藉由除第一空心柱體117外還提供第二空心柱體119，第二空心柱體119可作為第一空心柱體117的備援構件。如此一來，如果第一空心柱體117未能阻擋已形成的一裂縫的傳播，第二空心柱體119可阻止裂縫金一步傳播而穿透導體材料207。在本樣式中，藉由形成第一止裂器115使其具有第二空心柱體119，第一止裂器115可提供更強力的保護，裂縫傳播而穿透導體材料207之情況得到阻止，並有益於防止裝置失效。
第1D圖是顯示另一實施例，其中第一止裂器115是不同於前文對第1C圖所作敘述中具有完全地完整無缺的空心柱體的情況，具有沿著第一空心柱體117與第二空心柱體119的壁而間隔的複數個開口121。例如，(此處第1D圖所示實施例或前述第1B圖所示實施例的)第一空心柱體117可具有三個開口121(但不限於三個)，其以圍繞第一空心柱體117的等距間隔隔開。同樣地，第二空心柱體119可具有三個開口121(但不限於三個)，其以圍繞第二空心柱體119的等距間隔隔開，但與第一空心柱體117中的開 口121錯開。例如，第一空心柱體117中的開口121在第二空心柱體119的垂直投影的位置，分別是在第二空心柱體119的任一開口121以外的位置。在一實施例中，開口121可具有一距離d3，其為5μm-50μm，例如為25μm。
藉由提供圍著第一空心柱體117與第二空心柱體119的開口121，開口121可對第一空心柱體117與第二空心柱體119提供某種程度的應力釋放(stress relief)。例如在熱循環的過程中，當第一空心柱體117與第二空心柱體119的材料在膨脹中，開口121可使第一空心柱體117與第二空心柱體119的膨脹不會分別推擠另一部分的第一空心柱體117或第二空心柱體119。如此一來，可減少在熱機械循環過程中的膨脹不匹配所造成的應力導致的損壞。
在第1E圖顯示的實施例中，第一止裂器115是不連續的環形，由一系列的弧形物123構成。弧形物123的形狀可以是圓形的片段，但可被放置為部分重疊的樣式，例如為每個弧形物123的兩端分別重疊於相鄰的弧形物123的對應端的樣式，以攔截源自導體材料207(未繪示在第1E圖，但繪示在後文討論的第2A圖)的外緣的任何裂縫。在本實施例中，可具有四個弧形物123，其厚度為5μm-30μm，例如為約15μm。
藉由將第一止裂器115形成為不連續的環形，可達成類似於前文對第1D圖所作敘述中的應力釋放。然而，藉由其具有彼此部分重疊的弧形物123，無任何可供裂縫前進而穿透的開口121。如此一來，可達成對裂縫作更有效率的制動，可減少或消除裂縫造成的損壞。
然而，對於本發明所屬技術領域中具有通常知識者而言，可理解前述的弧形是僅僅為了舉例顯示，並無用來限制實施例範圍的意圖。維持基本的環形但非完美圓形的形狀，亦完全包含於環形中。例如第一止裂器115的形狀可以是八邊形、五邊形、六邊形等，其仍然維持整體所需的環形。這些以及其他任何合適的環形均完全包含於本案實施例的範圍。
回到第1A圖，可使用一遮罩與鍍膜製程，將第一止裂器115形成為如同前文對第1B-1E圖所述形狀。在一實施例中，第一止裂器115的形成可藉由一開始在第二鈍化層111上方形成一光阻，以達成所需的第一止裂器115的厚度。可對上述光阻施以圖形化，以曝露部分的凸塊下金屬113，被曝露的凸塊下金屬113是在第一止裂器115的延伸範圍所在的位置。
在完成上述光阻的圖形化之後，可將第一止裂器115形成在上述光阻的開口中。可由一導體材料例如銅來形成第一止裂器115，但亦可使用其他導體材料例如鎳、金或金屬合金等等，或是亦可使用上述材料的組合而構成數個分離的層。此外，第一止裂器115的形成可使用一製程例如電鍍，藉此電流會通過第一止裂器115的所需形成位置所在的凸塊下金屬113的導體部分，並將凸塊下金屬113浸漬於一溶液中。此溶液與電流將例如銅沉積在上述開口中而充滿及/或溢出上述光阻的開口，藉此形成第一止裂器115。然後，可使用例如一化學機械研磨(chemical mechanical polish；CMP)或溼蝕刻製程，將上述開口外側 的多餘的導體材料移除。
在完成第一止裂器115的形成之後，可經由一製程例如溶解於化學溶液中、電漿灰化或其他手段，移除上述光阻，其中將上述光阻的溫度升高到使上述光阻分解並可被移除為止。在移除上述光阻之後，第一止裂器115可延伸至距離凸塊下金屬113有一第一距離d1，第一距離d1為5μm-60μm，例如為40μm，但亦可使用其他合適的距離，以有利於阻止裂縫的延伸。這樣的距離有益於減少或避免裂縫繞過第一止裂器115，亦避免在後續的重流製程中的第一止裂器115的損耗。
可視需求決定是否在第一止裂器115的上方形成一阻障層(未繪示)，以有助於保護第一止裂器115。在一實施例中，上述阻障層可由鎳、鎳/金、鈷、鈷/金、釩(V)/金、鉻(Cr)/金、與上述之組合所形成，並可使用一製程例如電鍍來形成。然而，亦可使用任何適當的方法與材料取代上述方法與材料來形成上述阻障層。
然而，對於本發明所屬技術領域中具有通常知識者而言，可理解前述形成第一止裂器115的製程是僅僅為了舉例顯示，並無將實施例範圍限制在此製程的意圖。當然，前述的製程僅僅為了舉例顯示，亦可使用適用於形成第一止裂器115的任何適當的製程來取代前述製程。例如，可使用一裁減蝕刻製程來形成第一止裂器115。在一實施例中，可以以例如鎳來形成第一止裂器115，其中一鎳的初始層(未繪示於第1A圖)是形成於第二鈍化層111與凸塊下金屬113的上方。一旦完成上述鎳的初始層的形成，可使 用例如微影遮罩及蝕刻製程來圖形化此鎳層，以從此鎳層移除或裁減不需要的材料，以在凸塊下金屬113上形成並圖形化第一止裂器115。
第2A圖顯示將具有第一止裂器115的半導體積體電路晶片100放置並接合於一支持基板201。在一實施例中，可以以一晶圓級晶片尺寸封裝架構，將半導體積體電路晶片100接合於支持基板201。然而，本實施例並無限制在晶圓級晶片尺寸封裝架構的意圖，且可使用其他的連接樣式。
支持基板201可具有形成於其上的一第二接觸墊205與一銲阻(solder mask)203。支持基板201可用來支持並保護半導體基材基板101，同時用來提供半導體積體電路晶片100上的第一接觸墊109與外部裝置(未繪示於第2A圖)之間的連接。在一實施例中，支持基板201可以是一印刷電路板，例如雙馬來亞醯胺-三氮雜苯樹脂(bismaleimidetriazine；BT)、FR-4、ABF等的聚合材料的多重薄層的堆疊(或層積)而形成的一層積基板。然而，其可為任何其他適當的基板例如一矽中介層(silicon interposer)、一矽基板、一有機基板、一陶瓷基板等所取代，而且對半導體積體電路晶片100提供支持與連接的所有此類的重佈基板均完全包含於本實施例的範圍。
可以以類似於第一接觸墊109的樣式與材料來形成第二接觸墊205。例如，可使用例如濺鍍、電鍍或非電化學鍍(electroless plating)等的製程，以銅、鎳或鎳/金等來形成第二接觸墊205。然而上述製程亦可由任何適用於第二接 觸墊205的形成的製程來取代。
銲阻203可形成來幫助導體材料207的形成。可以以一阻銲材料、一光阻、一介電材料、或一鈍化材料來形成銲阻203。在一實施例中，銲阻203是一光阻材料，可藉由將上述光阻材料置於支持基板201上並使銲阻203曝露於輻射例如紫外光中，而形成銲阻203。然後，可對銲阻203施以顯影，以使其覆蓋支持基板201並曝露第二接觸墊205。在一替代性的實施例中，銲阻203是一介電材料(例如氧化矽或氮化矽)或一鈍化材料(例如聚醯亞胺)，可將銲阻203形成在支持基板201的上方，並可使用一微影遮罩及蝕刻製程來曝露第二接觸墊205的一部分。
一旦完成銲阻203的形成與圖形化，可形成導體材料207，其穿過銲阻203並與第二接觸墊205發生接觸。在一實施例中，導體材料207可以是一軟銲凸塊，並可包含一材料例如錫膏、錫、或是其他適當的材料例如銀或銅。在一實施例中，導體材料207為錫，可經由常用的方法例如蒸鍍、電鍍、錫膏模板印刷、印刷等，藉由一開始形成一錫層，將導體材料207形成至10μm-100μm例如為約50μm的厚度。
一旦完成將導體材料207形成在第二接觸墊205上，可執行一重流製程，將導體材料207變成一凸塊形狀。在上述重流製程中，將導體材料207的溫度提高到200℃-260℃例如約250℃，持續10秒至60秒例如約35秒。此重流製程使導體材料207部分液化，藉由導體材料207的表面張力將其本身拉伸成所需的凸塊形狀。導體材 料207的直徑可為210μm-280μm，例如約250μm。
為了將半導體積體電路晶片100接合於支持基板201，將凸塊下金屬113與導體材料207對準，然後再執行一第二重流製程以使導體材料207部分液化，藉此導體材料207會流動而與凸塊下金屬113接觸。在重流的過程中，導體材料207也會將第一止裂器115囊封，在導體材料207硬化成固態後，將第一止裂器115嵌入導體材料207中。
然而，對於本發明所屬技術領域中具有通常知識者而言，可理解前述將半導體積體電路晶片100接合於支持基板201的樣態是僅僅為了舉例顯示，並無將實施例範圍限制在此樣態的意圖。可使用任何適用於將半導體積體電路晶片100接合於支持基板201的方法，例如將導體材料207形成於凸塊下金屬113上及第一止裂器115的上方而不是形成於第二接觸墊205上，來取代前述的方法。前述及所有將半導體積體電路晶片100接合於支持基板201的方法，均完全地包含於本實施例的範圍內。
在將第一止裂器115置於導體材料207中的情況下，任何可能沿著導體材料207的外緣形成且試圖向導體材料207的內部傳播的任何裂縫(在第2A圖中，以直線200作代表)卻會被第一止裂器115攔截而使其傳播受阻。藉由阻止裂縫傳播，可減少或消除裂縫200造成的缺陷，而成為更具彈性、可靠度更佳的內連線。
第2B圖是顯示第一止裂器115的一個次要的優點。在裂縫200可躲過或通過第一止裂器115的情況中，以強度大於導體材料207的材料製作的第一止裂器115本身受損 的可能性很低。如此一來，可通過第一止裂器115本身來維持凸塊下金屬113與導體材料207的未受損部分之間的電性導通。因此，即使導體材料207變成裂開的情況，第一止裂器115仍能跨越裂縫200而提供半導體積體電路晶片100與支持基板201之間的電性導通。
第3圖是顯示另一實施例，其中可將一第二止裂器301形成於第二接觸墊205上。藉由將第二止裂器301置於第二接觸墊205上，第二止裂器301可與第一止裂器115(置於凸塊下金屬113上)合作來阻擋可能形成於導體材料207內的裂縫200的傳播。在一實施例中，第二止裂器301可在第二接觸墊205上形成、放置以及成形，來阻止可能發展到鄰接第二接觸墊205的邊緣的導體材料207的裂縫200的傳播。在一實施例中，如第3A圖所示，可使用一裁減蝕刻製程來形成第二止裂器301，但亦可使用任何其他合適的製程(例如前文對第一止裂器115的敘述中的製程)，來取代上述製程來形成第二止裂器301。
第3圖是沿著第3A圖的線3B-3B'顯示的俯視圖，顯示可將第二止裂器301形成為類似於第一止裂器115，例如從上俯視時可呈現一第三空心柱體303的形狀。在一實施例中，第三空心柱體303的形狀及用以形成的製程與材料，可類似於前文對第1A-1B圖所作敘述的第一空心柱體117。然而，與第一止裂器115類似，第二止裂器301可以是任何適當的形狀例如雙空心柱體、雙實心柱體、實心柱體、在外牆中具有開口的空心柱體、不連續的環形、或上述之組合等，來取代前述形狀。任何合適的形狀可用來取 代前述形狀，來與第一止裂器115一起有助於減少或阻止可能形成於鄰接第二接觸墊205之處的裂縫的傳播，而且任何適合的形狀均完全地包含於本實施例的範圍。
第4A-4C圖是顯示又另一實施例，其中不是將第一止裂器115形成為相互嵌合的一或數個空心柱體(如前述第1A-3B圖所示)之形狀，而是形成為彼此分離的一或數個空心或實心柱體、或是混合實心與空心柱體之形狀。例如第4A與4B圖是顯示一實施例，其中第4B圖是顯示沿著第4A圖的線4B-4B'的平面圖，在此實施例中，數個空心柱體(如第4B圖所示，例如為一第四空心柱體401、一第五空心柱體403、與一第六空心柱體405)是在凸塊下金屬113上彼此分離、隔開。在本實施例中，第四空心柱體401、第五空心柱體403、與第六空心柱體405可各具有15μm-60μm、例如約30μm的一外徑以及5μm-20μm、例如約10μm的一內徑。此外，上述個別的空心柱體可沿著凸塊下金屬113的外圍成彼此等距分離的情況。
可使用類似於前文對第1A圖所作敘述之第一止裂器115的形成的類似製程，來形成第四空心柱體401、第五空心柱體403、與第六空心柱體405。例如可使用例如一遮罩與電鍍製程、一銲線連接製程、或一裁減蝕刻製程來形成第四空心柱體401、第五空心柱體403、與第六空心柱體405。任何合適的製程都可用來形成第四空心柱體401、第五空心柱體403、與第六空心柱體405。
然而，對於本發明所屬技術領域中具有通常知識者而言，可理解前述將第四空心柱體401、第五空心柱體403、 與第六空心柱體405圍繞凸塊下金屬113成彼此等距分離之情況是一個合適的實施例，此實施例並未受限於前述的特定數量與佈局。當然，第一止裂器115可使用合適數量的柱體來製造。此外，可將這些柱體排列在凸塊下金屬113的外緣附近，成任意的樣式。所有這樣的數量與排列方式是完全地包含於本實施例的範圍內。
第4C圖是顯示另一實施例，其是以一第一實心柱體407、一第二實心柱體409、與一第三實心柱體411來取代前述第4B圖所示的第四空心柱體401、第五空心柱體403、與第六空心柱體405。藉由形成實心柱體而不是空心柱體，可藉由使用各自對阻擋裂縫的傳播有較強的內部支持的第一實心柱體407、第二實心柱體409、與第三實心柱體411，來強化第一止裂器115之阻止裂縫的傳播的能力。可將第一實心柱體407、第二實心柱體409、與第三實心柱體411放置為類似於如前文對第4B圖的敘述中的第四空心柱體401、第五空心柱體403、與第六空心柱體405的樣式，或是亦可放置為另一圖形來取代上述樣式。
此外，亦可使用任何合適的空心與實心柱體的組合。例如，可將第四空心柱體401及第五空心柱體403與第三實心柱體411一起使用，以提供裂縫傳播的阻力。可以使用實心與空心柱體的此一組合與任何其他組合，而且所有這樣的組合均完全包含於本實施例的範圍內。
第5A-5B圖是顯示又另一實施例，其是使用彼此相互分離的多個空心柱體，其中第5B圖是顯示沿著第5A圖的線5A-5A'的平面圖。在本實施例中，第四空心柱體401、 第五空心柱體403、與第六空心柱體405，是與一第七空心柱體501、一第八空心柱體503、一第九空心柱體505、一第十空心柱體507、與一第十一空心柱體509，且這些空心柱體是沿著凸塊下金屬113的外緣排列。此外，可將一第十二空心柱體511置於凸塊下金屬113的一中間區域內。藉由將第十二空心柱體511置於凸塊下金屬113的一中間區域內，放置在凸塊下金屬113的外緣附近的空心柱體可用來攔截可能沿著上述外緣形成的任何裂縫，而置於凸塊下金屬113的上述中心區域內的第十二空心柱體511可用來攔截的裂縫是在空心柱體之間傳播的任何裂縫，其中上述空心柱體是被放置為圍繞凸塊下金屬113的外緣。如此一來，外圍的空心柱體與第十二空心柱體511的組合，可用來在裂縫以任何方式穿越導體材料207之前，減少或阻止裂縫的傳播。
可使用類似於前文對第4A-4B圖所作敘述之第四空心柱體401、第五空心柱體403、與第六空心柱體405的形成的類似製程，來形成第七空心柱體501、第八空心柱體503、第九空心柱體505、第十空心柱體507、與第十一空心柱體509。例如可使用例如一遮罩與電鍍製程、一銲線連接製程、或一裁減蝕刻製程來形成第七空心柱體501、第八空心柱體503、第九空心柱體505、第十空心柱體507、與第十一空心柱體509。任何合適的製程都可用來形成第七空心柱體501、第八空心柱體503、第九空心柱體505、第十空心柱體507、與第十一空心柱體509。
第5C圖是顯示一類似的實施例，其中第一實心柱體 407、第二實心柱體409、與第三實心柱體411是與一第四實心柱體513、一第五實心柱體515、一第六實心柱體517、一第七實心柱體519、與一第八實心柱體521一起使用，並沿著凸塊下金屬113的外圍區域排列成環。此外，可將一第九實心柱體523置於凸塊下金屬113的中心區域內，以攔截可能穿透位在凸塊下金屬113的中心區域的實心柱體的環狀物之任何裂縫的傳播。
第6A與6B圖是繪示一替代性的製程，其可用來形成第4C圖中的第一實心柱體407、第二實心柱體409、與第三實心柱體411，或是可用來形成第5C圖中的第一實心柱體407、第二實心柱體409、第三實心柱體411、第四實心柱體513、第五實心柱體515、第六實心柱體517、第七實心柱體519、第八實心柱體521、與第九實心柱體523。在本實施例中，一銲線601是包含例如銅、金、鋁、或上述之組合等材料，其可接合於凸塊下金屬113，或者若不需要凸塊下金屬113，則可將銲線601直接接合於第一接觸墊109。可使用例如一銲線製程，將銲線601接合於凸塊下金屬113或第一接觸墊109，呈現所需的形狀(例如一實心柱體)。一旦已完成將銲線601接合於凸塊下金屬113而呈現一球形或楔形，可使用一放電結球(electronic flame off；EFO)步驟或一剪刀或其他型態的裁切機構，將與凸塊下金屬113直交的銲線長度截斷成一所需的長度例如100μm-300μm，例如約200μm。此時，已完成接合的銲線601可具有：一第一部分，與凸塊下金屬113接合；以及一第二部分，連接於上述第一部分上，上述第一部分的寬 度大於上述第一部分的寬度。
在一實施例中，可在銲線601鍍上一保護層603(未個別顯示於第6A-6B圖)。保護層603可以是具保護性的材料例如鈀、鎳、金、或上述之組合等等，且可由製造商在將銲線601接合於凸塊下金屬113之前，置於銲線601上；或是可替換成在銲線601已完成接合並裁切成所需寬度後，置於銲線601上。在一實施例中，可經由一電鍍製程或一非電化學鍍製程等來形成保護層603，但亦可使用其他合適的製程來保護銲線601。
本發明的一實施例是提供一種半導體裝置，其包含一導體墊與一第一止裂器。上述導體墊是位於一基板上。上述第一止裂器是延伸自上述導體墊，上述第一止裂器為環形並沿著上述導體墊的一外圍區域設置。
本發明的另一實施例是提供一種半導體裝置，其包含位於一基底上的一凸塊下金屬與一第一止裂器。上述凸塊下金屬包含一中心區域與圍繞上述中心區域的一外圍區域。上述第一止裂器是位於上述外圍區域中的上述凸塊下金屬上，上述第一止裂器具有一第一圓形。
本發明的又另一實施例是提供一種半導體裝置，其包含一導體區與一第一止裂器。上述導體區是位於一第一半導體基板上。上述第一止裂器是位於上述導體區上，上述第一止裂器具有一銲線，上述銲線以銲線接合的方式與上述第一半導體基板上的上述導體區接合。
雖然已經詳細敘述各實施例及其優點，但應瞭解的是在未悖離後附申請專利範圍相關的各實施例的精神及範圍 之下，可在此作各種的變化、替換及修改。例如，形成各止裂器的材料與方法可加以修改，只要維持不超過實施例的範圍。此外，可調整各止裂器的確切形狀，以有助於防止或減少裂縫的傳播。
雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明，任何本發明所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
100‧‧‧半導體積體電路晶片
101‧‧‧半導體基材基板
103‧‧‧主動元件
105‧‧‧金屬化層
107‧‧‧第一鈍化層
109‧‧‧第一接觸墊
111‧‧‧第二鈍化層
113‧‧‧凸塊下金屬
115‧‧‧第一止裂器
117‧‧‧第一空心柱體
119‧‧‧第二空心柱體
121‧‧‧開口
123‧‧‧弧形物
200‧‧‧裂縫(直線)
201‧‧‧支持基板
203‧‧‧銲阻
205‧‧‧第二接觸墊
207‧‧‧導體材料
301‧‧‧第二止裂器
303‧‧‧第三空心柱體
401‧‧‧第四空心柱體
403‧‧‧第五空心柱體
405‧‧‧第六空心柱體
407‧‧‧第一實心柱體
409‧‧‧第二實心柱體
411‧‧‧第三實心柱體
501‧‧‧第七空心柱體
503‧‧‧第八空心柱體
505‧‧‧第九空心柱體
507‧‧‧第十空心柱體
509‧‧‧第十一空心柱體
511‧‧‧第十二空心柱體
513‧‧‧第四實心柱體
515‧‧‧第五實心柱體
517‧‧‧第六實心柱體
519‧‧‧第七實心柱體
521‧‧‧第八實心柱體
523‧‧‧第九實心柱體
601‧‧‧銲線
603‧‧‧保護層
第1A-1E圖是顯示一實施例之位於一半導體晶片上的一止裂器。
第2A-2B圖是顯示一實施例之軟銲接合物，其將一半導體晶片連線至一支持基板。
第3A-3B圖是顯示另一實施例，其中一止裂器亦形成於支持基板上。
第4A-4C圖是顯示另一實施例，其中止裂器是呈現多個柱體的形狀。
第5A-5C圖是顯示又另一實施例，其中止裂器是數個柱體，其沿著半導體晶片與基板的其中之一或二者上的接觸墊的外圍與內圍排列。
第6A-6B圖是顯示又另一實施例，其中止裂器是一或數條銲線，其連接於半導體晶片。
100‧‧‧半導體積體電路晶片
101‧‧‧半導體基材基板
103‧‧‧主動元件
105‧‧‧金屬化層
107‧‧‧第一鈍化層
109‧‧‧第一接觸墊
111‧‧‧第二鈍化層
113‧‧‧凸塊下金屬
115‧‧‧第一止裂器
117‧‧‧第一空心柱體

Claims (10)

  1. 一種半導體裝置，包含：一導體墊，位於一基板上；以及一第一止裂器(crack stopper)，延伸自該導體墊，該第一止裂器包含成為環形的一第一空心柱體與成為環形的一第二空心柱體；其中該第一空心柱體沿著該導體墊的一外圍區域設置；以及該第二空心柱體置於該第一空心柱體的橫向內側，而使該第一空心柱體圍繞該第二空心柱體。
  2. 如申請專利範圍第1項所述之半導體裝置，其中該第一空心柱體在其環形中具有一第一開口，該第二空心柱體在其環形中具有一第二開口。
  3. 如申請專利範圍第1項所述之半導體裝置，其中該第一開口在該第二空心柱體的垂直投影的位置，是在該第二開口以外的位置。
  4. 如申請專利範圍第1至3項任一項所述之半導體裝置，其中該導體墊包含：一接觸墊；以及一凸塊下金屬，在該導體墊上；其中該第一止裂器是延伸自該凸塊下金屬。
  5. 一種半導體裝置，包含：一導體墊，位於一基板上；以及一第一止裂器，延伸自該導體墊，該第一止裂器為不連續的環形並沿著該導體墊的一外圍區域設置，該不連續 的環形包含複數個弧形物，每個該些弧形物的兩端分別重疊於相鄰的弧形物的對應端，成為複數個部分重疊的弧形物。
  6. 如申請專利範圍第5項所述之半導體裝置，其中該導體墊包含：一接觸墊；以及一凸塊下金屬，在該導體墊上；其中該第一止裂器是延伸自該凸塊下金屬。
  7. 一種半導體裝置，包含：位於一基底上的一凸塊下金屬，該凸塊下金屬包含一中心區域與圍繞該中心區域的一外圍區域；一第一止裂器，位於該外圍區域中的該凸塊下金屬上，該第一止裂器具有一第一圓形；具有一第二圓形的一第二止裂器與具有一第三圓形的一第三止裂器，該第一止裂器、該第二止裂器、與該第三止裂器是在該外圍區域中彼此橫向分離，該第一圓形、該第二圓形、與該第三圓形為實心的圓形；以及具有一第四圓形的一第四止裂器，該第四止裂器是設置在該凸塊下金屬的該中心區域中。
  8. 如申請專利範圍第7項所述之半導體裝置，更包含：一支持基板，其具有面向該凸塊下金屬的一導體層；一第五止裂器，位於該導體層上；以及一導體材料，其接觸該第一止裂器、該第二止裂器、該第三止裂器、該第四止裂器與該第五止裂器的全部。
  9. 一種半導體裝置，包含： 一導體區，位於一第一半導體基板上；一第一止裂器位於該導體區上，該第一止裂器具有一銲線，該銲線以銲線接合的方式與該第一半導體基板上的該導體區接合；以及一導體材料，其與該導體區接觸並將該第一止裂器囊封。
  10. 如申請專利範圍第9項所述之半導體裝置，其中該銲線具有：一第一部分，與該第一半導體基板上的該導體區接合；以及一第二部分，連接於該第二部分上，該第一部分的寬度大於該第二部分的寬度。
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US10340226B2 (en) 2019-07-02
US20190326228A1 (en) 2019-10-24
US9230932B2 (en) 2016-01-05
US20130207239A1 (en) 2013-08-15
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US11257767B2 (en) 2022-02-22
CN103247587B (zh) 2018-06-15

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