TWI440209B - 發光裝置之電流分佈 - Google Patents
發光裝置之電流分佈 Download PDFInfo
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- TWI440209B TWI440209B TW096133152A TW96133152A TWI440209B TW I440209 B TWI440209 B TW I440209B TW 096133152 A TW096133152 A TW 096133152A TW 96133152 A TW96133152 A TW 96133152A TW I440209 B TWI440209 B TW I440209B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
Description
參考較早在2005年9月29日所提出之新加坡專利申請案第20506301-1號,在此以提及方式併入該新加坡專利申請案之內容。
本發明係有關於發光裝置之電流分佈及特別是有關於然而不侷限於一種用以分佈電流以便最大化光輸出之裝置。
在大部分發光裝置(例如:發光二極體及雷射二極體)中,接合墊佔發光表面之約15%的表面面積。接合墊之所在位置無法發光。
並且,當電流從接合墊流至主動區域且沿著最小電阻之路徑(在均勻材料中,通常為最短路徑)時,在接合墊下面,具有最大流量,因而具有最大光輸出。此導致光輸出之明顯減少。
依據第一較佳態樣,提供一種發光裝置,該發光裝置包括:複數個磊晶層,包括一主動層;一反射層及一歐姆接點中之至少一者,位於該等磊晶層之第一側上;以及一導電金屬層,位於該等磊晶層之第二側上且具有一發光表面。一端子位於該發光表面上。該端子具有一用以擴散電流及最小化其對光輸出之影響的陣列。
該陣列可以包括一接合墊、一外部及一用以連接該接合墊與該外部之連結部;該外部及該連結部係用於電流耗散。該外部可以在或鄰近該發光表面之周圍。該連結部可以包括複數個用以連結該接合墊與該外部之輻條(spokes)。
在該陣列與該發光表面間可以具有一第二反射層。在另一情況中,該第二反射層可以在該發光表面中之一溝槽的底部。
依據第二較佳態樣,提供一種發光裝置之製造方法。該發光裝置具有複數個包括一主動層之磊晶層、一在該等磊晶層之第一側上的反射層及一在該等磊晶層之第二側上的導電金屬。該方法包括:形成一端子於該導電金屬之一發光表面上,該端子具有一用以擴散電流及最小化其對光輸出之影響的陣列。
可以藉由形成一接合墊、一外部及一電性連接該接合墊與該外部之連結部來形成該陣列;該外部及該連結部係用於電流耗散。該外部可以在或鄰近該發光表面。該連結部可以包括複數個用以連結該接合墊與該外部之輻條。
該方法進一步包括:在該發光表面上形成一第二反射層後,在該第二反射層上形成該陣列。
在另一情況中,該方法可以進一步包括形成一溝槽於該發光表面中,形成一第二反射層於該溝槽之底部,該陣列係形成於該第二反射層上。
為了可以完全了解及輕易實施本發明,現在只藉由非限定用範例來描述本發明之較佳具體例,該描述將參考所附說明圖式。
首先,參考圖1,顯示一發光裝置101(例如:一發光二極體或一雷射二極體),該發光裝置101在複數個包括一主動區域102之磊晶層的第一側上具有一反射層及/或歐姆接點103。一導電金屬層104係在該等磊晶層之第二側上。該反射層103可以在該等磊晶層上及該歐姆接點係在該反射層上,反之亦然。可能只有該反射層及該歐姆接點中之一。一接合墊105係設置在一光輸出表面107上。電流依照圖1之虛線所示的路徑在該金屬層104中流動至該主動區域102。如所見,最大電流集中在該接合墊105下方。此表示該主動區域102所發出之最大光量(如實線所示)亦將集中在該接合墊105下方。此光將被該接合墊105反射回該金屬層104中。此顯著地減少光輸出。
圖2至4顯示一較佳具體例,其中相似組件使用相似元件符號,但將前面數字「1」改為「2」。在此,該接合墊105換成一端子層215。
該端子層215包括一由導電材料(最好是相同於該接合墊205之材料)製成之陣列214,以及該端子層215電性連接至該接合墊205及該光輸出表面207。該陣列214係分佈在該表面207上方,以便電流將以擴散或分佈方式從該端子層215流至該主動區域202。
該陣列214最好具有該接合墊205做為其中心,以便該陣列214之分佈在該表面207上方係相對均勻的。並且,相較於該接合墊205,最好減少該陣列214之高度。
如所示,該陣列214包括一在或鄰近該表面207之周圍的外部206。此係針對在或鄰近該主動區域202之周圍的光發射所提供的。一連結部208電性且實體連接該外部206及該接合墊205,亦即,在此情況中,4個等間隔徑向「輻條(spokes)」從該接合墊205延伸至該外部206。所有輻條208最好是相同的,以及更佳是具有相同於該外部206之高度及寬度。雖然以十字形形狀顯示4個輻條208,但是可以是任何適合數目之輻條(例如:1、2、3、4、5、6等)。
在該等輻條208與該外部206間係用於自光輸出表面207之光發射的發光開口209。
該外部206及/或每一輻條208或陣列214可以位於一在該光輸出表面207中所形成之溝槽211中。該溝槽211在其底部213上可以具有一反射層212,以便在該陣列214下方之主動區域202所傳送之光將更有效率地被該反射層212反射。該反射層212可以具有一擴散表面,以便從一不同於垂直角之角度來反射光。該反射層212係導電的,以使電流能從該陣列214傳送至該主動區域202。該反射層212在該表面207上最好具有相同於該陣列214之形狀及尺寸。
如圖6所示,可以不使用該溝槽211,以及可以將該反射層212直接塗覆至在該陣列214下面之光輸出表面207。圖7至圖13顯示該製程。這些圖是第6頁提及之相關申請案的圖11至圖17,且係在移除原始藍寶石基板4後之製程步驟。
如圖8所示,在移除該藍寶石基板4之後,藉由沿著凸丘之邊緣從新暴露出之表面13蝕刻之溝槽,使裝置彼此隔離,其中如圖8至圖10所示,在該蝕刻製程期間使用一光阻層6(d)來保護n-型GaN層3之區域。
在另一情況中,可以在與光阻12對齊之位置上分裂該n-型層3之最下表面13,因而將晶粒分離。此對雷射二極體而言係有利的,因為該n-型層3之暴露側表面係大致平行的,因而造成大量之總內部反射。此做為一用於光輸出之改善及引導的光放大系統。
墊蝕刻係發生在塗覆一第五光阻層6(e)於SiO2
層8之暴露表面、該n-型GaN層3之側邊及該n-型GaN層3之中間上方之後[圖9(a)及圖9(b)],因而形成該n-型GaN層3之凸部14及凹部15。
然後,移除該光阻6(e)及在該n-型GaN層3之暴露表面及該SiO2
層8之外周圍上方塗覆另一光阻6(f),因而留下一用於晶粒隔離之間隙16。經由該間隙16蝕刻該SiO2
層8及種子層11(圖10),直到暴露該等厚光阻12之末端為止。移除該光阻6(f)。
在從該SiO2
層8之邊緣至該n-型GaN層3之中心附近的所有暴露下表面上方塗覆一最後光阻層6(g),其中保留一中心間隙17(圖11)。
接著,在該光阻6(g)上方塗覆一陣列214之n-型金屬層18,其中在該n-型GaN層3之中心處的間隙17上之層18被直接塗覆至該GaN層3(圖12)。移除附著有該層18之光阻層6(g),以留下附著至該n-型GaN層3之中心的層18(間隙17先前所處之位置)。
在此方式中,該等種子層11、10及9以及該銅層9(a)做為反射層,以增加光輸出,其中該銅層9(a)做為一端子,因而不妨礙光輸出。第二端子係在該n-型GaN層3上之陣列214中的層18且這是一在該層3之中心上及/或在該層3之中心附近的陣列,因而最小化其對光輸出之影響並增加電流之擴散。
雖然在上述說明中已描述本發明之較佳具體例,但是熟習該項技藝者將了解到在不脫離本發明情況下可以實施設計或構造之許多細節變更或修改。
3...n-型GaN層
4...藍寶石基板
6(d)...光阻層
6(e)...第五光阻層
6(f)...光阻
6(g)...光阻層
8...SiO2
層
9...種子層
9(a)...銅層
10...種子層
11...種子層
12...光阻
13...最近暴露表面
14...凸部
15...凹部
16...間隙
17...中心間隙
101...發光裝置
102...主動區域
103...反射層
104...導電金屬層
105...接合墊
107...光輸出表面
201...發光裝置
202...主動區域
203...反射層
204...導電金屬層
205...接合墊
206...外部
207...光輸出表面
208...連結部
209...發光開口
211...溝槽
212...反射層
213...底部
214...陣列
215...端子層
圖1係一發光裝置之示意側視圖;圖2係一發光裝置之一較佳具體例的示意側視圖;圖3係圖2之裝置的上平面圖;圖4係沿著圖3上之箭頭4-4的線及方向的垂直剖面圖;圖5係圖4之溝槽的放大圖;圖6係圖5之配置的替代;圖7係在製造圖2至圖4之裝置的第一階段之對應於圖4的圖式;圖8係在製造圖2至圖4之裝置的第二階段之對應於圖4的圖式;圖9(a)和圖9(b)係在製造圖2至圖4之裝置的第三階段之對應於圖4的圖式;圖10(a)和圖10(b)係在製造圖2至圖4之裝置的第四階段之對應於圖4的圖式;圖11(a)和圖11(b)係在製造圖2至圖4之裝置的第五階段之對應於圖4的圖式;圖12係在製造圖2至圖4之裝置的第六階段之對應於圖4的圖式;以及圖13(a)和圖13(b)係在製造圖2至圖4之裝置的第七階段之對應於圖4的圖式。
201...發光裝置
202...主動區域
203...反射層
204...導電金屬層
205...接合墊
215...端子層
Claims (8)
- 一種發光裝置,包括:(a)複數個磊晶層,包括一主動層;(b)位於該等磊晶層之第一側上之一反射層;(c)一導電金屬層,位於該等磊晶層之第二側上且具有一發光表面;(d)一端子,包括一位在該發光表面上之陣列,該陣列係用以擴散電流及最小化其對光輸出之影響;以及(e)一具有與該陣列相同形狀及尺寸之第二反射層,該第二反射層係在該發光表面上之該陣列下方或該發光表面中之一溝槽的底部,該第二反射層係用以反射該陣列下方之該主動層所傳送之光且係導電的以使電流從該陣列傳送到該主動層,該第二反射層包括一擴散表面而以一非垂直於該反射層之角度反射該主動層所傳送之光。
- 如申請專利範圍第1項之發光裝置,其中,該陣列包括一接合墊、一外部及一用以連接該接合墊與該外部之連結部;該外部及該連結部係用於電流耗散。
- 如申請專利範圍第2項之發光裝置,其中,該外部係在或鄰近該發光表面之周圍。
- 如申請專利範圍第2項之發光裝置,其中,該連結部包括複數個用以連結該接合墊與該外部之輻條。
- 一種發光裝置之製造方法,該發光裝置包括複數個包含有一主動層之磊晶層、一在該等磊晶層之第一側上的反射層及一在該等磊晶層之第二側上的導電金屬,該導電金 屬具有一發光表面;該方法包括:在一第二反射層上形成一陣列之前在該發光表面上,或在該發光表面之一溝槽的底部,形成該第二反射層;形成一包括位在該第二反射層上之該陣列的端子,該陣列係用以擴散電流及最小化其對光輸出之影響;該第二反射層係具有與該陣列相同形狀及尺寸,該第二反射層亦用以反射該陣列下方之該主動層所傳送之光且係導電的以使電流從該陣列傳送到該主動層,以及該第二反射層包括一擴散表面而以一非垂直於該反射層之角度反射該主動層所傳送之光。
- 如申請專利範圍第5項之方法,其中,藉由形成一接合墊、一外部及一電性連接該接合墊與該外部之連結部來形成該陣列;該外部及該連結部係用於電流耗散。
- 如申請專利範圍第6項之方法,其中,該外部係在或鄰近該發光表面之周圍。
- 如申請專利範圍第6項之方法,其中,該連結部包括複數個用以連結該接合墊與該外部之輻條。
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SG200606050-3A SG140512A1 (en) | 2006-09-04 | 2006-09-04 | Electrical current distribution in light emitting devices |
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CN101335320B (zh) | 2003-09-19 | 2012-06-06 | 霆激科技股份有限公司 | 用于制作发光器件的方法 |
JP2007535804A (ja) | 2004-03-15 | 2007-12-06 | ティンギ テクノロジーズ プライベート リミテッド | 半導体デバイスの製造 |
CN1998094B (zh) * | 2004-04-07 | 2012-12-26 | 霆激技术有限公司 | 半导体发光二极管上的反射层的制造 |
SG130975A1 (en) | 2005-09-29 | 2007-04-26 | Tinggi Tech Private Ltd | Fabrication of semiconductor devices for light emission |
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TW200822402A (en) | 2008-05-16 |
JP2010503229A (ja) | 2010-01-28 |
US8124994B2 (en) | 2012-02-28 |
CN101584052A (zh) | 2009-11-18 |
SG140512A1 (en) | 2008-03-28 |
KR20090057409A (ko) | 2009-06-05 |
US20100117107A1 (en) | 2010-05-13 |
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