TWI374482B - - Google Patents

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Publication number
TWI374482B
TWI374482B TW096125778A TW96125778A TWI374482B TW I374482 B TWI374482 B TW I374482B TW 096125778 A TW096125778 A TW 096125778A TW 96125778 A TW96125778 A TW 96125778A TW I374482 B TWI374482 B TW I374482B
Authority
TW
Taiwan
Prior art keywords
layer
film
semiconductor device
manufacturing
insulating film
Prior art date
Application number
TW096125778A
Other languages
English (en)
Chinese (zh)
Other versions
TW200814156A (en
Inventor
Atsuko Sakata
Jun-Ichi Wada
Original Assignee
Toshiba Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Kk filed Critical Toshiba Kk
Publication of TW200814156A publication Critical patent/TW200814156A/zh
Application granted granted Critical
Publication of TWI374482B publication Critical patent/TWI374482B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/42—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/42—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a gas or vapour
    • H10P14/44—Physical vapour deposition [PVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/033—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics
    • H10W20/035—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers in openings in dielectrics combinations of barrier, adhesion or liner layers, e.g. multi-layered barrier layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
    • H10W20/054—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers by selectively removing parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/47—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts comprising two or more dielectric layers having different properties, e.g. different dielectric constants

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Physical Vapour Deposition (AREA)
  • Chemical Vapour Deposition (AREA)
TW096125778A 2006-07-21 2007-07-16 Method for manufacturing semiconductor device and semiconductor device TW200814156A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006200094 2006-07-21

Publications (2)

Publication Number Publication Date
TW200814156A TW200814156A (en) 2008-03-16
TWI374482B true TWI374482B (https=) 2012-10-11

Family

ID=38985357

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096125778A TW200814156A (en) 2006-07-21 2007-07-16 Method for manufacturing semiconductor device and semiconductor device

Country Status (4)

Country Link
US (2) US9129970B2 (https=)
JP (1) JP2010199601A (https=)
KR (1) KR101001456B1 (https=)
TW (1) TW200814156A (https=)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010153487A (ja) * 2008-12-24 2010-07-08 Panasonic Corp 半導体装置及びその製造方法
JP5582727B2 (ja) 2009-01-19 2014-09-03 株式会社東芝 半導体装置の製造方法及び半導体装置
JP5025679B2 (ja) * 2009-03-27 2012-09-12 株式会社東芝 半導体装置
JP5304536B2 (ja) * 2009-08-24 2013-10-02 ソニー株式会社 半導体装置
US8661664B2 (en) 2010-07-19 2014-03-04 International Business Machines Corporation Techniques for forming narrow copper filled vias having improved conductivity
JP2012204587A (ja) * 2011-03-25 2012-10-22 Hitachi Kyowa Engineering Co Ltd 半導体装置、半導体装置用基板および該基板の製造方法
JP5823359B2 (ja) 2012-08-23 2015-11-25 株式会社東芝 半導体装置の製造方法
CN103160783B (zh) * 2013-03-26 2014-10-08 沈阳金锋特种刀具有限公司 一种TiCuN纳米复合涂层及其制备方法
US10002834B2 (en) * 2015-03-11 2018-06-19 Applied Materials, Inc. Method and apparatus for protecting metal interconnect from halogen based precursors
US9704804B1 (en) * 2015-12-18 2017-07-11 Texas Instruments Incorporated Oxidation resistant barrier metal process for semiconductor devices
JP7321730B2 (ja) * 2019-03-14 2023-08-07 キオクシア株式会社 半導体装置の製造方法
JP2021136269A (ja) 2020-02-25 2021-09-13 キオクシア株式会社 半導体装置

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4681818A (en) * 1986-03-18 1987-07-21 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Oxygen diffusion barrier coating
US5135801A (en) * 1988-06-13 1992-08-04 Sandvik Ab Diffusion barrier coating material
US6090701A (en) * 1994-06-21 2000-07-18 Kabushiki Kaisha Toshiba Method for production of semiconductor device
JPH10125782A (ja) * 1996-10-15 1998-05-15 Sony Corp 半導体装置の製造方法
JP3033564B2 (ja) * 1997-10-02 2000-04-17 セイコーエプソン株式会社 半導体装置の製造方法
JP3890722B2 (ja) * 1998-02-16 2007-03-07 ソニー株式会社 半導体装置の銅配線
JP2000124307A (ja) * 1998-10-19 2000-04-28 Sony Corp 金属系膜の形成方法および電子装置の製造方法
JP3974284B2 (ja) 1999-03-18 2007-09-12 株式会社東芝 半導体装置の製造方法
US6436850B1 (en) * 1999-09-01 2002-08-20 Guarionex Morales Method of degassing low k dielectric for metal deposition
US6436819B1 (en) * 2000-02-01 2002-08-20 Applied Materials, Inc. Nitrogen treatment of a metal nitride/metal stack
JP2001338925A (ja) * 2000-05-26 2001-12-07 Hitachi Ltd 半導体集積回路装置の製造方法
US6486059B2 (en) * 2001-04-19 2002-11-26 Silicon Intergrated Systems Corp. Dual damascene process using an oxide liner for a dielectric barrier layer
JP3648480B2 (ja) 2001-12-26 2005-05-18 株式会社東芝 半導体装置およびその製造方法
KR20030089756A (ko) * 2002-05-18 2003-11-28 주식회사 하이닉스반도체 삼원계 확산배리어막의 형성 방법 및 그를 이용한구리배선의 형성 방법
JP4344506B2 (ja) 2002-05-20 2009-10-14 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
JP2004071956A (ja) * 2002-08-08 2004-03-04 Toshiba Corp 半導体装置の製造方法
US7262133B2 (en) 2003-01-07 2007-08-28 Applied Materials, Inc. Enhancement of copper line reliability using thin ALD tan film to cap the copper line
JP2005244178A (ja) 2004-01-26 2005-09-08 Toshiba Corp 半導体装置の製造方法
JP2004289174A (ja) * 2004-05-21 2004-10-14 Toshiba Corp 半導体装置及びその製造方法
JP2006005190A (ja) 2004-06-18 2006-01-05 Renesas Technology Corp 半導体装置
US7351656B2 (en) * 2005-01-21 2008-04-01 Kabushiki Kaihsa Toshiba Semiconductor device having oxidized metal film and manufacture method of the same
KR100782202B1 (ko) * 2005-02-25 2007-12-05 가부시끼가이샤 도시바 반도체 장치 및 그 제조 방법
KR200389756Y1 (ko) 2005-04-27 2005-07-14 김정호 카메라폰의 삼각대 탑재장치
US20060251872A1 (en) * 2005-05-05 2006-11-09 Wang Jenn Y Conductive barrier layer, especially an alloy of ruthenium and tantalum and sputter deposition thereof

Also Published As

Publication number Publication date
US9343402B2 (en) 2016-05-17
KR20080009006A (ko) 2008-01-24
US20150333006A1 (en) 2015-11-19
KR101001456B1 (ko) 2010-12-14
JP2010199601A (ja) 2010-09-09
TW200814156A (en) 2008-03-16
US9129970B2 (en) 2015-09-08
US20080023838A1 (en) 2008-01-31

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