JP5577274B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP5577274B2 JP5577274B2 JP2011030260A JP2011030260A JP5577274B2 JP 5577274 B2 JP5577274 B2 JP 5577274B2 JP 2011030260 A JP2011030260 A JP 2011030260A JP 2011030260 A JP2011030260 A JP 2011030260A JP 5577274 B2 JP5577274 B2 JP 5577274B2
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- 239000004065 semiconductor Substances 0.000 title claims description 44
- 238000004519 manufacturing process Methods 0.000 title claims description 39
- 239000011148 porous material Substances 0.000 claims description 68
- 238000000034 method Methods 0.000 claims description 42
- 239000010949 copper Substances 0.000 claims description 32
- 230000008569 process Effects 0.000 claims description 25
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 24
- 229910052802 copper Inorganic materials 0.000 claims description 24
- 239000000126 substance Substances 0.000 claims description 18
- 239000002184 metal Substances 0.000 claims description 11
- 229910052751 metal Inorganic materials 0.000 claims description 11
- 238000001723 curing Methods 0.000 claims description 7
- 238000006116 polymerization reaction Methods 0.000 claims description 7
- 238000004381 surface treatment Methods 0.000 claims description 5
- 125000000391 vinyl group Chemical group [H]C([*])=C([H])[H] 0.000 claims description 5
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims description 4
- 229910018557 Si O Inorganic materials 0.000 claims description 4
- 238000005229 chemical vapour deposition Methods 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 4
- 239000001257 hydrogen Substances 0.000 claims description 4
- 229910052739 hydrogen Inorganic materials 0.000 claims description 4
- 230000000379 polymerizing effect Effects 0.000 claims description 4
- 238000007789 sealing Methods 0.000 claims description 4
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Inorganic materials [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 claims description 4
- 238000000231 atomic layer deposition Methods 0.000 claims description 3
- 239000000956 alloy Substances 0.000 claims description 2
- 229910045601 alloy Inorganic materials 0.000 claims description 2
- 238000010438 heat treatment Methods 0.000 claims description 2
- 239000001307 helium Substances 0.000 claims description 2
- 229910052734 helium Inorganic materials 0.000 claims description 2
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 2
- 238000001227 electron beam curing Methods 0.000 claims 1
- 238000001029 thermal curing Methods 0.000 claims 1
- 239000007789 gas Substances 0.000 description 18
- 239000010408 film Substances 0.000 description 15
- 239000000463 material Substances 0.000 description 15
- 230000004888 barrier function Effects 0.000 description 10
- 238000005530 etching Methods 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- 230000008439 repair process Effects 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 238000013007 heat curing Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000032683 aging Effects 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Description
2 絶縁層
3 バリアメタル層
4 銅
5 キャップ絶縁層
6 密着層
7 ポーラス絶縁層(ポーラスlow−k層)
8 バリアメタル層
9 銅配線
10 ポアシール絶縁層
11 CuMnシード
12 MnSiO層
Claims (12)
- 請求項1に記載の半導体装置の製造方法であって、
前記化学物質の導入は、前記化学物質の修飾塩基の部分を活性化させるに十分な低エネルギープラズマ、または熱の下で行われる
半導体装置の製造方法。 - 請求項1または2に記載の半導体装置の製造方法であって、
前記化学物質の分子サイズは、前記ポーラス絶縁層の空孔サイズよりも小さい
半導体装置の製造方法。 - 請求項1乃至3のいずれか一項に記載の半導体装置の製造方法であって、
前記化学物質の重合において、熱硬化処理、紫外線硬化処理、プラズマ硬化処理、あるいは電子線硬化処理が実施される
半導体装置の製造方法。 - 請求項1乃至4のいずれか一項に記載の半導体装置の製造方法であって、
前記トレンチを形成する工程において、更に、前記ポーラス絶縁層が露出した配線スペース部が銅配線間に形成され、
前記化学物質の重合を行うことにより、前記配線スペース部の表面上にも前記ポアシール絶縁層が形成される
半導体装置の製造方法。 - 請求項1乃至5のいずれか一項に記載の半導体装置の製造方法であって、
前記ポアシール絶縁層は、ビアホールの底において露出する銅の上には形成されない
半導体装置の製造方法。 - 請求項1乃至6のいずれか一項に記載の半導体装置の製造方法であって、
前記トレンチが形成された後、表面処理を行い、前記ポーラス絶縁層の表面上に活性−Si−O結合を形成し、且つ、ビアホールの底において露出する銅の表面を非活性化する工程
を更に含む
半導体装置の製造方法。 - 請求項7に記載の半導体装置の製造方法であって、
前記表面処理は、水素プラズマ、あるいはヘリウムプラズマを含む水素により行われる
半導体装置の製造方法。 - 請求項1乃至8のいずれか一項に記載の半導体装置の製造方法であって、
化学気相成長法あるいは原子層堆積法によって、前記ポアシール絶縁層上に金属層を形成する工程と、
前記金属層上に銅層を形成する工程と
を更に含む
半導体装置の製造方法。 - 請求項1乃至8のいずれか一項に記載の半導体装置の製造方法であって、
前記ポアシール絶縁層上にCuMn合金を堆積する工程と、
熱処理を行うことにより、前記ポアシール絶縁層上にMnSiO層を自己整合的に形成する工程と
を更に含む
半導体装置の製造方法。 - 請求項11に記載の半導体装置であって、
前記ポアシール絶縁層が、前記銅配線間の配線スペース部の表面上に設けられた
半導体装置。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US30545410P | 2010-02-17 | 2010-02-17 | |
US61/305,454 | 2010-02-17 |
Publications (2)
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JP2011171736A JP2011171736A (ja) | 2011-09-01 |
JP5577274B2 true JP5577274B2 (ja) | 2014-08-20 |
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JP2011030260A Active JP5577274B2 (ja) | 2010-02-17 | 2011-02-15 | 半導体装置及びその製造方法 |
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US (1) | US8377823B2 (ja) |
JP (1) | JP5577274B2 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
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TW201403711A (zh) * | 2012-07-02 | 2014-01-16 | Applied Materials Inc | 利用氣相化學暴露之低k介電質損傷修復 |
US9947576B2 (en) | 2015-07-13 | 2018-04-17 | Applied Materials, Inc. | UV-assisted material injection into porous films |
US10818576B2 (en) | 2019-01-09 | 2020-10-27 | Toyota Motor Engineering & Manufacturing North America, Inc. | Methods of forming power electronic assemblies using metal inverse opals and cap structures |
Family Cites Families (15)
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US6191636B1 (en) * | 1999-09-22 | 2001-02-20 | Cypress Semiconductor Corp. | Input buffer/level shifter |
US7541200B1 (en) | 2002-01-24 | 2009-06-02 | Novellus Systems, Inc. | Treatment of low k films with a silylating agent for damage repair |
WO2004107434A1 (ja) | 2003-05-29 | 2004-12-09 | Nec Corporation | 配線構造およびその製造方法 |
US6919636B1 (en) | 2003-07-31 | 2005-07-19 | Advanced Micro Devices, Inc. | Interconnects with a dielectric sealant layer |
US7179758B2 (en) | 2003-09-03 | 2007-02-20 | International Business Machines Corporation | Recovery of hydrophobicity of low-k and ultra low-k organosilicate films used as inter metal dielectrics |
WO2005053009A1 (ja) * | 2003-11-28 | 2005-06-09 | Nec Corporation | 多孔質絶縁膜及びその製造方法並びに多孔質絶縁膜を用いた半導体装置 |
JP4478038B2 (ja) * | 2004-02-27 | 2010-06-09 | 株式会社半導体理工学研究センター | 半導体装置及びその製造方法 |
US7015150B2 (en) | 2004-05-26 | 2006-03-21 | International Business Machines Corporation | Exposed pore sealing post patterning |
EP1759407A2 (en) * | 2004-06-03 | 2007-03-07 | Epion Corporation | Improved dual damascene integration structures and method of forming improved dual damascene integration structures |
JP4355939B2 (ja) * | 2004-07-23 | 2009-11-04 | Jsr株式会社 | 半導体装置の絶縁膜形成用組成物およびシリカ系膜の形成方法 |
KR100985613B1 (ko) * | 2004-10-27 | 2010-10-05 | 인터내셔널 비지네스 머신즈 코포레이션 | 금속간 유전체로서 사용된 낮은 k 및 극도로 낮은 k의 오가노실리케이트 필름의 소수성을 복원하는 방법 및 이로부터 제조된 물품 |
US7501354B2 (en) * | 2005-01-18 | 2009-03-10 | Applied Materials, Inc. | Formation of low K material utilizing process having readily cleaned by-products |
JP2006339479A (ja) * | 2005-06-03 | 2006-12-14 | Matsushita Electric Ind Co Ltd | 多層配線の製造方法および多層配線 |
JP2007281114A (ja) * | 2006-04-05 | 2007-10-25 | Sony Corp | 半導体装置の製造方法および半導体装置 |
WO2008029956A1 (en) * | 2006-09-08 | 2008-03-13 | National Institute Of Advanced Industrial Science And Technology | Semiconductor integrated circuit device, and wire forming method |
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2011
- 2011-02-09 US US12/929,699 patent/US8377823B2/en active Active
- 2011-02-15 JP JP2011030260A patent/JP5577274B2/ja active Active
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US8377823B2 (en) | 2013-02-19 |
US20110198754A1 (en) | 2011-08-18 |
JP2011171736A (ja) | 2011-09-01 |
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