TWI264083B - Method for forming capacitor of semiconductor device - Google Patents

Method for forming capacitor of semiconductor device

Info

Publication number
TWI264083B
TWI264083B TW093118515A TW93118515A TWI264083B TW I264083 B TWI264083 B TW I264083B TW 093118515 A TW093118515 A TW 093118515A TW 93118515 A TW93118515 A TW 93118515A TW I264083 B TWI264083 B TW I264083B
Authority
TW
Taiwan
Prior art keywords
layer
oxide layer
forming
contact holes
polysilicon layer
Prior art date
Application number
TW093118515A
Other languages
English (en)
Other versions
TW200531203A (en
Inventor
Gyu-Hyun Kim
Hyo-Geun Yoon
Geun-Min Choi
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of TW200531203A publication Critical patent/TW200531203A/zh
Application granted granted Critical
Publication of TWI264083B publication Critical patent/TWI264083B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • H01L28/82Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/84Electrodes with an enlarged surface, e.g. formed by texturisation being a rough surface, e.g. using hemispherical grains
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • H01L28/75Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03Making the capacitor or connections thereto
    • H10B12/033Making the capacitor or connections thereto the capacitor extending over the transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
TW093118515A 2004-03-10 2004-06-25 Method for forming capacitor of semiconductor device TWI264083B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020040016196A KR100541682B1 (ko) 2004-03-10 2004-03-10 반도체 소자의 캐패시터 형성방법

Publications (2)

Publication Number Publication Date
TW200531203A TW200531203A (en) 2005-09-16
TWI264083B true TWI264083B (en) 2006-10-11

Family

ID=34918752

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093118515A TWI264083B (en) 2004-03-10 2004-06-25 Method for forming capacitor of semiconductor device

Country Status (4)

Country Link
US (1) US7112506B2 (zh)
KR (1) KR100541682B1 (zh)
CN (1) CN100336170C (zh)
TW (1) TWI264083B (zh)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7705464B2 (en) * 2004-09-13 2010-04-27 Taiwan Semiconductor Manufacturing Company, Ltd. Connection structure for semiconductor devices
JP4470170B2 (ja) * 2004-11-30 2010-06-02 エルピーダメモリ株式会社 半導体装置及びその製造方法
KR100668833B1 (ko) * 2004-12-17 2007-01-16 주식회사 하이닉스반도체 반도체소자의 캐패시터 제조방법
US7713885B2 (en) * 2005-05-11 2010-05-11 Micron Technology, Inc. Methods of etching oxide, reducing roughness, and forming capacitor constructions
KR100702128B1 (ko) * 2005-06-30 2007-03-30 주식회사 하이닉스반도체 반도체 소자의 캐패시터 형성방법
US7825034B2 (en) * 2005-10-06 2010-11-02 United Microelectronics Corp. Method of fabricating openings and contact holes
US8236702B2 (en) 2005-10-06 2012-08-07 United Microelectronics Corp. Method of fabricating openings and contact holes
US8164141B2 (en) 2005-10-06 2012-04-24 United Microelectronics Corp. Opening structure with sidewall of an opening covered with a dielectric thin film
KR20080099463A (ko) * 2007-05-09 2008-11-13 주식회사 하이닉스반도체 반도체 소자, 비휘발성 메모리 소자 및 그 제조방법
CN101689549A (zh) * 2007-06-25 2010-03-31 株式会社Lg化学 用于制造半导体电容器的方法
KR101096230B1 (ko) * 2008-12-29 2011-12-22 주식회사 하이닉스반도체 반도체 장치의 캐패시터 제조 방법
CN101996860B (zh) * 2009-08-11 2012-08-08 中芯国际集成电路制造(上海)有限公司 电容器制作方法
KR101185989B1 (ko) 2010-07-07 2012-09-25 에스케이하이닉스 주식회사 반도체소자의 스토리지노드 형성방법
CN103151244B (zh) * 2011-12-07 2017-04-26 华邦电子股份有限公司 堆叠式电容器及其制造方法
US9831303B2 (en) * 2012-11-02 2017-11-28 Nanya Technology Corporation Capacitor structure and process for fabricating the same
US10981780B2 (en) * 2019-08-19 2021-04-20 Infineon Technologies Ag Membrane support for dual backplate transducers

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5256587A (en) * 1991-03-20 1993-10-26 Goldstar Electron Co., Ltd. Methods of patterning and manufacturing semiconductor devices
US6015735A (en) * 1998-01-13 2000-01-18 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming a multi-anchor DRAM capacitor and capacitor formed
JP3630551B2 (ja) * 1998-04-02 2005-03-16 株式会社東芝 半導体記憶装置及びその製造方法
CN1127137C (zh) * 1998-05-27 2003-11-05 世界先进积体电路股份有限公司 高密度动态随机存取存储器的电容器结构的制造方法
US5877052A (en) * 1998-06-11 1999-03-02 Vanguard International Semiconductor Corporation Resolution of hemispherical grained silicon peeling and row-disturb problems for dynamic random access memory, stacked capacitor structures
US6350646B1 (en) * 2000-01-18 2002-02-26 United Microelectronics Corp. Method for reducing thermal budget in node contact application
US6548348B1 (en) * 2001-06-18 2003-04-15 Taiwan Semiconductor Manufacturing Company Method of forming a storage node contact hole in a porous insulator layer
US6548853B1 (en) * 2002-02-13 2003-04-15 Samsung Electronics Co., Ltd. Cylindrical capacitors having a stepped sidewall and methods for fabricating the same
JP4387096B2 (ja) * 2002-11-26 2009-12-16 Okiセミコンダクタ株式会社 半導体集積回路の製造方法
KR100548553B1 (ko) * 2002-12-26 2006-02-02 주식회사 하이닉스반도체 캐패시터 형성 방법
KR100506816B1 (ko) * 2003-01-06 2005-08-09 삼성전자주식회사 반도체 장치 커패시터의 하부 전극 및 이를 형성하기 위한방법
KR100553839B1 (ko) * 2003-11-27 2006-02-24 삼성전자주식회사 캐패시터와 그 제조 방법, 이를 포함하는 반도체 장치 및그 제조 방법

Also Published As

Publication number Publication date
US7112506B2 (en) 2006-09-26
KR20050091120A (ko) 2005-09-15
KR100541682B1 (ko) 2006-01-10
CN100336170C (zh) 2007-09-05
US20050202645A1 (en) 2005-09-15
CN1667796A (zh) 2005-09-14
TW200531203A (en) 2005-09-16

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MM4A Annulment or lapse of patent due to non-payment of fees