TW530488B - Active pixel sensor with bootstrap amplification and reduced leakage during readout - Google Patents
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Description
530488 五、發明說明(2) 大,同一電荷量下的電壓則減小。第三個因素是用於主動 ,素感測器之讀出放大器的增益。先前技藝中的讀出放大 器典型為電晶體,做為源極隨耦器配置,所以其增益小於 一一 〇 主動像素感測器中的雜訊來源之一,係產生自讀出電晶 體:的=限漲落(thresh〇id fluctuati〇ns)。閥限漲落量 與項出電晶體尺寸有關。隨讀出電晶體尺寸增大,閥限涨 落量減小,從而雜訊量也減小。 、在壓縮的非線性增益中,高光階(light level)下的增 盈小於低光階下的增益。對技藝有普通熟練程度者將了 f,一般宜在較低而非較高光階下有較大的光子轉化至電 壓之敏感度;原因在於,低光階下訊號對雜訊之比增大, 因而主動像素感測器的可用動態範圍也增大。 CMOS主動像素感測器技藝所涵蓋的主動像素感測器,玎 具或不具嵌式儲存器(embedded st〇rage)。圖丨及3分別例 示具或不具嵌式儲存器的典sCM0S主動像素感測器。 在圖1之主動像素感測器丨〇中,有一用以收集電荷的光 一極體12,其具有耦合一固定電壓電位之陽極,示為接 地,及陰極,其耦合一 M〇s (金屬氧化物半導體)N通道 (N-channel)重設電晶體14源極及—M〇s 1^通道源極隨耦器 電晶體16閘極。m〇S N通道重設電晶體14閘極耦合一重設 線;MOS N通道重設電晶體14汲極耦合一參考電壓,
Vref。MOS N通道源極隨耦器電晶體16汲極耦合一固定電 位,Vcc , MOS N通道源極隨耦器電晶體16源極耦合一M〇s
530488 五、發明說明(6) 訊增大,是因儲存電容器34之存在減小MOS N通道源極隨 耗器電晶體1 6的可用空間,可用空間必然因而更小。 接合(junction)漏流是許多像素感測器雜訊性能的支配 因素。隨像素感測器尺寸縮小,電場成為接合漏流之重要 因素。同在受理中的申請案09/099 ,166序號(1998年6月17 曰提出;現為美國專利χ· χχχ· χχχ號;已被讓與,和本發 明有同一受讓人),對一陣列中全部的主動像素感測器做 全局計時(globally clocking),使其僅在讀出期間才有 咼儲存節點(storage nodes),電場藉此已可降低。儘管
此做法的確有某些優點,儲存器像素感測器之操作仍有改 良空間。 因此,本發明有一目的:提高主動像素感測器的敏感 度。 本發明尚有一目的:減小主動像素感測器中漏流所相關 的雜訊。 本發明還有另一目的:隨相對光強度(relative light intensity)之增大,壓縮主動像素感測器中的增益。 發明之簡單說明 =據^發明,可提供具有增大填充因子及一較大源極隨 輕1J,晶體之像素感測器,藉此則主動像素感測器的敏感丨· 度^ f而雜訊減小。將接合漏流上的電場分量最小化,以 =设計模式來操作像素感測器,也可藉而減小雜訊。隨主 、 择,素感=器中的相對光強度增大,該主動像素感測器的 . 曰盈則壓縮。在依據本發明之主動像素感測器陣列的操作
第11頁 W0488
圖1為繁—. 圖2為個已知主動像素感測器的簡圖。 圖圖1所描述之主動像素感測器操作的計時圖。 圖4為:間化的第二個已知主動像素感測器的簡圖。 圖5為佑ϊί3所描述之主動像素感測器操作的計時圖。 體實例為二據圖本發明之主動像素感測器之-簡化的第二具 圖6之:動:::部份方塊圖,該陣列包含複數列圖5抑或 <王勳像素感測器。 時^為呈現圖5抑或圖6之主動像素感測器陣列㈣的計 明Γ像為;Λ路的簡,,該電路可用以控制依據本發 之像素感測|§陣列中之列選擇線的上升時間。 『10為-簡®,對依據本發明之第一範例中的整合 出期間’例示一源極隨輕哭雷曰科 、 閑極(back-gate)的電电曰曰體問極”及極、源極及背 圖11為—帛目,對依據本發明之第二範例中的整人 出期間’例示一源極隨叙器電晶體閘極、沒極、源極 閘極(back-gate)的電壓。 圖12為一簡圖,對依據本發明之第三範例中的整人及讀 出期間,例示一源極隨耦器電晶體閘極、汲極、源二及背 閘極(back-gate)的電壓。 530488 五、發明說明(9) 在相對光強度 圖12為一例示圖形,例示:依據本發明 增大時’主動像素感測器增益之壓縮。 較佳具體實例之詳細說明 對技藝有普通熟練程度者將了解,以 僅為例示,絕非設限。此等熟練人士可立即 明之其他具體實例。 仃扣出本系
現在參考圖5,其以簡圖描繪耦合一列選擇線及一行輸 出線而依據本發明之一主動像素感測器5〇的第—具體實 例。、圖5中所描繪的主動像素感測器5〇類似於圖i ^主^像 素土測器10,因而,兩圖示圖中相對應的元件使用相同的 參考編號。如此,主動像素感測器50包含光二極體12,該 光一極體12串聯耦合一 M〇s Ν通道重設電晶體14,介於一 固定接地電位與Vref電壓之間,如此而使得光二極體'12被 反偏壓。圖5之主動像素感測器5 〇異於圖}之主動像素感測 器10的要點在於,其中M0S ν通道源極隨耦器電晶體16汲 才f係連接一可開關之供應電壓Vd,而非一固定的汲極供應 電壓(圖1中的Vcc)。進而,電壓Vref可較先前技藝中所遭 遇到的來得低。 現在參考圖6 ’其以簡圖描繪耦合一列選擇線及一行輸 出線而依據本發明之一主動像素感測器6 〇的第二具體實 例。圖6之具體實例所異於圖5之具體實例的,僅在於,其 中M〇S N通道傳送電晶體32係耦合於光二極體12陰極與MOS 道源極隨耦器電晶體1 6閘極之間;除此之外,兩者非 系相似。MOS N通道傳送電晶體32閘極則耦合_XFr訊號
第14頁 530488 五、發明說明⑽ 線。 乂—陣列環境通常若有像素感測器5 〇及6 0,則其性能因本 發明之像素感測器5 〇及6 0而獲改良。對於本發明之此點, 參考圖7及圖8或許最易可見;圖7為一陣列的部份方塊 圖’該陣列包含複數列圖5之主動像素感測器;圖8為例示 一像素感測器5 0陣列操作的計時圖。
圖7中所呈現的陣列部份,為2 X 2部份,僅供例示之 用。對熟知此技藝者將認知,用於本發明之實際具體實例 的陣列可為任意尺寸。陣列部份可用圖5之主動像素感測 器50,否則亦可用圖6之主動像素感測器60。陣列部份之 第一列包含主動像素感測器5 0/ 60- 1及5 0/60-2。陣列部份 之第二列包含主動像素感測器5 0/6 0-3及50/6 0 -4。陣列部 份之第一行包含主動像素感測器5 0 /6 0 —i及5〇/6〇 —3。陣列 部份之第二列包含主動像素感測器5〇/6〇_2及5〇/6〇_4。
如圖7所見’一共用的Vref線62被用於陣列中全部的主 動像素感測器。還有一共用的重設線64被用於陣列中全部 的主動像素感測器。還有一共用的XFr線66被用於陣列中 全部的主動像素感測器。第一條列選擇線2〇 —丨驅動陣列之 第一列中全部的主動像素感測器。第二條列選擇線2〇 — 2驅 動陣列之第一列中全部的主動像素感測器。陣列之第一行 中全部的主動像素感測器的輸出被驅動到第一條行輸出線 2 2-1上。陣列之第二行中全部的主動像素感測器的輸出被 驅動到第二條行輸出線22-2上。第一條Vd線68-1驅動陣列 之第一列中全部的主動像素感測器。獨立的第二條W線
第15頁 530488 五、發明說明(12) 線上一次將有一個列選擇訊號被判定,打開該列中全部的 MOS N通道列選擇電晶體,將每—_ N通道源極隨麵器電 晶體源極上的電壓放到行輸出線22 —丨及22_2上,供感測之 用、。查圖7將觀察到:當每—列將要被讀,該列所用的vd 衝到高位準,接下來是該列所用的列選擇線被 晰^夕^ ’列選擇線去除判^ ’接下來則SVd線上的Vd 藝有普通熟練程度的人士將了解,在讀出 (由Λ,,, N通道源極隨搞器電晶體閑極上的電壓 (由累積在相關光二極體陰極上的電荷 上的電壓所跟進。 王风彡θ破其源才ί 係明ί某一方面,控制列選擇訊號之上升時間, 由陣列所4 &沾做法控制流入行線的電流量,且避免正當 9,1為一5貝Λ 中有人為的線條產生。現在參考圖 及列選㈣現範解瑪器電路,該電路提供Vd 可用來!制Ϊ:p!列之一列;並包含—電路範例,該電路 上升時^發明之像素感測器陣列中之列選擇線的 解Γ器之線 係d用三個控制訊號來驅動。第-個訊號乃列 號,為來自列解e:je::nes)72上之-列解碼器輸出訊 的讀出列。第:::路的輸出,在陣列中用以選擇個別 為一賦自Γ在SFD賦能線(enable iin仙上, 器輸出二二起==gate)76中之線72上的列解瑪 . I成為及悲(ANDed),在輪中结卜;^丄1。 斤給的訊㈣一其中之—輸= 530488 五、發明說明(13)
賦能線80上,與反及閘(NAND gate) 82中之線72上的列 解碼器輸出訊號一起成為及態。反及閘8 2的輸出被用來驅 動一電流匱乏反向器(current-starved inverter)84。電 流匱乏反向器84由MOS P通道電晶體86及MOS N通道電晶體 88所形成。反向器84之電流匱乏,係由一MOS P通道偏壓 電晶體90對MOS P通道電晶體86提供源極電壓所致;該M0S P通道偏壓電晶體90之閘極耦合一偏壓電壓源極Vpbi as。 電流tt乏反向器84的輸出產生圖8計時圖所給的訊號列選 擇-1或列選擇-2其中之一。當m〇S P通道電晶體86被打 開’反向器將遞送一等於I p b i a s之恒定電流。當此恒定電 流對列選擇線92之電容充電,將提供一線性斜波(ramp)電 壓輸出。 « 陣列中每一列上的及閘76的Vd輸出必對總電容充電;該 總電容等於個別行線電容之和。就極端情形來說,若列中 王σ卩像素感測器曝於南光階下,每一行將須充電至一低電 壓’但若列中全部像素感測器曝於低光階下,每一行將須 充電至一較高電壓。在低光階曝光之情形下,被抽至vd線 上的總電流有高電流值。在一實際的積體電路陣列中,載 送Vd電壓的金屬線電阻典型可為1000歐姆(〇hm㈧,而及 2 7 6的輪出阻抗甚或更高。因此所致,vd電壓有潛在的可 能會在源極隨耦器沒極上衰退,輸出訊號位準錯誤也會發 生,尤其,不難見到陣列含2,〇 〇 〇條須被驅動的行線。依 據本發明之此一方面,控制將讀出電晶體(與行 開的訊號的上升時間,可對總電流加以限制。、口
第18頁 53〇488
限值,後者是必要的。所導致之轉換(conversi〇n)為 N通道源極隨耦器電晶體丨6閘極之儲存節點上所捕獲 的電荷訊號之近線性函數。 :了解,當行輪出線及M0S N通道源極隨耦器電晶體16 2職士子,M0S N通道讀出電晶體18將靠近閥限值。計 -政應(body effect) κ,則該等源極上 關係表示: 私全田乂卜 VS=K(VG.V^)
=此,兩未之變數,M〇S N通道源極隨耦器電晶體16源極 及閘極電壓,為線性關係。 一MOS N通道源極隨耦器電晶體16閘極上的電荷守恆之表 不式如下,也提供進一步的約束: (AV^ - ^V〇)Ccs ^ (AV0 - ^Vc)CGD = 2此表示式中,假定線性電容,當M0S N通道源極隨耦器 冤晶體1 6汲極被帶到高位準,以致閘極至源極的電容凌駕 =極至汲極的電容,此時M0S N通道源極隨’ 閑極電容主要是與源極耗合。雜散儲存節點電容以:代 ,。雖然此電容是有關的,其在主動像素感測糊並不 定義一閘極電壓VG0(在將VD帶到高位準之前),另定義 =開極電壓VG,使得VG = VG〇+AVG ;並假設仰及”初 二、1^=謂且心=請。_^通道源極隨輕 口口电日日體16的鞋帶式閘極電壓可表示為. 530488 五、發明說明(18) V — V〇° {^ _ t7 νσ ^ CgoHI-^Cgs^Cs vTh 結果,行輸出電壓可以源極電壓來表示如下: t / ^ ^ / VGO ( ^CD *** )^Δν/>Λ^£>-kVj^Ccs t 7 、 νς C^^d-^Cc^C, vn) 此暗示:在讀出期間,從MOS N通道源極隨耦器電晶體i 6 極上的儲存訊號至行輸出,其增益由以下關係表示· 閑 dvs 一 +CG5+C5) AW ^ ΤΓ^ο 其中之近似關係對小的CGD及CS成立。 被捕獲電荷至行輸出線上最終電壓之線性轉拖古_ 、, ^狀为兩個古 盈結果。首先,其意指Μ 0 S Ν通道源極隨輕器電晶體1 6 極上的大電容值對總增益之效果是有益而非有害9的.、二閘 因為,MOS Ν通道傳送電晶體32那一面上較大的電容是 較大的光電子捕獲分數,而光電子捕獲係對立於包光〜;思指 1 2耗費性的自我充電。總增益典型地將甚至超過=極體 1 2的增益,而無任何額外的負載。因此,為減小雜一極體 增大MOS Ν通道源極隨耦器電晶體1 6,將不致減’、訊而減 益。 α小多少增 其次,被捕獲電荷至輸出電壓之線性轉換可導 、, 壓縮的非線性,如下。隨光電荷累積,M0S Ν通 ^盃的 耦器電晶體16閘極電壓將下降,直到某點其低 ^極隨 壓;在此點,閘極電容將由高位準變到 =#限電 電荷主要僅累積在光二極體12電容上,所:丄。=
第23頁 53〇488 五 、發明說明(21) ^之圖形面積B有-第二斜率,而該面積 =小於該面積A中斜率的絕對值。此種隨光強度增羊大的: 毛生的圖形斜率之改變對應增益之壓縮。 茂::在地ΐ化I ί曰體16(圖6)開極電容所儲存訊號之電荷 極:既:此::ί ί32沒極上的接合漏流為最主要來源 量在大多時候保持。則宜儘 讀出之列以外,太除了在給定時間對正當 壓。 圣月在其他時候避免靴帶式地升高電 儘管已經呈頻if '+* »_ 技藝者來說,Κί本發明之具體實例及應用,對熟練 正,不脫本文ϋίΓ上所提及的之外,可能還有更多修 利範圍内並不受念。0而,本發明在附錄之申請專
第26頁
Claims (1)
- 530488 案號 90103260 六、申請專利範圍 1. 一種以複數列及複數行排置成之積體主動像素感測 陣列,其包含: 複數個列選擇線,每一該等列選擇線聯合該陣列之 列,且耦合一列選擇訊號源極; 複數個源極隨耦器汲極列線,每一該等源極隨耦器 極列線聯合該陣列之一列,且耦合一源極隨耦器汲極列 號源極; 複數個行輸出線,每一該等行線聯合該陣列之一行 一重設線,其耦合一重設訊號源極; 一重設電位源極;及 複數個主動像素感測器,每一像素感測器聯合該陣 之一列及一行,並包含一光二極體,該光二極體具有耦 一第一參考電位之第一終端,及第二終端;一重設電晶 體,其具有一搞合該重設線之閘極,一搞合該重設電位 反偏壓該光二極體之汲極,及一耦合該光二極體第二終 之源極;一源極隨耦器電晶體,其具有一耦合該光二極 第二終端之閘極,一連接該複數個源極隨耦器汲極列線 與所屬主動像素感測器聯合之該一條線之汲極,及一源 極;及一列選擇電晶體,其具有一耦合該複數個列選擇 中與所屬主動像素感測器聯合之該一條線之閘極,一耦 該源極隨耦器電晶體源極之汲極,及一耦合該複數個行 出線中與所屬主動像素感測器聯合之該一條線之源極。 2. —種以複數列及複數行排置成之積體主動像素感測 陣列,其包含: 器 汲 訊 列 合 以 端 體 中 線 合 器O:\69\69369-920220.ptc 第29頁 530488 _案號 90103260 /2 年二月 >〇日__ 六、申請專利範圍 複數個列選擇線,每一該等列選擇線聯合該陣列之一 列,且耦合一列選擇訊號源極; 複數個源極隨耦器汲極列線,每一該等源極隨耦器汲 極列線聯合該陣列之一列,且耦合一源極隨耦器汲極列訊 號源極; 複數個行輸出線,每一該等行線聯合該陣列之一行; 一重設線,其耦合一重設訊號源極; 一傳送線,其耦合一傳送訊號源極; 一重設電位源極;及 複數個主動像素感測器,每一像素感測器聯合該陣列 之一列及一行,並包含一光二極體,該光二極體具有耦合 一第一參考電位之第一終端,及第二終端;一重設電晶 體,其具有一耦合該重設線之閘極,一耦合該重設電位以 反偏壓該光二極體之汲極,及一耦合該光二極體第二終端 之源極;一傳送電晶體,其具有一耦合該傳送線之閘極, 一耦合該光二極體第二終端之源極,及一汲極;一源極隨 耦器電晶體,其具有一耦合該傳送電晶體源極之閘極,一 連接該複數個源極隨耦器汲極列線中與所屬主動像素感測 器聯合之該一條線之沒極,及一源極;及一列選擇電晶 體,其具有一耦合該複數個列選擇線中與所屬主動像素感 測器聯合之該一條線之閘極,一耦合該源極隨耦器電晶體 源極之汲極,及一耦合該複數個行輸出線中與所屬主動像 素感測器聯合之該一條線之源極。 3. —種用以操作依據申請專利範圍第1項之積體主動像O:\69\69369-920220.ptc 第30頁 530488 _案號 90103260 为年上月日_修正_ 六、申請專利範圍 素感測器陣列之方法,其包含: 於一重設週期間,在該重設線上判定一重設訊號; 於一整合週期間,在該複數個主動像素感測器上整合 光電荷; 將代表經整合之光電荷的訊號讀出,其做法為:從該 複數個主動像素感測器,一次選擇一列來讀出,對該選擇 出之列所聯合的該一條源極隨耦器汲極列線做判定,且在 判定該選擇出之列所聯合的該一條源極隨耦器汲極列線的 同時,對該選擇出之列所聯合的該一條列選擇線做判定。 4.如申請專利範圍第3項之方法,其中對該選擇出之列 所聯合的該一條列選擇線所做的判定包含:以一受控制的 上升時間,提升該選擇出之列所聯合的該一條列選擇線上 的電壓。 5 . —種用以操作如申請專利範圍第2項之積體主動像素 感測器陣列之方法,其包含: 於一重設週期間,在該重設線上判定一重設訊號; 於該重設週期間及一整合週期間,在該傳送線上判定 一傳送訊號; 於該積分週期間,在該複數個主動像素感測器上積分 光電荷; 除去判定在該傳送線上之傳送信號;以及 將代表經積分之光電荷的訊號讀出,其做法為:從該 複數個主動像素感測器,一次選擇一列來讀出,對該選擇 出之列所聯合的該一條源極隨耦器汲極列線做判定,且在O:\69\69369-920220.ptc 第31頁 530488 案號 90103260 为年上月%曰 修正 六、申請專利範圍 判定該選擇出之列所聯合的該一條源極隨耦器汲極列線的 同時,對該選擇出之列所聯合的該一條列選擇線做判定。 6.如申請專利範圍第5項之方法,其中對該選擇出之列 所聯合的該一條列選擇線所做的判定包含:以一受控制的 上升時間,提升該選擇出之列所聯合的該一條列選擇線上 的電壓。O:\69\69369-920220.ptc 第32頁
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-
2001
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- 2001-02-12 JP JP2001560451A patent/JP4842487B2/ja not_active Expired - Fee Related
- 2001-02-12 KR KR1020027010572A patent/KR20030004350A/ko not_active Application Discontinuation
- 2001-04-12 TW TW090103260A patent/TW530488B/zh not_active IP Right Cessation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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US9256306B2 (en) | 2011-12-27 | 2016-02-09 | Industrial Technology Research Institute | Sensing apparatus and driving method thereof |
CN105794200A (zh) * | 2013-11-04 | 2016-07-20 | E2V半导体公司 | 具有改进的读取动态的硅基图像传感器 |
Also Published As
Publication number | Publication date |
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WO2001061756A2 (en) | 2001-08-23 |
JP4842487B2 (ja) | 2011-12-21 |
JP2003523632A (ja) | 2003-08-05 |
KR20030004350A (ko) | 2003-01-14 |
WO2001061756A3 (en) | 2002-01-24 |
US6410899B1 (en) | 2002-06-25 |
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