TW490807B - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
- Publication number
- TW490807B TW490807B TW090107363A TW90107363A TW490807B TW 490807 B TW490807 B TW 490807B TW 090107363 A TW090107363 A TW 090107363A TW 90107363 A TW90107363 A TW 90107363A TW 490807 B TW490807 B TW 490807B
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor device
- gate
- gate electrodes
- contributing
- semiconductor
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/118—Masterslice integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/118—Masterslice integrated circuits
- H01L27/11803—Masterslice integrated circuits using field effect technology
- H01L27/11807—CMOS gate arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
Description
490807 案號 90107363 六、申請專利範圍 一構件構成 11 ·如申請專利範圍第1項之半導體裝置,其中,所選 擇之該閘極(ΙΑ、1B、2A、2B)之自該第二方向之一端至另 一端分割成2以上。 1 2·如申請專利範圍第1項之半導體裝置,其中,設成 相鄰之該主動區域(1U〜114)在該第一方向之間隔大致相 同0 13. 如申請專利範圍第1項之半導體裝置,其中 電晶體形成區域(101)構成一個一個標準單元(21) < 14. 一種半導體裝置,包括:電晶體形成區域(1〇1), 有在半導體基板形成之複數源極/汲極區域(8〜丨4)和沿 ,第一方向排列且各自之閘寬方向和與該第一方向垂直之 第一方向一致之複數閘極;及複數電場效應電晶體,各自 由該複數閘極(1〜4)之中之一個和該複數源極/汲極區域 (8 = 4)之中之2個構成;其特徵在於:在列方向及 配置該^電場效應電晶體包括2種以上之係該複數源極/ 没極區域(8〜14)沿著第二方向之長度之主動區域寬(5~?) 不同的、該複數閘極(Η)各自之閘寬 域寬(5〜7)以上之積體電路,構成半導體積體
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000207911A JP4794030B2 (ja) | 2000-07-10 | 2000-07-10 | 半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW490807B true TW490807B (en) | 2002-06-11 |
Family
ID=18704594
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW090107363A TW490807B (en) | 2000-07-10 | 2001-03-28 | Semiconductor device |
Country Status (5)
Country | Link |
---|---|
US (1) | US6635935B2 (zh) |
JP (1) | JP4794030B2 (zh) |
KR (1) | KR100392715B1 (zh) |
CN (1) | CN1199285C (zh) |
TW (1) | TW490807B (zh) |
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US7053424B2 (en) * | 2002-10-31 | 2006-05-30 | Yamaha Corporation | Semiconductor integrated circuit device and its manufacture using automatic layout |
KR100577610B1 (ko) | 2003-07-15 | 2006-05-10 | 삼성전자주식회사 | 반도체 장치, 반도체 장치의 제조 방법 및 에스램 장치,에스램 장치 제조 방법. |
JP4620942B2 (ja) * | 2003-08-21 | 2011-01-26 | 川崎マイクロエレクトロニクス株式会社 | 半導体集積回路のレイアウト方法、そのレイアウト構造、およびフォトマスク |
JP4599048B2 (ja) * | 2003-10-02 | 2010-12-15 | 川崎マイクロエレクトロニクス株式会社 | 半導体集積回路のレイアウト構造、半導体集積回路のレイアウト方法、およびフォトマスク |
JP2005243928A (ja) * | 2004-02-26 | 2005-09-08 | Fujitsu Ltd | トレンチアイソレーションで分離されたトランジスタ対を有する半導体装置 |
JP2005268610A (ja) * | 2004-03-19 | 2005-09-29 | Matsushita Electric Ind Co Ltd | スタンダードセルの設計方法及び半導体集積回路 |
JP4248451B2 (ja) | 2004-06-11 | 2009-04-02 | パナソニック株式会社 | 半導体装置およびそのレイアウト設計方法 |
JP4778689B2 (ja) * | 2004-06-16 | 2011-09-21 | パナソニック株式会社 | 標準セル、標準セルライブラリおよび半導体集積回路 |
JP4175649B2 (ja) | 2004-07-22 | 2008-11-05 | 松下電器産業株式会社 | 半導体装置 |
JP2007043049A (ja) * | 2004-12-20 | 2007-02-15 | Matsushita Electric Ind Co Ltd | セル、スタンダードセル、スタンダードセル配置方法、スタンダードセルライブラリ、ならびに半導体集積回路 |
KR100610022B1 (ko) * | 2005-01-18 | 2006-08-08 | 삼성전자주식회사 | 반도체 메모리 장치 |
JP2007012855A (ja) | 2005-06-30 | 2007-01-18 | Matsushita Electric Ind Co Ltd | 半導体集積回路、標準セル、標準セルライブラリ、半導体集積回路の設計方法および半導体集積回路の設計装置 |
JP4832823B2 (ja) * | 2005-07-21 | 2011-12-07 | パナソニック株式会社 | 半導体記憶装置およびromデータパターンの発生方法 |
JP4796817B2 (ja) * | 2005-10-31 | 2011-10-19 | エルピーダメモリ株式会社 | 基本セル設計方法、レイアウト設計方法、設計装置およびプログラム |
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JP5091462B2 (ja) * | 2006-01-19 | 2012-12-05 | パナソニック株式会社 | セルおよび半導体装置 |
US8448102B2 (en) | 2006-03-09 | 2013-05-21 | Tela Innovations, Inc. | Optimizing layout of irregular structures in regular layout context |
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US8658542B2 (en) | 2006-03-09 | 2014-02-25 | Tela Innovations, Inc. | Coarse grid design methods and structures |
US9230910B2 (en) | 2006-03-09 | 2016-01-05 | Tela Innovations, Inc. | Oversized contacts and vias in layout defined by linearly constrained topology |
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US7321139B2 (en) * | 2006-05-26 | 2008-01-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Transistor layout for standard cell with optimized mechanical stress effect |
US7873929B2 (en) * | 2006-08-14 | 2011-01-18 | The Regents Of The University Of California | Method, apparatus and system for designing an integrated circuit including generating at least one auxiliary pattern for cell-based optical proximity correction |
US8286107B2 (en) | 2007-02-20 | 2012-10-09 | Tela Innovations, Inc. | Methods and systems for process compensation technique acceleration |
US8667443B2 (en) | 2007-03-05 | 2014-03-04 | Tela Innovations, Inc. | Integrated circuit cell library for multiple patterning |
US7888705B2 (en) * | 2007-08-02 | 2011-02-15 | Tela Innovations, Inc. | Methods for defining dynamic array section with manufacturing assurance halo and apparatus implementing the same |
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JPWO2017145906A1 (ja) * | 2016-02-25 | 2018-12-27 | 株式会社ソシオネクスト | 半導体集積回路装置 |
US11094695B2 (en) * | 2019-05-17 | 2021-08-17 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integrated circuit device and method of forming the same |
CN112864162B (zh) * | 2021-03-02 | 2022-07-19 | 长江存储科技有限责任公司 | 一种页缓冲器、场效应晶体管及三维存储器 |
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-
2000
- 2000-07-10 JP JP2000207911A patent/JP4794030B2/ja not_active Expired - Fee Related
-
2001
- 2001-03-28 TW TW090107363A patent/TW490807B/zh not_active IP Right Cessation
- 2001-03-28 US US09/818,907 patent/US6635935B2/en not_active Expired - Lifetime
- 2001-05-10 CN CNB011174986A patent/CN1199285C/zh not_active Expired - Fee Related
- 2001-05-10 KR KR10-2001-0025384A patent/KR100392715B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JP2002026125A (ja) | 2002-01-25 |
JP4794030B2 (ja) | 2011-10-12 |
CN1199285C (zh) | 2005-04-27 |
KR20020005956A (ko) | 2002-01-18 |
KR100392715B1 (ko) | 2003-07-28 |
US6635935B2 (en) | 2003-10-21 |
CN1333567A (zh) | 2002-01-30 |
US20020003270A1 (en) | 2002-01-10 |
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