TW373324B - A method of fabricating DRAM cell capacitor - Google Patents

A method of fabricating DRAM cell capacitor

Info

Publication number
TW373324B
TW373324B TW087108589A TW87108589A TW373324B TW 373324 B TW373324 B TW 373324B TW 087108589 A TW087108589 A TW 087108589A TW 87108589 A TW87108589 A TW 87108589A TW 373324 B TW373324 B TW 373324B
Authority
TW
Taiwan
Prior art keywords
storage electrode
insulating layer
layer
material layer
contact hole
Prior art date
Application number
TW087108589A
Other languages
English (en)
Chinese (zh)
Inventor
Kyu-Hyun Lee
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of TW373324B publication Critical patent/TW373324B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/90—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions
    • H01L28/91—Electrodes with an enlarged surface, e.g. formed by texturisation having vertical extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H10B12/0335—Making a connection between the transistor and the capacitor, e.g. plug

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW087108589A 1998-03-30 1998-06-02 A method of fabricating DRAM cell capacitor TW373324B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019980010991A KR100327123B1 (ko) 1998-03-30 1998-03-30 디램셀캐패시터의제조방법

Publications (1)

Publication Number Publication Date
TW373324B true TW373324B (en) 1999-11-01

Family

ID=19535563

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087108589A TW373324B (en) 1998-03-30 1998-06-02 A method of fabricating DRAM cell capacitor

Country Status (7)

Country Link
US (1) US6168992B1 (ko)
JP (1) JP3955411B2 (ko)
KR (1) KR100327123B1 (ko)
DE (1) DE19848782C2 (ko)
FR (1) FR2776834B1 (ko)
GB (1) GB2336033B (ko)
TW (1) TW373324B (ko)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100279298B1 (ko) * 1998-07-02 2001-02-01 윤종용 반도체 메모리 장치의 제조 방법 및 그 구조
KR100583121B1 (ko) * 2000-06-29 2006-05-24 주식회사 하이닉스반도체 반도체소자의 금속배선 콘택홀 제조방법
KR100343653B1 (ko) * 2000-09-22 2002-07-11 윤종용 금속 실리사이드층을 갖는 반도체 장치 및 그 제조방법
KR100356775B1 (ko) * 2000-12-11 2002-10-18 삼성전자 주식회사 2중층의 캐핑 패턴을 사용하여 반도체 메모리소자를형성하는 방법 및 그에 의해 형성된 반도체 메모리소자
KR20030002896A (ko) * 2001-06-30 2003-01-09 주식회사 하이닉스반도체 캐패시터의 제조 방법
US20030146492A1 (en) * 2002-02-05 2003-08-07 International Business Machines Corporation Nitride etchstop film to protect metal-insulator-metal capacitor dielectric from degradation and method for making same
US20030197215A1 (en) * 2002-02-05 2003-10-23 International Business Machines Corporation A dual stacked metal-insulator-metal capacitor and method for making same
KR20040002219A (ko) * 2002-06-29 2004-01-07 주식회사 하이닉스반도체 반도체소자의 캐패시터 형성방법
DE10232938B4 (de) * 2002-07-19 2005-05-04 Infineon Technologies Ag Verfahren zur Herstellung einer vergrabenen Bitleitung für einen Halbleiterspeicher
KR100434511B1 (ko) * 2002-08-12 2004-06-05 삼성전자주식회사 다마신 배선을 이용한 반도체 소자의 제조방법
US20040087153A1 (en) * 2002-10-31 2004-05-06 Yan Du Method of etching a silicon-containing dielectric material
JP4543392B2 (ja) * 2005-11-01 2010-09-15 エルピーダメモリ株式会社 半導体装置の製造方法
US7748283B2 (en) * 2007-02-16 2010-07-06 Whatman, Inc. Controlled transfer biological sample collection devices and methods of using such devices
US8274777B2 (en) 2008-04-08 2012-09-25 Micron Technology, Inc. High aspect ratio openings
US8829676B2 (en) 2011-06-28 2014-09-09 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure for wafer level package
US9368460B2 (en) 2013-03-15 2016-06-14 Taiwan Semiconductor Manufacturing Company, Ltd. Fan-out interconnect structure and method for forming same
KR102271773B1 (ko) * 2014-09-16 2021-07-01 삼성전자주식회사 반도체 소자 제조 방법
CN112582261B (zh) * 2019-09-27 2022-03-08 长鑫存储技术有限公司 存储器节点接触窗的制作方法
CN112995450A (zh) * 2019-12-16 2021-06-18 中芯集成电路（宁波）有限公司 成像模组及其制造方法

Family Cites Families (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0369162A (ja) * 1989-08-08 1991-03-25 Nec Corp 半導体装置の製造方法
EP0416809A3 (en) * 1989-09-08 1991-08-07 American Telephone And Telegraph Company Reduced size etching method for integrated circuits
US5691249A (en) 1990-03-20 1997-11-25 Nec Corporation Method for fabricating polycrystalline silicon having micro roughness on the surface
US5366917A (en) 1990-03-20 1994-11-22 Nec Corporation Method for fabricating polycrystalline silicon having micro roughness on the surface
TW209253B (ko) 1990-09-21 1993-07-11 Nidden Aneruba Kk
JP2679433B2 (ja) 1991-03-14 1997-11-19 日本電気株式会社 多結晶シリコン膜の形成方法
JP2508948B2 (ja) 1991-06-21 1996-06-19 日本電気株式会社 半導体装置の製造方法
US5155657A (en) * 1991-10-31 1992-10-13 International Business Machines Corporation High area capacitor formation using material dependent etching
US5474949A (en) * 1992-01-27 1995-12-12 Matsushita Electric Industrial Co., Ltd. Method of fabricating capacitor or contact for semiconductor device by forming uneven oxide film and reacting silicon with metal containing gas
EP0553791A1 (en) 1992-01-31 1993-08-04 Nec Corporation Capacitor electrode for dram and process of fabrication thereof
KR960002097B1 (ko) 1992-02-28 1996-02-10 삼성전자주식회사 반도체장치의 커패시터 제조방법
JPH06188385A (ja) 1992-10-22 1994-07-08 Mitsubishi Electric Corp 半導体装置およびその製造方法
KR940016805A (ko) * 1992-12-31 1994-07-25 김주용 반도체 소자의 적층 캐패시터 제조 방법
JP2682386B2 (ja) 1993-07-27 1997-11-26 日本電気株式会社 半導体装置の製造方法
JP2658824B2 (ja) 1993-08-31 1997-09-30 日本電気株式会社 半導体装置の製造方法
JP2658840B2 (ja) 1993-12-01 1997-09-30 日本電気株式会社 プロセスシミュレータおよびこれを用いたｃｖｄ装置およびプロセスシミュレーション方法
JPH07161931A (ja) 1993-12-02 1995-06-23 Nec Corp 半導体装置の製造方法
JP2727981B2 (ja) 1993-12-27 1998-03-18 日本電気株式会社 凸凹アモルファスシリコン膜および凸凹ポリシリコン膜の形成方法
KR0138317B1 (ko) * 1994-08-31 1998-04-28 김광호 반도체장치 커패시터 제조방법
JP2643870B2 (ja) * 1994-11-29 1997-08-20 日本電気株式会社 半導体記憶装置の製造方法
JP2679671B2 (ja) * 1995-03-30 1997-11-19 日本電気株式会社 半導体記憶装置の容量素子の製造方法
JP2728025B2 (ja) 1995-04-13 1998-03-18 日本電気株式会社 半導体装置の製造方法
KR960039371A (ko) * 1995-04-17 1996-11-25 김광호 이중 실린더형 캐패시터를 갖는 반도체장치의 제조방법
KR970013363A (ko) * 1995-08-31 1997-03-29 김광호 반도체 장치의 커패시터 제조방법
US5643819A (en) 1995-10-30 1997-07-01 Vanguard International Semiconductor Corporation Method of fabricating fork-shaped stacked capacitors for DRAM cells
US5733808A (en) * 1996-01-16 1998-03-31 Vanguard International Semiconductor Corporation Method for fabricating a cylindrical capacitor for a semiconductor device
US5652170A (en) * 1996-01-22 1997-07-29 Micron Technology, Inc. Method for etching sloped contact openings in polysilicon
US5554557A (en) 1996-02-02 1996-09-10 Vanguard International Semiconductor Corp. Method for fabricating a stacked capacitor with a self aligned node contact in a memory cell
JPH1022476A (ja) * 1996-07-02 1998-01-23 Sony Corp 容量素子
GB2321776A (en) 1996-08-16 1998-08-05 United Microelectronics Corp Method of fabricating a stacked capacitor
GB2321774A (en) * 1996-08-16 1998-08-05 United Microelectronics Corp Stacked capacitor
US5668038A (en) * 1996-10-09 1997-09-16 Taiwan Semiconductor Manufacturing Company, Ltd. One step smooth cylinder surface formation process in stacked cylindrical DRAM products
US5677222A (en) * 1996-10-11 1997-10-14 Vanguard International Semiconductor Corporation Method for forming a DRAM capacitor
US5728618A (en) * 1997-06-04 1998-03-17 Vanguard International Semiconductor Corporation Method to fabricate large capacitance capacitor in a semiconductor circuit

Also Published As

Publication number Publication date
US6168992B1 (en) 2001-01-02
GB2336033A (en) 1999-10-06
FR2776834A1 (fr) 1999-10-01
GB2336033B (en) 2000-07-19
GB9907267D0 (en) 1999-05-26
KR100327123B1 (ko) 2002-08-24
KR19990076230A (ko) 1999-10-15
DE19848782A1 (de) 1999-10-07
FR2776834B1 (fr) 2005-03-11
JPH11330421A (ja) 1999-11-30
JP3955411B2 (ja) 2007-08-08
DE19848782C2 (de) 2002-06-13

Similar Documents

Publication Publication Date Title
TW373324B (en) A method of fabricating DRAM cell capacitor
WO2002049100A3 (en) Method of forming vertical transistor gate for trench capacitor dram cell
GB2349505B (en) Method of fabricating a semiconductor device
KR910013505A (ko) 반도체 메모리의 제조방법
TW376582B (en) Method of forming COB DRAM with self-aligned pole and bitline contact plug
TW346658B (en) Method for manufacturing capacitor for semiconductor device
US5773310A (en) Method for fabricating a MOS transistor
KR980005912A (ko) 반도체 장치의 금속콘택구조 및 그 제조방법
TW346672B (en) Method for fabricating a semiconductor memory cell in a DRAM
KR100414730B1 (ko) 반도체소자의 캐패시터 형성방법
KR100372635B1 (ko) 반도체장치의 배선연결부 구조 및 그 형성방법
KR100753031B1 (ko) 반도체소자의 콘택홀 형성 방법
TW344139B (en) Process for producing nonvolatile memory device
KR20000045326A (ko) 반도체 메모리 소자 제조방법
KR100364802B1 (ko) 더미 셀 배치 방법
KR100379511B1 (ko) 반도체 소자의 콘택 형성 방법
KR100804147B1 (ko) 커패시터의 형성방법
KR20050002026A (ko) 반도체 소자의 캐패시터 제조방법
KR970018574A (ko) 반도체장치의 제조방법
KR0156099B1 (ko) 다이나믹 램 셀 및 그의 제조방법
KR20000002731A (en) Semiconductor device production method
KR20020050916A (ko) 반도체 소자의 캐패시터 제조방법
KR19980021230A (ko) 반도체 소자의 제조 방법
KR100353833B1 (en) Method for fabricating semiconductor memory device having cell node plug
KR20020032707A (ko) 반도체 소자의 콘택 플러그 형성 방법

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees