TW349262B - Semiconductor device related to wiring and process for producing the same - Google Patents

Semiconductor device related to wiring and process for producing the same

Info

Publication number
TW349262B
TW349262B TW085111906A TW85111906A TW349262B TW 349262 B TW349262 B TW 349262B TW 085111906 A TW085111906 A TW 085111906A TW 85111906 A TW85111906 A TW 85111906A TW 349262 B TW349262 B TW 349262B
Authority
TW
Taiwan
Prior art keywords
film
insulation film
semiconductor device
stop
wiring
Prior art date
Application number
TW085111906A
Other languages
English (en)
Chinese (zh)
Inventor
Masahiro Inohara
Hideki Shibata
Tadashi Matsuno
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of TW349262B publication Critical patent/TW349262B/zh

Links

Classifications

    • H10D64/011
    • H10W20/033
    • H10W20/071
    • H10W20/082
    • H10W20/084
    • H10W20/086
    • H10W20/40
    • H10W20/42
    • H10W20/425
    • H10W20/085

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
  • Electrodes Of Semiconductors (AREA)
TW085111906A 1995-09-29 1996-09-30 Semiconductor device related to wiring and process for producing the same TW349262B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP25373695 1995-09-29
JP8212332A JPH09153545A (ja) 1995-09-29 1996-08-12 半導体装置及びその製造方法

Publications (1)

Publication Number Publication Date
TW349262B true TW349262B (en) 1999-01-01

Family

ID=26519157

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085111906A TW349262B (en) 1995-09-29 1996-09-30 Semiconductor device related to wiring and process for producing the same

Country Status (8)

Country Link
US (2) US5976972A (index.php)
EP (1) EP0766303B1 (index.php)
JP (1) JPH09153545A (index.php)
KR (1) KR100253852B1 (index.php)
CN (2) CN1266760C (index.php)
DE (1) DE69625975T2 (index.php)
MY (1) MY113878A (index.php)
TW (1) TW349262B (index.php)

Families Citing this family (57)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6156149A (en) * 1997-05-07 2000-12-05 Applied Materials, Inc. In situ deposition of a dielectric oxide layer and anti-reflective coating
US6060385A (en) * 1997-02-14 2000-05-09 Micro Technology, Inc. Method of making an interconnect structure
SG70654A1 (en) * 1997-09-30 2000-02-22 Ibm Copper stud structure with refractory metal liner
KR100403357B1 (ko) * 1997-12-16 2003-12-18 주식회사 하이닉스반도체 반도체 소자의 제조방법
JP3305251B2 (ja) 1998-02-26 2002-07-22 松下電器産業株式会社 配線構造体の形成方法
US6197696B1 (en) 1998-03-26 2001-03-06 Matsushita Electric Industrial Co., Ltd. Method for forming interconnection structure
JP3382844B2 (ja) * 1998-04-07 2003-03-04 日本電気株式会社 半導体装置の製造方法
US6166819A (en) * 1998-06-26 2000-12-26 Siemens Aktiengesellschaft System and methods for optically measuring dielectric thickness in semiconductor devices
US6420261B2 (en) * 1998-08-31 2002-07-16 Fujitsu Limited Semiconductor device manufacturing method
JP4226699B2 (ja) 1998-09-11 2009-02-18 株式会社ルネサステクノロジ 半導体装置の製造方法
US6057230A (en) * 1998-09-17 2000-05-02 Taiwan Semiconductor Manufacturing Company, Ltd. Dry etching procedure and recipe for patterning of thin film copper layers
JP4074014B2 (ja) * 1998-10-27 2008-04-09 株式会社東芝 半導体装置及びその製造方法
JP3312604B2 (ja) * 1998-11-06 2002-08-12 日本電気株式会社 半導体装置の製造方法
US6734564B1 (en) * 1999-01-04 2004-05-11 International Business Machines Corporation Specially shaped contact via and integrated circuit therewith
JP2000216247A (ja) 1999-01-22 2000-08-04 Nec Corp 半導体装置及びその製造方法
US20030089987A1 (en) * 1999-02-05 2003-05-15 Suketu A. Parikh Dual damascene misalignment tolerant techniques for vias and sacrificial etch segments
JP3436221B2 (ja) 1999-03-15 2003-08-11 ソニー株式会社 半導体装置の製造方法
JP2000311939A (ja) 1999-04-27 2000-11-07 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP4094174B2 (ja) * 1999-06-04 2008-06-04 株式会社ルネサステクノロジ 半導体装置の製造方法
JP2001127169A (ja) * 1999-10-27 2001-05-11 Mitsubishi Electric Corp 半導体装置およびその製造方法
US20020076917A1 (en) * 1999-12-20 2002-06-20 Edward P Barth Dual damascene interconnect structure using low stress flourosilicate insulator with copper conductors
JP3626058B2 (ja) * 2000-01-25 2005-03-02 Necエレクトロニクス株式会社 半導体装置の製造方法
US6319840B1 (en) * 2000-06-29 2001-11-20 International Business Machines Corporation For mol integration
KR100366625B1 (ko) * 2000-07-25 2003-01-09 삼성전자 주식회사 듀얼 다마신 배선구조의 반도체 소자 및 그 제조방법
US6989602B1 (en) * 2000-09-21 2006-01-24 Agere Systems Inc. Dual damascene process with no passing metal features
US6399470B1 (en) * 2000-10-05 2002-06-04 Oki Electronic Industry Co., Ltd. Method for forming contact holes on conductors having a protective layer using selective etching
US6372635B1 (en) * 2001-02-06 2002-04-16 Advanced Micro Devices, Inc. Method for making a slot via filled dual damascene low k interconnect structure without middle stop layer
US6444573B1 (en) * 2001-02-21 2002-09-03 Advanced Micro Devices, Inc. Method of making a slot via filled dual damascene structure with a middle stop layer
JP2002252281A (ja) * 2001-02-27 2002-09-06 Sony Corp 半導体装置およびその製造方法
US6376351B1 (en) * 2001-06-28 2002-04-23 Taiwan Semiconductor Manufacturing Company High Fmax RF MOSFET with embedded stack gate
JP3946471B2 (ja) * 2001-07-24 2007-07-18 シャープ株式会社 半導体装置の製造方法
US7119010B2 (en) * 2002-04-23 2006-10-10 Chartered Semiconductor Manfacturing Ltd. Integrated circuit with self-aligned line and via and manufacturing method therefor
JP3779243B2 (ja) 2002-07-31 2006-05-24 富士通株式会社 半導体装置及びその製造方法
US6703710B1 (en) * 2002-08-15 2004-03-09 National Semiconductor Corporation Dual damascene metal trace with reduced RF impedance resulting from the skin effect
US6864581B1 (en) 2002-08-15 2005-03-08 National Semiconductor Corporation Etched metal trace with reduced RF impendance resulting from the skin effect
US6853079B1 (en) 2002-08-15 2005-02-08 National Semiconductor Corporation Conductive trace with reduced RF impedance resulting from the skin effect
US6740956B1 (en) 2002-08-15 2004-05-25 National Semiconductor Corporation Metal trace with reduced RF impedance resulting from the skin effect
US6911389B2 (en) * 2002-09-18 2005-06-28 Texas Instruments Incorporated Self aligned vias in dual damascene interconnect, buried mask approach
JP2005175252A (ja) * 2003-12-12 2005-06-30 Ricoh Co Ltd 半導体装置
US7135401B2 (en) * 2004-05-06 2006-11-14 Micron Technology, Inc. Methods of forming electrical connections for semiconductor constructions
JP2006245198A (ja) * 2005-03-02 2006-09-14 Nec Electronics Corp 半導体装置の製造方法
WO2006095915A1 (ja) * 2005-03-09 2006-09-14 Nec Corporation 多層配線構造、半導体装置、パターン転写マスク、及び多層配線構造の製造方法
KR100833201B1 (ko) * 2007-06-15 2008-05-28 삼성전자주식회사 콘택 플러그 및 배선 라인 일체형 구조의 미세 패턴을가지는 반도체 소자 및 그 제조 방법
JP2006303307A (ja) * 2005-04-22 2006-11-02 Toshiba Corp 半導体装置およびその製造方法
US7320934B2 (en) * 2005-06-20 2008-01-22 Infineon Technologies Ag Method of forming a contact in a flash memory device
JP4155587B2 (ja) 2006-04-06 2008-09-24 株式会社東芝 半導体装置の製造方法
KR100824200B1 (ko) * 2006-09-29 2008-04-21 주식회사 하이닉스반도체 반도체 소자의 금속배선
JP5192779B2 (ja) * 2007-11-02 2013-05-08 株式会社コナミデジタルエンタテインメント ゲーム装置、ゲーム装置の制御方法及びプログラム
US8803245B2 (en) 2008-06-30 2014-08-12 Mcafee, Inc. Method of forming stacked trench contacts and structures formed thereby
DE102008059503A1 (de) * 2008-11-28 2010-07-01 Advanced Micro Devices, Inc., Sunnyvale Leistungsverbesserung in Metallisierungssystemen von Mikrostrukturbauelementen durch Einbau von Metallstrukturen mit größeren Korngrenzen
JP2009200521A (ja) * 2009-05-08 2009-09-03 Renesas Technology Corp 半導体デバイスの製造方法
JP2011134837A (ja) * 2009-12-24 2011-07-07 Sanyo Electric Co Ltd 半導体装置の製造方法
JP2011086969A (ja) * 2011-02-01 2011-04-28 Rohm Co Ltd 半導体装置およびその製造方法
JP2014039059A (ja) * 2013-10-21 2014-02-27 Rohm Co Ltd 半導体装置およびその製造方法
FR3062236A1 (fr) * 2017-01-23 2018-07-27 Stmicroelectronics (Rousset) Sas Barre de connexion
US11984403B2 (en) 2019-11-15 2024-05-14 Dyi-chung Hu Integrated substrate structure, redistribution structure, and manufacturing method thereof
CN112820711A (zh) * 2019-11-15 2021-05-18 胡迪群 集成基板结构、重布线结构及其制造方法

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4789648A (en) * 1985-10-28 1988-12-06 International Business Machines Corporation Method for producing coplanar multi-level metal/insulator films on a substrate and for forming patterned conductive lines simultaneously with stud vias
JPS62290148A (ja) * 1986-06-09 1987-12-17 Oki Electric Ind Co Ltd 半導体装置の製造方法
US4676869A (en) * 1986-09-04 1987-06-30 American Telephone And Telegraph Company At&T Bell Laboratories Integrated circuits having stepped dielectric regions
DE3686721D1 (de) * 1986-10-08 1992-10-15 Ibm Verfahren zur herstellung einer kontaktoeffnung mit gewuenschter schraege in einer zusammengesetzten schicht, die mit photoresist maskiert ist.
US4999318A (en) * 1986-11-12 1991-03-12 Hitachi, Ltd. Method for forming metal layer interconnects using stepped via walls
JPH0611044B2 (ja) * 1987-05-07 1994-02-09 日本電気株式会社 半導体装置の製造方法
US4832789A (en) * 1988-04-08 1989-05-23 American Telephone And Telegrph Company, At&T Bell Laboratories Semiconductor devices having multi-level metal interconnects
JP2585140B2 (ja) * 1989-11-14 1997-02-26 三菱電機株式会社 半導体装置の配線接触構造
JPH03198327A (ja) * 1989-12-26 1991-08-29 Fujitsu Ltd 半導体装置の製造方法
NL9100094A (nl) * 1991-01-21 1992-08-17 Koninkl Philips Electronics Nv Halfgeleiderinrichting en werkwijze ter vervaardiging van een dergelijke halfgeleiderinrichting.
US5203957A (en) * 1991-06-12 1993-04-20 Taiwan Semiconductor Manufacturing Company Contact sidewall tapering with argon sputtering
US5169802A (en) * 1991-06-17 1992-12-08 Hewlett-Packard Company Internal bridging contact
JP2934353B2 (ja) * 1992-06-24 1999-08-16 三菱電機株式会社 半導体装置およびその製造方法
KR0126801B1 (ko) * 1993-12-22 1998-04-02 김광호 반도체 장치의 배선 형성방법
US5635423A (en) * 1994-10-11 1997-06-03 Advanced Micro Devices, Inc. Simplified dual damascene process for multi-level metallization and interconnection structure
KR0138305B1 (ko) * 1994-11-30 1998-06-01 김광호 반도체소자 배선형성방법
US5656543A (en) * 1995-02-03 1997-08-12 National Semiconductor Corporation Fabrication of integrated circuits with borderless vias
US5534462A (en) * 1995-02-24 1996-07-09 Motorola, Inc. Method for forming a plug and semiconductor device having the same
US5940732A (en) * 1995-11-27 1999-08-17 Semiconductor Energy Laboratory Co., Method of fabricating semiconductor device
KR0179792B1 (ko) * 1995-12-27 1999-04-15 문정환 고밀도 플라즈마 식각장비를 이용한 슬로프 콘택 홀 형성방법
US5730835A (en) * 1996-01-31 1998-03-24 Micron Technology, Inc. Facet etch for improved step coverage of integrated circuit contacts
US5741626A (en) * 1996-04-15 1998-04-21 Motorola, Inc. Method for forming a dielectric tantalum nitride layer as an anti-reflective coating (ARC)
US5904565A (en) * 1997-07-17 1999-05-18 Sharp Microelectronics Technology, Inc. Low resistance contact between integrated circuit metal levels and method for same

Also Published As

Publication number Publication date
DE69625975D1 (de) 2003-03-06
EP0766303A2 (en) 1997-04-02
US6163067A (en) 2000-12-19
KR100253852B1 (ko) 2000-05-01
KR970018091A (ko) 1997-04-30
MY113878A (en) 2002-06-29
JPH09153545A (ja) 1997-06-10
CN1154170C (zh) 2004-06-16
CN1501472A (zh) 2004-06-02
US5976972A (en) 1999-11-02
DE69625975T2 (de) 2003-08-28
EP0766303A3 (index.php) 1997-04-23
CN1152191A (zh) 1997-06-18
CN1266760C (zh) 2006-07-26
EP0766303B1 (en) 2003-01-29

Similar Documents

Publication Publication Date Title
TW349262B (en) Semiconductor device related to wiring and process for producing the same
TW374974B (en) Method of manufacturing compound wiring substrates, flexible substrates, semiconductor devices and compound wiring substrates
TW350989B (en) Process for forming a semiconductor device with an antireflective layer
EP0343667A3 (en) Contact structure for connecting electrode to a semiconductor device and a method of forming the same
TW344098B (en) Semiconductor integrated circuit device and process for making the same
MY112050A (en) Miniature semiconductor device for surface mounting
KR960004095B1 (en) Manufacturing method of metal plug in contact-hole
TW345730B (en) Semiconductor memory device and process for producing the same
TW429599B (en) Method for forming inductors on the semiconductor substrate
EP0177105A3 (en) Method for providing a semiconductor device with planarized contacts
TW332329B (en) Semiconductor device and method of manufacturing the same
GB2349505B (en) Method of fabricating a semiconductor device
KR920018849A (ko) 반도체장치 및 그의 제조방법
TW327237B (en) Semiconductor device and method for forming the same
JPS57155765A (en) Manufacture of semiconductor device
TW338176B (en) Improved delibeation pattern for epitaxial depositions
TW353191B (en) Semiconductor device and process for producing the same
TW331033B (en) Static random access memory self-aligned load structure and producing method
TW350973B (en) Semiconductor and semiconductor layout
TW330330B (en) A semiconductor device
EP0228183A3 (en) Method for manufacturing semiconductor device
TW344108B (en) A bipolar transistor and method of manufacturing thereof
KR970052364A (ko) 반도체 장치의 콘택 형성 방법
KR960009102B1 (en) Manufacturing method of semiconductor device fuse
TW356606B (en) Inductor for semiconductor device and method of making the same

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees