JPS57155765A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57155765A
JPS57155765A JP56041329A JP4132981A JPS57155765A JP S57155765 A JPS57155765 A JP S57155765A JP 56041329 A JP56041329 A JP 56041329A JP 4132981 A JP4132981 A JP 4132981A JP S57155765 A JPS57155765 A JP S57155765A
Authority
JP
Japan
Prior art keywords
layer
polysilicon
contact
lsi
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56041329A
Other languages
Japanese (ja)
Other versions
JPS6362107B2 (en
Inventor
Junji Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56041329A priority Critical patent/JPS57155765A/en
Publication of JPS57155765A publication Critical patent/JPS57155765A/en
Publication of JPS6362107B2 publication Critical patent/JPS6362107B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0688—Integrated circuits having a three-dimensional layout

Abstract

PURPOSE:To securely form a layer contact of three-dimensional LSI by a method wherein a connecting hole is provides in vertical and longitudinal directions on a layer insulating film, and an amorphous semiconductor layer of the upper layer after packing semiconductor or conductor in the connecting hole. CONSTITUTION:The first layer LSI2 and the layer insulating film 4 are formed on an insulating substrate 1. Next, the contact hole 8 is filled with polysilicon to remove the polysilicon with the thickness t1 of a flat part by reactive etching. Subsequently, the polysilicon layer 9 with the thickness t2 required for the formation of the second layer LSI is grown by CVD method to single-crystallize the polysilicon layer 9 by lazer annealing. The contact hole being previously filled, the contact is securely formed to increase the reliability of the three- dimensional LSI.
JP56041329A 1981-03-20 1981-03-20 Manufacture of semiconductor device Granted JPS57155765A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56041329A JPS57155765A (en) 1981-03-20 1981-03-20 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56041329A JPS57155765A (en) 1981-03-20 1981-03-20 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS57155765A true JPS57155765A (en) 1982-09-25
JPS6362107B2 JPS6362107B2 (en) 1988-12-01

Family

ID=12605474

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56041329A Granted JPS57155765A (en) 1981-03-20 1981-03-20 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57155765A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5837953A (en) * 1981-08-31 1983-03-05 Toshiba Corp Laminated semiconductor integrated circuit device
JPS5996761A (en) * 1982-11-25 1984-06-04 Mitsubishi Electric Corp Multi-stage semiconductor device
JPS59129441A (en) * 1983-01-13 1984-07-25 Fujitsu Ltd Manufacture of semiconductor device
JPS627112A (en) * 1985-07-03 1987-01-14 Agency Of Ind Science & Technol Manufacture of semiconductor single crystal layer
WO2003010804A1 (en) * 2001-07-25 2003-02-06 Seiko Epson Corporation Method of producing semiconductor thin film, method of producing semiconductor device, semiconductor device, integrated circuit, electrooptical device and electronic apparatus
JP2008218468A (en) * 2007-02-28 2008-09-18 Univ Of Ryukyus Three-dimensional integrated circuit device and manufacturing method thereof
JP2010226131A (en) * 2010-05-31 2010-10-07 Univ Of Ryukyus Three-dimensional integrated circuit device and method of manufacturing the same

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5837953A (en) * 1981-08-31 1983-03-05 Toshiba Corp Laminated semiconductor integrated circuit device
JPH0330301B2 (en) * 1981-08-31 1991-04-26
JPS5996761A (en) * 1982-11-25 1984-06-04 Mitsubishi Electric Corp Multi-stage semiconductor device
JPS59129441A (en) * 1983-01-13 1984-07-25 Fujitsu Ltd Manufacture of semiconductor device
JPS627112A (en) * 1985-07-03 1987-01-14 Agency Of Ind Science & Technol Manufacture of semiconductor single crystal layer
WO2003010804A1 (en) * 2001-07-25 2003-02-06 Seiko Epson Corporation Method of producing semiconductor thin film, method of producing semiconductor device, semiconductor device, integrated circuit, electrooptical device and electronic apparatus
US6940143B2 (en) 2001-07-25 2005-09-06 Seiko Epson Corporation Semiconductor thin-film manufacturing method, semiconductor device manufacturing method, semiconductor device, integrated circuit, electro-optical device, and electronic appliance
CN1326205C (en) * 2001-07-25 2007-07-11 精工爱普生株式会社 Rector having a movale shuter
JP2008218468A (en) * 2007-02-28 2008-09-18 Univ Of Ryukyus Three-dimensional integrated circuit device and manufacturing method thereof
JP2010226131A (en) * 2010-05-31 2010-10-07 Univ Of Ryukyus Three-dimensional integrated circuit device and method of manufacturing the same

Also Published As

Publication number Publication date
JPS6362107B2 (en) 1988-12-01

Similar Documents

Publication Publication Date Title
EP0371862A3 (en) Method of forming a nonsilicon semiconductor on insulator structure
JPS6437865A (en) Semiconductor memory device and its manufacture
JPS56157058A (en) Semiconductor device and method of manufacturing same
KR960004095B1 (en) Manufacturing method of metal plug in contact-hole
EP0177105A3 (en) Method for providing a semiconductor device with planarized contacts
EP0195970A3 (en) Method for passivating an undercut in semiconductor device preparation
KR900005589A (en) Semiconductor integrated circuit device and manufacturing method thereof
JPS57155765A (en) Manufacture of semiconductor device
JPS5516464A (en) Method of forming wafer for semiconductor device
TW345743B (en) Method for forming side contact of semiconductor device
EP0155698A3 (en) A method for manufacturing a semiconductor integrated circuit device provided with an improved isolation structure
US3696274A (en) Air isolated integrated circuit and method
JPS5723217A (en) Manufacture of semiconductor device
JPS5758338A (en) Semiconductor integrated device
FR2428915A1 (en) Contact prodn. in semiconductor device with multiple wiring layers - using reactive metal film in contact hole between two aluminium layers to prevent faults
JPS6477961A (en) Manufacture of semiconductor device
JPS6473738A (en) Manufacture of semiconductor device
JPS6459940A (en) Manufacture of semiconductor device
JPS5793548A (en) Manufacture of semiconductor device
EP0228183A3 (en) Method for manufacturing semiconductor device
JPS57167656A (en) Manufacture of semiconductor device
JPS5687346A (en) Manufacture of semiconductor device
JPS6484735A (en) Manufacture of semiconductor device
JPS6411346A (en) Manufacture of semiconductor device
JPS6421965A (en) Mos transistor