JPS6459940A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6459940A
JPS6459940A JP21820687A JP21820687A JPS6459940A JP S6459940 A JPS6459940 A JP S6459940A JP 21820687 A JP21820687 A JP 21820687A JP 21820687 A JP21820687 A JP 21820687A JP S6459940 A JPS6459940 A JP S6459940A
Authority
JP
Japan
Prior art keywords
aperture
steps
metallic layers
insulating film
manufacture
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21820687A
Other languages
Japanese (ja)
Inventor
Yuji Hara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP21820687A priority Critical patent/JPS6459940A/en
Publication of JPS6459940A publication Critical patent/JPS6459940A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To make it possible to prevent the disconnection of metallic layers to be formed in an aperture, through which an element region and a contact material or a lower wiring and an upper wiring are connected to each other, by a method wherein a second insulating film being left on the sidewall part, which consists of a first insulating film, of the aperture is removed and a plurality of steps are formed in the aperture. CONSTITUTION:A semiconductor substrate 1 is subjected to anisotropic etching until being exposed by a reactive ion etching method wherein carbon gas tetrafluoride is used. Then, an Si nitride film 4 left on the sidewall of an aperture is removed with an etching liquid which inflicts no effect on an Si oxide film 2, such as a phosphoric liquid, and steps are provided in the aperture. Then, first and second gate metallic layers 5 and 6 are deposited in order in the aperture to manufacture a Schottky transistor. In such a way, the steps in the aperture are formed into a plurality of steps to lessen a step difference per one step, the difference between the upper surface of the metallic layer, which is formed on the lower step, and the lower surface of the metallic layer, which is formed on the upper step, is made small and the metallic layers, which are formed in the aperture, are made easy to connect to each other.
JP21820687A 1987-08-31 1987-08-31 Manufacture of semiconductor device Pending JPS6459940A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21820687A JPS6459940A (en) 1987-08-31 1987-08-31 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21820687A JPS6459940A (en) 1987-08-31 1987-08-31 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6459940A true JPS6459940A (en) 1989-03-07

Family

ID=16716285

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21820687A Pending JPS6459940A (en) 1987-08-31 1987-08-31 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6459940A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5358885A (en) * 1992-08-19 1994-10-25 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a field effect transistor with a T-shaped gate electrode and reduced capacitance
JPH0822997A (en) * 1994-07-07 1996-01-23 Nec Corp Semiconductor device and its manufacture
JPH08124943A (en) * 1994-10-28 1996-05-17 Nec Corp Manufacture of semiconductor device
US6657308B1 (en) * 1997-08-26 2003-12-02 Texas Instruments Incorporated Method for forming a self-aligned contact

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5358885A (en) * 1992-08-19 1994-10-25 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a field effect transistor with a T-shaped gate electrode and reduced capacitance
JPH0822997A (en) * 1994-07-07 1996-01-23 Nec Corp Semiconductor device and its manufacture
JPH08124943A (en) * 1994-10-28 1996-05-17 Nec Corp Manufacture of semiconductor device
US6657308B1 (en) * 1997-08-26 2003-12-02 Texas Instruments Incorporated Method for forming a self-aligned contact

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