JPS5676534A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5676534A
JPS5676534A JP15400979A JP15400979A JPS5676534A JP S5676534 A JPS5676534 A JP S5676534A JP 15400979 A JP15400979 A JP 15400979A JP 15400979 A JP15400979 A JP 15400979A JP S5676534 A JPS5676534 A JP S5676534A
Authority
JP
Japan
Prior art keywords
film
etched
ions
resist
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15400979A
Other languages
Japanese (ja)
Inventor
Kenji Sugishima
Hiroshi Goto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP15400979A priority Critical patent/JPS5676534A/en
Publication of JPS5676534A publication Critical patent/JPS5676534A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To flatten the surface of a semiconductor device by forming a resist film on the surface of the evice exhibiting uneven state, implanting ions through the film, removing the resist film, and thereafter etching the surface of the device. CONSTITUTION:A silicon oxide film 11 is formed on an electrode wire of first layer formed in holes of an insulating film, and a resist film 13 is formed to bury the uneven surface. Ions of B or the like are implanted through the film 13, high ions are doped on the surface of the Si oxide film at the thin resist part, the film 13 is removed, and then the surface of the film 11 is etched, for example, by etchant of fluoric acid or the like. The raised high density regions are almost etched due to the implanted ion density difference but the recessed low density regions are not almost etched. Accordingly, the surface of the Si oxide film 11 is flattened, and second layer metallic wire formed thereon is not broken.
JP15400979A 1979-11-28 1979-11-28 Manufacture of semiconductor device Pending JPS5676534A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15400979A JPS5676534A (en) 1979-11-28 1979-11-28 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15400979A JPS5676534A (en) 1979-11-28 1979-11-28 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5676534A true JPS5676534A (en) 1981-06-24

Family

ID=15574907

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15400979A Pending JPS5676534A (en) 1979-11-28 1979-11-28 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5676534A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970003651A (en) * 1995-06-20 1997-01-28 BPS film planarization method of semiconductor device
CN102479680A (en) * 2010-11-29 2012-05-30 中国科学院微电子研究所 Manufacturing method of semiconductor device
CN102543670A (en) * 2010-12-13 2012-07-04 中国科学院微电子研究所 Planarization method for PMD (Pre-Metal Dielectric) layer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970003651A (en) * 1995-06-20 1997-01-28 BPS film planarization method of semiconductor device
CN102479680A (en) * 2010-11-29 2012-05-30 中国科学院微电子研究所 Manufacturing method of semiconductor device
CN102543670A (en) * 2010-12-13 2012-07-04 中国科学院微电子研究所 Planarization method for PMD (Pre-Metal Dielectric) layer

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