JPS57173956A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57173956A
JPS57173956A JP5909481A JP5909481A JPS57173956A JP S57173956 A JPS57173956 A JP S57173956A JP 5909481 A JP5909481 A JP 5909481A JP 5909481 A JP5909481 A JP 5909481A JP S57173956 A JPS57173956 A JP S57173956A
Authority
JP
Japan
Prior art keywords
oxide film
film
substrate
resist
thinned out
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5909481A
Other languages
Japanese (ja)
Inventor
Takatoshi Ushigoe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP5909481A priority Critical patent/JPS57173956A/en
Publication of JPS57173956A publication Critical patent/JPS57173956A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

PURPOSE:To simplify a manufacturing process by a method wherein an oxide film on a semiconductor substrate is placed under a resist pattern and etched to be thinned out and then ions are implanted in the substrate through the thinned film. CONSTITUTION:An N<+> type buried layer 42 is formed on a P type semiconductor substrate 41 in an O2 atmosphere and, at the same time, an oxide film 43 is formed all over the substrate 41. The oxide film 43 is covered by a resist film 44 and then openings 45 are provided through the resist film 44 in regions where an impurity layer for sub-isolation is planned to be formed for isolating the oxide film 43. The oxide film 43 is subjected to etching with the resist film 44 acting as a mask so that the oxide film 43 at the bottom of the openings 45 is thinned out into an oxide film 43'. The oxide film 43 on the rear side of the substrate 41 not covered by the resist film 44 is also thinned out. B ions are implanted in the substrate 41 through the thin oxide film 43', the resist film 44 is removed, and then driving in is effected.
JP5909481A 1981-04-21 1981-04-21 Manufacture of semiconductor device Pending JPS57173956A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5909481A JPS57173956A (en) 1981-04-21 1981-04-21 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5909481A JPS57173956A (en) 1981-04-21 1981-04-21 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57173956A true JPS57173956A (en) 1982-10-26

Family

ID=13103396

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5909481A Pending JPS57173956A (en) 1981-04-21 1981-04-21 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57173956A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100393962B1 (en) * 1996-12-26 2003-11-17 주식회사 하이닉스반도체 Method for manufacturing semiconductor device
KR100442854B1 (en) * 1997-10-06 2004-09-18 삼성전자주식회사 Method for fabricating semiconductor device to effectively reduce stress applied to semiconductor substrate

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4948278A (en) * 1972-08-30 1974-05-10

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4948278A (en) * 1972-08-30 1974-05-10

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100393962B1 (en) * 1996-12-26 2003-11-17 주식회사 하이닉스반도체 Method for manufacturing semiconductor device
KR100442854B1 (en) * 1997-10-06 2004-09-18 삼성전자주식회사 Method for fabricating semiconductor device to effectively reduce stress applied to semiconductor substrate

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