JPS5753957A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5753957A
JPS5753957A JP12884480A JP12884480A JPS5753957A JP S5753957 A JPS5753957 A JP S5753957A JP 12884480 A JP12884480 A JP 12884480A JP 12884480 A JP12884480 A JP 12884480A JP S5753957 A JPS5753957 A JP S5753957A
Authority
JP
Japan
Prior art keywords
layer
oxide film
substrate
polycrystalline
oxidized
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12884480A
Other languages
Japanese (ja)
Inventor
Hisahiro Matsukawa
Junichi Matsunaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12884480A priority Critical patent/JPS5753957A/en
Publication of JPS5753957A publication Critical patent/JPS5753957A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
    • H01L21/76216—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose introducing electrical active impurities in the local oxidation region for the sole purpose of creating channel stoppers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To eliminate generation of overhang by oxide film isolation layer and to enhance yield of a semiconductor device by a method wherein a material layer having faster speed of oxidation than a substrate is formed on the substrate, and after this material layer is selectively oxidized, the non-oxidized material layer is etched by reacitive ions. CONSTITUTION:A thin oxide film 2 is formed on the N type Si substrate 1, for example, and after a polycrystalline Si layer 3 doped with phosphorus, for example, is accumulated on the upper part thereof, a nitride film mask 4, for example, is provided in an element forming region, and a channel blocking layer 5 is formed by ion implantation. Then the polycrystalline Si layer 3 is selectively oxidized to form an isolating oxide film 6, and after the nitride film 4 is removed by plasma etching, a part of surface of the oxide film 6 is removed. Then the non-oxidized polycrystalline Si layer 3 and the oxide film 2 at the lower part thereof are removed, and the desired element is formed on the exposed substrate region. Accordingly generation of overhang at the isolating oxide layer can be prevented, and breaking of wiring can be prevented to enable to enhance reliability.
JP12884480A 1980-09-17 1980-09-17 Manufacture of semiconductor device Pending JPS5753957A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12884480A JPS5753957A (en) 1980-09-17 1980-09-17 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12884480A JPS5753957A (en) 1980-09-17 1980-09-17 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5753957A true JPS5753957A (en) 1982-03-31

Family

ID=14994777

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12884480A Pending JPS5753957A (en) 1980-09-17 1980-09-17 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5753957A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5338750A (en) * 1992-11-27 1994-08-16 Industrial Technology Research Institute Fabrication method to produce pit-free polysilicon buffer local oxidation isolation

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5338750A (en) * 1992-11-27 1994-08-16 Industrial Technology Research Institute Fabrication method to produce pit-free polysilicon buffer local oxidation isolation

Similar Documents

Publication Publication Date Title
JPS5599744A (en) Manufacture of semiconductor device
JPS57155769A (en) Manufacture of semiconductor device
JPS5753957A (en) Manufacture of semiconductor device
JPS6457717A (en) Manufacture of semiconductor device
JPS5772333A (en) Manufacture of semiconductor device
JPS56133844A (en) Semiconductor device
JPS571243A (en) Manufacture of semiconductor device
JPS5780733A (en) Manufacture of semiconductor device
JPS54124687A (en) Production of semiconductor device
JPS56126957A (en) Manufacture of semiconductor device
JPS56164550A (en) Manufacture of semiconductor device
JPS57173956A (en) Manufacture of semiconductor device
JPS5447489A (en) Production of mos semiconductor device
JPS5790940A (en) Manufacture of semiconductor device
JPS5718362A (en) Semiconductor device and manufacture thereof
JPS55107244A (en) Manufacture of semiconductor device
JPS54129983A (en) Manufacture of semiconductor device
JPS5679446A (en) Production of semiconductor device
JPS57173972A (en) Manufacture of semiconductor ic device
JPS6430244A (en) Manufacture of semiconductor device
JPS5779641A (en) Manufacture of semiconductor device
JPS5759378A (en) Manufacture of semiconductor device
JPS5754345A (en) Manufacture of semiconductor device
JPS57184248A (en) Manufacture of semiconductor device
JPS566448A (en) Mos type integrated circuit device