JPS5780733A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5780733A
JPS5780733A JP15671880A JP15671880A JPS5780733A JP S5780733 A JPS5780733 A JP S5780733A JP 15671880 A JP15671880 A JP 15671880A JP 15671880 A JP15671880 A JP 15671880A JP S5780733 A JPS5780733 A JP S5780733A
Authority
JP
Japan
Prior art keywords
substrate
layer
mask
sio2
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15671880A
Other languages
Japanese (ja)
Inventor
Hiroshi Nozawa
Junichi Matsunaga
Hisahiro Matsukawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP15671880A priority Critical patent/JPS5780733A/en
Publication of JPS5780733A publication Critical patent/JPS5780733A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Drying Of Semiconductors (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To obtain a semiconductor device having preferable characteristics by superposing a material layer having faster oxidation speed than a semiconductor substrate on the substrate, selectively oxidizing the layer, and adding reverse conductive type impurity thereto with interelement isolating layer as a mask. CONSTITUTION:An SiO2, a P-added polysilicon 3 are superposed on a P type Si substrate 1, an Si3N4 mask 4 is formed, and a P<+>channel stopper 5 is formed by B ion injection. A thick oxidized film 6 is formed by oxidation, the mask 4 is removed, and when the layer 3' is vertically opened by reactive sputter ion etching, polysilicon 3'' remains at the overhang of a thick SiO2. Exposed SiO2 2 is etched to form a gate oxidized film 7, and an N channel MOSFET is completed thereafter as the ordinary method. According to this structure, it can prevent large thermal influence to the Si substrate and strain of the substrate at the time of selectively oxidizing, thereby remarkably reducing the defects of the substrate, reducing the defects of the depletion layer between the channel stopper and N<+> type layer under the interelement isolating layer, and providing a semiconductor device having electrically preferable junction.
JP15671880A 1980-11-07 1980-11-07 Manufacture of semiconductor device Pending JPS5780733A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15671880A JPS5780733A (en) 1980-11-07 1980-11-07 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15671880A JPS5780733A (en) 1980-11-07 1980-11-07 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5780733A true JPS5780733A (en) 1982-05-20

Family

ID=15633813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15671880A Pending JPS5780733A (en) 1980-11-07 1980-11-07 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5780733A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001349350A (en) * 2000-04-07 2001-12-21 Borgwarner Inc One-way ratchet clutch mechanism
US7119403B2 (en) 2003-10-16 2006-10-10 International Business Machines Corporation High performance strained CMOS devices
JP2008001470A (en) * 2006-06-22 2008-01-10 Toshiba Elevator Co Ltd Auxiliary brake device for passenger conveyor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001349350A (en) * 2000-04-07 2001-12-21 Borgwarner Inc One-way ratchet clutch mechanism
US7119403B2 (en) 2003-10-16 2006-10-10 International Business Machines Corporation High performance strained CMOS devices
JP2008001470A (en) * 2006-06-22 2008-01-10 Toshiba Elevator Co Ltd Auxiliary brake device for passenger conveyor

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