JPS57107050A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS57107050A JPS57107050A JP18434380A JP18434380A JPS57107050A JP S57107050 A JPS57107050 A JP S57107050A JP 18434380 A JP18434380 A JP 18434380A JP 18434380 A JP18434380 A JP 18434380A JP S57107050 A JPS57107050 A JP S57107050A
- Authority
- JP
- Japan
- Prior art keywords
- region
- fet
- film
- poured
- porous
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76281—Lateral isolation by selective oxidation of silicon
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
- Local Oxidation Of Silicon (AREA)
Abstract
PURPOSE:To prevent exerting of a kink effect on a non-channel type FET and to enable to perform a high-speed operation, by a method wherein, in a process to form an MOSFET being insulated for the separation into an insular configuration with a porous Si oxide, the formation of an element well takes place after a gate oxidized film is formed. CONSTITUTION:A nitrided film mask 14 is set at a surface of, for example, P type substrate 13, a B is poured to a separation region to form a P<+> layer, and simultaneously, a proton is poured to an element region 15 to form it into an N type. Then, after a porous Si is formed by an anode formation in a hydrofluoric acid solution in a manner to surround the region 15, the region 15 is brought to such a structure that, through the heat oxidation of the region 15, it is perfectly separated with an oxidized layer 16 in a manner to bring it to an insular configuration. Then, after a nitrided film 14 is removed to form a gate oxidized film, the B is introduced to the region 15 to form a P-well, and in turn, a process to manufacture an N-channel FET takes place. This permits the prevention of inversion at the active surface of the region 15 and the oxidized layer 16 due to the redistribution of the B, which results in permitting a kink effect to be prevented from being exerted on an FET property.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18434380A JPS57107050A (en) | 1980-12-25 | 1980-12-25 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18434380A JPS57107050A (en) | 1980-12-25 | 1980-12-25 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57107050A true JPS57107050A (en) | 1982-07-03 |
Family
ID=16151621
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18434380A Pending JPS57107050A (en) | 1980-12-25 | 1980-12-25 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57107050A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0910124A2 (en) * | 1997-10-16 | 1999-04-21 | International Business Machines Corporation | Semiconductor with lateral insulator |
-
1980
- 1980-12-25 JP JP18434380A patent/JPS57107050A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0910124A2 (en) * | 1997-10-16 | 1999-04-21 | International Business Machines Corporation | Semiconductor with lateral insulator |
EP0910124A3 (en) * | 1997-10-16 | 2000-08-16 | International Business Machines Corporation | Semiconductor with lateral insulator |
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