JPS56150860A - Manufacture of semiconductor memory device - Google Patents

Manufacture of semiconductor memory device

Info

Publication number
JPS56150860A
JPS56150860A JP5471580A JP5471580A JPS56150860A JP S56150860 A JPS56150860 A JP S56150860A JP 5471580 A JP5471580 A JP 5471580A JP 5471580 A JP5471580 A JP 5471580A JP S56150860 A JPS56150860 A JP S56150860A
Authority
JP
Japan
Prior art keywords
forming
mode
type
writing
ions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5471580A
Other languages
Japanese (ja)
Inventor
Katsuyuki Inayoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5471580A priority Critical patent/JPS56150860A/en
Publication of JPS56150860A publication Critical patent/JPS56150860A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices

Landscapes

  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To shorten the step after writing informaton in a mask ROM by forming all the MISFETs forming memory cells in an equal mode and then introducing an impurity to the channel region of a desired element to convert its mode. CONSTITUTION:A gate film 3 is formed, for example, on the element forming region of a P type Si substrate 1, then ions are injected to form an N<-> type layer 4, and a polysilicon layer 5 is accumulated on the overall surface. Subsequently, the steps of etching and forming a gate electrode 5', forming N<+> type diffused layers for source and drain regions 6 and forming a protective oxidized film 7 are sequentially performed, and all the films are preserved in this stage (in which all the elements are in a D mode state). Then, a specific element (such as, for example, an element 8) is converted into an E mode on the basis of necessary information pattern. For that purpose, a resist pattern 9 is so formed as to allow the gate part of the element 8 to be opened, ions are injected to covert the channel region into a P<-> type layer 10 and to convert it into an E mode. Thereafter, the steps of forming electrodes and wires are performed. This can remarkably shorten the step after writing (converting the mode).
JP5471580A 1980-04-24 1980-04-24 Manufacture of semiconductor memory device Pending JPS56150860A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5471580A JPS56150860A (en) 1980-04-24 1980-04-24 Manufacture of semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5471580A JPS56150860A (en) 1980-04-24 1980-04-24 Manufacture of semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS56150860A true JPS56150860A (en) 1981-11-21

Family

ID=12978495

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5471580A Pending JPS56150860A (en) 1980-04-24 1980-04-24 Manufacture of semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS56150860A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6439763A (en) * 1987-08-06 1989-02-10 Sanyo Electric Co Manufacture of semiconductor device
JPS6446967A (en) * 1987-08-17 1989-02-21 Sanyo Electric Co Manufacture of semiconductor device
JPS6480069A (en) * 1987-09-21 1989-03-24 Hitachi Ltd Semiconductor storage device and manufacture thereof
EP0317136A2 (en) * 1987-11-13 1989-05-24 Hitachi, Ltd. A method of producing a semiconductor integrated circuit device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5333076A (en) * 1976-09-09 1978-03-28 Toshiba Corp Production of mos type integrated circuit
JPS5375781A (en) * 1976-12-14 1978-07-05 Standard Microsyst Smc Method of producing mos semiconductor circuit
JPS5438782A (en) * 1977-09-01 1979-03-23 Nec Corp Production of integrated circuit device
JPS54130887A (en) * 1978-03-20 1979-10-11 Texas Instruments Inc Method of fabricating rom and rom array
JPS5553454A (en) * 1978-10-16 1980-04-18 Fujitsu Ltd Method for producing semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5333076A (en) * 1976-09-09 1978-03-28 Toshiba Corp Production of mos type integrated circuit
JPS5375781A (en) * 1976-12-14 1978-07-05 Standard Microsyst Smc Method of producing mos semiconductor circuit
JPS5438782A (en) * 1977-09-01 1979-03-23 Nec Corp Production of integrated circuit device
JPS54130887A (en) * 1978-03-20 1979-10-11 Texas Instruments Inc Method of fabricating rom and rom array
JPS5553454A (en) * 1978-10-16 1980-04-18 Fujitsu Ltd Method for producing semiconductor device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6439763A (en) * 1987-08-06 1989-02-10 Sanyo Electric Co Manufacture of semiconductor device
JPS6446967A (en) * 1987-08-17 1989-02-21 Sanyo Electric Co Manufacture of semiconductor device
JPS6480069A (en) * 1987-09-21 1989-03-24 Hitachi Ltd Semiconductor storage device and manufacture thereof
EP0317136A2 (en) * 1987-11-13 1989-05-24 Hitachi, Ltd. A method of producing a semiconductor integrated circuit device

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