JPS6439763A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6439763A JPS6439763A JP62196902A JP19690287A JPS6439763A JP S6439763 A JPS6439763 A JP S6439763A JP 62196902 A JP62196902 A JP 62196902A JP 19690287 A JP19690287 A JP 19690287A JP S6439763 A JPS6439763 A JP S6439763A
- Authority
- JP
- Japan
- Prior art keywords
- film
- impurities
- whole surface
- implanted
- oxide film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Semiconductor Memories (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To unnecessitate a high energy ion implantation device and to contrive to conduct a treatment process at high speed by a method wherein, after a gate oxide film has been formed, the first impurities for the ROM coding of the second transistor are ion-implanted before formation of a poly Si film. CONSTITUTION:After an oxide film 12 and a heat-resisting oxidizing insulating film 13 have been formed on a one-conductivity type semiconductor substrate 11, they are selectively oxidized, and an oxide film 15 is formed. Subsequently, the first impurities 14 are implanted on the whole surface by conducting an ion implanting method, and an opposite conductivity type impurity diffusion layer 16 is formed. Then, a polycrystalline semiconductor film 17 is selectively formed on the region where the first and the second transistors will be formed. A resist film 18 is formed on the whole surface of the substrate 11, an aperture is provided on the source S and the drain D forming region where the first transistor will be formed, and a oneconductivity type impurity diffusion layer 20 is formed by implanting the second impurities 19. The resist film 18 is removed, the third impurities 21 are implanted on the whole surface, and a source S and a drain D are formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62196902A JPS6439763A (en) | 1987-08-06 | 1987-08-06 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62196902A JPS6439763A (en) | 1987-08-06 | 1987-08-06 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6439763A true JPS6439763A (en) | 1989-02-10 |
Family
ID=16365546
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62196902A Pending JPS6439763A (en) | 1987-08-06 | 1987-08-06 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6439763A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56150860A (en) * | 1980-04-24 | 1981-11-21 | Fujitsu Ltd | Manufacture of semiconductor memory device |
-
1987
- 1987-08-06 JP JP62196902A patent/JPS6439763A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56150860A (en) * | 1980-04-24 | 1981-11-21 | Fujitsu Ltd | Manufacture of semiconductor memory device |
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