JPS6477931A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6477931A
JPS6477931A JP23373887A JP23373887A JPS6477931A JP S6477931 A JPS6477931 A JP S6477931A JP 23373887 A JP23373887 A JP 23373887A JP 23373887 A JP23373887 A JP 23373887A JP S6477931 A JPS6477931 A JP S6477931A
Authority
JP
Japan
Prior art keywords
film
insulating film
conductivity type
substrate
onto
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23373887A
Other languages
Japanese (ja)
Inventor
Takehiro Kueda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP23373887A priority Critical patent/JPS6477931A/en
Publication of JPS6477931A publication Critical patent/JPS6477931A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To form a thin source-drain having a conductivity type reverse to one conductivity type semiconductor substrate by a method wherein a gate electrode is shaped onto a thin insulating film formed onto the substrate, a thin semiconductor layer is shaped, ions are implanted to the thin semiconductor layer, a reverse conductivity type impurity is introduced and oxidation is conducted. CONSTITUTION:A thick insulating film 11 and a gate insulating film 2 acquired by thinly oxidizing the surface of a substrate 1 are formed in an element isolation region in a p-type semiconductor substrate such as the silicon substrate 1, a polycrystalline silicon film, etc., are shaped onto the insulating film 2, and the polycrystalline silicon film, etc., are patterned and a gate electrode 3 is formed. A polycrystalline silicon film 21 is shaped onto the whole surface. Ions are implanted by implantation energy in an extent that ions are not penetrated through the film 21, and a reverse conductivity type (an n-type) impurity is introduced into the film 21. A piling-up phenomenon is generated through oxidation, and the introduced reverse conductivity type impurity is penetrated through the gate insulating film 2, and diffused onto the surface layer of the p-type silicon substrate 1, thus shaping source-drain 41. Consequently, the thickness of the source-drain 41 is thinned extremely. The polycrystalline silicon film 21 is changed into an silicon oxide film 22 in the process, and turned into an insulating film for the gate electrode 3.
JP23373887A 1987-09-19 1987-09-19 Manufacture of semiconductor device Pending JPS6477931A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23373887A JPS6477931A (en) 1987-09-19 1987-09-19 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23373887A JPS6477931A (en) 1987-09-19 1987-09-19 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6477931A true JPS6477931A (en) 1989-03-23

Family

ID=16959804

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23373887A Pending JPS6477931A (en) 1987-09-19 1987-09-19 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6477931A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002368012A (en) * 2001-06-06 2002-12-20 Rohm Co Ltd Forming method of impurity diffusion layer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002368012A (en) * 2001-06-06 2002-12-20 Rohm Co Ltd Forming method of impurity diffusion layer

Similar Documents

Publication Publication Date Title
US4729964A (en) Method of forming twin doped regions of the same depth by high energy implant
US4826783A (en) Method for fabricating a BiCMOS device
JPS6477931A (en) Manufacture of semiconductor device
JPS5662333A (en) Mos type semiconductor memory device and production thereof
JPS6433970A (en) Field effect semiconductor device
JPS54107270A (en) Semiconductor device and its production
JPS55121680A (en) Manufacture of semiconductor device
JPS55166958A (en) Manufacture of semiconductor device
JPS5578541A (en) Manufacture of semiconductor device
JPS6465875A (en) Thin film transistor and manufacture thereof
JPS645066A (en) Manufacture of field effect transistor
JPS645068A (en) Manufacture of semiconductor device
JPS6490562A (en) Manufacture of semiconductor storage device
JPS55153344A (en) Manufacture of semiconductor device
JP2510526B2 (en) Semiconductor device
JPS5680171A (en) Semiconductor device
JPS6419773A (en) Power mos field-effect transistor
JPS5791521A (en) Manufacture of semiconductor device
JPS6441245A (en) Manufacture of semiconductor device
JPS6465874A (en) Manufacture of semiconductor device
JPS5732673A (en) Semiconductor device and manufacture thereof
JPS55121681A (en) Manufacture of semiconductor device
JPS6441260A (en) Manufacture of complementary type mos semiconductor device
JPS6446967A (en) Manufacture of semiconductor device
JPS6439763A (en) Manufacture of semiconductor device