JPS6441260A - Manufacture of complementary type mos semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a complementary type MOS semiconductor device wherein the miniaturization of an element is enabled, by forming a polycrystalline silicon layer on the surface of a semiconductor substrate, and forming a wiring part and the like by ion-implanting. CONSTITUTION:After a P-well 2, a field oxide film 3, and a P<+>type channel stopper 4 are formed on a semiconductor substrate 1, an N-type polycrystalline silicon layer 6 is deposited. In the silicon layer 5, a P-type polycrystalline silicon layer 5A is formed by implanting ion into the following: the source.drain of a P-channel MOS transistor, the source.drain of an N-type MOS transistor, the channel region and the P-well contact part of the N-type MOS transistor, and the part which is used as a VSS power supply wiring region if the N-type MOS transistor. The following are subjected to beam anneal method; a source 6a, a drain 6B, a channel region 15A, a source 8B, a drain 8A, and a part which turns to a channel region 15B. A silicon oxide layer 13 is formed by implanting oxygen ion into a part of the silicon layer 5 which is not used as an active region or wiring.