EP0402784A3 - Method of manufacturing a CMOS semiconductor device - Google Patents
Method of manufacturing a CMOS semiconductor device Download PDFInfo
- Publication number
- EP0402784A3 EP0402784A3 EP19900110875 EP90110875A EP0402784A3 EP 0402784 A3 EP0402784 A3 EP 0402784A3 EP 19900110875 EP19900110875 EP 19900110875 EP 90110875 A EP90110875 A EP 90110875A EP 0402784 A3 EP0402784 A3 EP 0402784A3
- Authority
- EP
- European Patent Office
- Prior art keywords
- film
- manufacturing
- semiconductor device
- forming
- over
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 3
- 229920005591 polysilicon Polymers 0.000 abstract 3
- 239000000463 material Substances 0.000 abstract 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 abstract 1
- 229910052796 boron Inorganic materials 0.000 abstract 1
- 239000012535 impurity Substances 0.000 abstract 1
- 150000002500 ions Chemical class 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
- H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823842—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3215—Doping the layers
- H01L21/32155—Doping polycristalline - or amorphous silicon layers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/034—Diffusion of boron or silicon
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1145641A JPH0758701B2 (en) | 1989-06-08 | 1989-06-08 | Method for manufacturing semiconductor device |
JP145641/89 | 1989-06-08 |
Publications (3)
Publication Number | Publication Date |
---|---|
EP0402784A2 EP0402784A2 (en) | 1990-12-19 |
EP0402784A3 true EP0402784A3 (en) | 1990-12-27 |
EP0402784B1 EP0402784B1 (en) | 1996-12-18 |
Family
ID=15389710
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP90110875A Expired - Lifetime EP0402784B1 (en) | 1989-06-08 | 1990-06-08 | Method of manufacturing a CMOS semiconductor device |
Country Status (5)
Country | Link |
---|---|
US (2) | US5464789A (en) |
EP (1) | EP0402784B1 (en) |
JP (1) | JPH0758701B2 (en) |
KR (1) | KR930009031B1 (en) |
DE (1) | DE69029430T2 (en) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0758701B2 (en) * | 1989-06-08 | 1995-06-21 | 株式会社東芝 | Method for manufacturing semiconductor device |
NL9100064A (en) * | 1991-01-16 | 1992-08-17 | Philips Nv | METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING A FIELD EFFECT TRANSISTOR |
EP0637073A1 (en) * | 1993-07-29 | 1995-02-01 | STMicroelectronics S.r.l. | Process for realizing low threshold P-channel MOS transistors for complementary devices (CMOS) |
EP0643417A3 (en) * | 1993-09-08 | 1995-10-04 | At & T Corp | Method of gate implantation. |
US5652156A (en) * | 1995-04-10 | 1997-07-29 | Taiwan Semiconductor Manufacturing Company Ltd. | Layered polysilicon deposition method |
US5817551A (en) * | 1995-08-25 | 1998-10-06 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method of manufacturing the same |
KR0149256B1 (en) * | 1995-08-25 | 1998-10-01 | 김주용 | A method for fabricating a cmos transistor |
US5981364A (en) * | 1995-12-06 | 1999-11-09 | Advanced Micro Devices, Inc. | Method of forming a silicon gate to produce silicon devices with improved performance |
KR0172788B1 (en) * | 1995-12-29 | 1999-03-30 | 김주용 | Method of manufacturing transistor of semiconductor device |
US6188136B1 (en) * | 1996-06-26 | 2001-02-13 | Kabushiki Kaisha Toshiba | Semiconductor device including a wiring layer having a non-doped or high resistivity polycrystal silicon portion |
US5882962A (en) * | 1996-07-29 | 1999-03-16 | Vanguard International Semiconductor Corporation | Method of fabricating MOS transistor having a P+ -polysilicon gate |
US5763923A (en) * | 1996-08-13 | 1998-06-09 | Micron Technology, Inc. | Compound PVD target material for semiconductor metallization |
US5770490A (en) * | 1996-08-29 | 1998-06-23 | International Business Machines Corporation | Method for producing dual work function CMOS device |
US6028339A (en) * | 1996-08-29 | 2000-02-22 | International Business Machines Corporation | Dual work function CMOS device |
US5747368A (en) * | 1996-10-03 | 1998-05-05 | Mosel Vitelic Inc. | Process for manufacturing CMOS device |
TW342532B (en) * | 1996-10-11 | 1998-10-11 | United Microelectronics Corp | Process for producing dual-gate CMOS component by compensating implantation |
EP0847081A1 (en) * | 1996-12-09 | 1998-06-10 | Texas Instruments Incorporated | Improvements in or relating to semiconductor devices |
US6406952B2 (en) * | 1997-07-14 | 2002-06-18 | Agere Systems Guardian Corp. | Process for device fabrication |
US5963799A (en) * | 1998-03-23 | 1999-10-05 | Texas Instruments - Acer Incorporated | Blanket well counter doping process for high speed/low power MOSFETs |
US6566181B2 (en) | 1999-02-26 | 2003-05-20 | Agere Systems Inc. | Process for the fabrication of dual gate structures for CMOS devices |
US6492688B1 (en) | 1999-03-02 | 2002-12-10 | Siemens Aktiengesellschaft | Dual work function CMOS device |
US6344669B1 (en) * | 2000-06-13 | 2002-02-05 | United Microelectronics Corp. | CMOS sensor |
US6770921B2 (en) * | 2001-08-31 | 2004-08-03 | Micron Technology, Inc. | Sidewall strap for complementary semiconductor structures and method of making same |
US6867087B2 (en) * | 2001-11-19 | 2005-03-15 | Infineon Technologies Ag | Formation of dual work function gate electrode |
US20030218218A1 (en) * | 2002-05-21 | 2003-11-27 | Samir Chaudhry | SRAM cell with reduced standby leakage current and method for forming the same |
US7486541B2 (en) * | 2003-06-13 | 2009-02-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Resistive cell structure for reducing soft error rate |
US8252640B1 (en) | 2006-11-02 | 2012-08-28 | Kapre Ravindra M | Polycrystalline silicon activation RTA |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0224199A1 (en) * | 1985-11-27 | 1987-06-03 | Siemens Aktiengesellschaft | Method for producing highly integrated circuits of p- and n-channel MOS transistors with gate electrodes consisting of a double layer of polysilicon and metal silicide |
US4728391A (en) * | 1987-05-11 | 1988-03-01 | Motorola Inc. | Pedestal transistors and method of production thereof |
US4745079A (en) * | 1987-03-30 | 1988-05-17 | Motorola, Inc. | Method for fabricating MOS transistors having gates with different work functions |
Family Cites Families (38)
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ZA734354B (en) * | 1972-07-18 | 1974-05-29 | Westinghouse Electric Corp | An improvement in or relating to dielectric fluids and capacitors |
US3793090A (en) * | 1972-11-21 | 1974-02-19 | Ibm | Method for stabilizing fet devices having silicon gates and composite nitride-oxide gate dielectrics |
JPS5428467A (en) * | 1977-08-05 | 1979-03-03 | Hitachi Ltd | Water-level controller of washing machine |
US4222145A (en) * | 1977-11-02 | 1980-09-16 | Clarke-Gravely Corporation | Vacuum cleaner carriage and tank assembly |
JPS5660063A (en) * | 1979-10-23 | 1981-05-23 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Manufacture of semiconductor device |
US4374700A (en) * | 1981-05-29 | 1983-02-22 | Texas Instruments Incorporated | Method of manufacturing silicide contacts for CMOS devices |
IT1213120B (en) * | 1984-01-10 | 1989-12-14 | Ates Componenti Elettron | PROCESS FOR THE MANUFACTURE OF COMPLEMENTARY LOW VOLTAGE THRESHOLD MOS TRANSISTORS IN HIGH DENSITY INTEGRATED CIRCUITS AND RESULTING STRUCTURE. |
FR2562327B1 (en) * | 1984-03-30 | 1986-06-20 | Commissariat Energie Atomique | METHOD FOR INTERCONNECTING ACTIVE ZONES AND / OR GRIDS OF INTEGRATED CMOS CIRCUITS |
US4873204A (en) * | 1984-06-15 | 1989-10-10 | Hewlett-Packard Company | Method for making silicide interconnection structures for integrated circuit devices |
US4584026A (en) * | 1984-07-25 | 1986-04-22 | Rca Corporation | Ion-implantation of phosphorus, arsenic or boron by pre-amorphizing with fluorine ions |
US4617066A (en) * | 1984-11-26 | 1986-10-14 | Hughes Aircraft Company | Process of making semiconductors having shallow, hyperabrupt doped regions by implantation and two step annealing |
US5190886A (en) * | 1984-12-11 | 1993-03-02 | Seiko Epson Corporation | Semiconductor device and method of production |
JPS61139058A (en) * | 1984-12-11 | 1986-06-26 | Seiko Epson Corp | Production apparatus for semiconductor |
US4821085A (en) * | 1985-05-01 | 1989-04-11 | Texas Instruments Incorporated | VLSI local interconnect structure |
US5010032A (en) * | 1985-05-01 | 1991-04-23 | Texas Instruments Incorporated | Process for making CMOS device with both P+ and N+ gates including refractory metal silicide and nitride interconnects |
ES288378Y (en) * | 1985-07-26 | 1986-09-16 | Carbonell Compania Anonima | HYDRAULIC CONNECTION MECHANISM FOR THE INDUSTRIAL WASHING MACHINE DRUM |
GB2190790B (en) * | 1986-05-12 | 1989-12-13 | Plessey Co Plc | Improvements in transistors |
US4693324A (en) * | 1986-08-01 | 1987-09-15 | Automation Industries, Inc. | Current-carrying flexible hose |
JPS6362108A (en) * | 1986-09-02 | 1988-03-18 | 日本電気株式会社 | Flexible circuit |
JPS63187622A (en) * | 1987-01-30 | 1988-08-03 | Toshiba Corp | Manufacture of semiconductor device |
US5066995A (en) * | 1987-03-13 | 1991-11-19 | Harris Corporation | Double level conductor structure |
JPS63299328A (en) * | 1987-05-29 | 1988-12-06 | Matsushita Electric Ind Co Ltd | Impurity introduction |
US4904611A (en) * | 1987-09-18 | 1990-02-27 | Xerox Corporation | Formation of large grain polycrystalline films |
NL8800220A (en) * | 1988-01-29 | 1989-08-16 | Philips Nv | METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE, IN WHICH A METAL CONDUCTOR TRACK IS APPLIED ON A SURFACE OF A SEMICONDUCTOR BODY. |
JPH01216572A (en) * | 1988-02-24 | 1989-08-30 | Nec Corp | Manufacture of semiconductor device |
US5418179A (en) * | 1988-05-31 | 1995-05-23 | Yamaha Corporation | Process of fabricating complementary inverter circuit having multi-level interconnection |
DE3829211C1 (en) * | 1988-08-29 | 1989-05-18 | Thermo.Form Gmbh, 6453 Seligenstadt, De | Belt fastener |
US5304502A (en) * | 1988-11-08 | 1994-04-19 | Yamaha Corporation | Process of fabricating semiconductor integrated circuit having conductive strips used as resistor and gate electrode of component transistor |
JPH02278867A (en) * | 1989-04-20 | 1990-11-15 | Oki Electric Ind Co Ltd | Complementary mos field effect transistor |
JPH0758701B2 (en) * | 1989-06-08 | 1995-06-21 | 株式会社東芝 | Method for manufacturing semiconductor device |
JPH0770727B2 (en) * | 1989-06-16 | 1995-07-31 | 日本電装株式会社 | Method for manufacturing MIS transistor and complementary MIS transistor |
US5154946A (en) * | 1990-09-27 | 1992-10-13 | Motorola, Inc. | CMOS structure fabrication |
US5124280A (en) * | 1991-01-31 | 1992-06-23 | Sgs-Thomson Microelectronics, Inc. | Local interconnect for integrated circuits |
US5190893A (en) * | 1991-04-01 | 1993-03-02 | Motorola Inc. | Process for fabricating a local interconnect structure in a semiconductor device |
US5298782A (en) * | 1991-06-03 | 1994-03-29 | Sgs-Thomson Microelectronics, Inc. | Stacked CMOS SRAM cell with polysilicon transistor load |
DE4121051A1 (en) * | 1991-06-26 | 1993-01-07 | Eurosil Electronic Gmbh | SEMICONDUCTOR ARRANGEMENT AND PRODUCTION METHOD |
JPH05243178A (en) * | 1991-10-03 | 1993-09-21 | Hewlett Packard Co <Hp> | Method for forming connector for semiconductor integrated circuit |
US5134085A (en) * | 1991-11-21 | 1992-07-28 | Micron Technology, Inc. | Reduced-mask, split-polysilicon CMOS process, incorporating stacked-capacitor cells, for fabricating multi-megabit dynamic random access memories |
-
1989
- 1989-06-08 JP JP1145641A patent/JPH0758701B2/en not_active Expired - Fee Related
-
1990
- 1990-05-31 KR KR1019900007992A patent/KR930009031B1/en not_active IP Right Cessation
- 1990-06-08 DE DE69029430T patent/DE69029430T2/en not_active Expired - Fee Related
- 1990-06-08 EP EP90110875A patent/EP0402784B1/en not_active Expired - Lifetime
-
1993
- 1993-07-23 US US08/095,995 patent/US5464789A/en not_active Expired - Lifetime
-
1995
- 1995-05-03 US US08/434,406 patent/US5612245A/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0224199A1 (en) * | 1985-11-27 | 1987-06-03 | Siemens Aktiengesellschaft | Method for producing highly integrated circuits of p- and n-channel MOS transistors with gate electrodes consisting of a double layer of polysilicon and metal silicide |
US4745079A (en) * | 1987-03-30 | 1988-05-17 | Motorola, Inc. | Method for fabricating MOS transistors having gates with different work functions |
US4728391A (en) * | 1987-05-11 | 1988-03-01 | Motorola Inc. | Pedestal transistors and method of production thereof |
Non-Patent Citations (4)
Title |
---|
IBM TECHNICAL DISCLOSURE BULLETIN. vol. 15, no. 4, 04 September 1972, NEW YORK US pages 1288 - 1300; S. HOLMES: "BABY DIAPERS" * |
JOURNAL OF CHEMICAL ENGINEERING OF JAPAN. vol. 23, no. 42, 02 June 1983, TOKYO JP pages 112 - 130; P. WATSON: "OPTICAL FIBERS" * |
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, vol. 7, no. 1, January/February 1989, pages 120-126, American Vacuum Society, New York, US; U. SCHWALKE et al.: "Boron diffusion within TaSl2/poly-Si gates" * |
PATENT ABSTRACTS OF JAPAN vol. 3, no. 49 (M-57)(2347) 26 April 1979, & JP-A-54 28467 (HITACHI) 03 March 1979, * |
Also Published As
Publication number | Publication date |
---|---|
DE69029430T2 (en) | 1997-05-15 |
EP0402784A2 (en) | 1990-12-19 |
US5464789A (en) | 1995-11-07 |
EP0402784B1 (en) | 1996-12-18 |
US5612245A (en) | 1997-03-18 |
KR930009031B1 (en) | 1993-09-18 |
JPH0311627A (en) | 1991-01-18 |
JPH0758701B2 (en) | 1995-06-21 |
DE69029430D1 (en) | 1997-01-30 |
KR910001993A (en) | 1991-01-31 |
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