JPS5723259A - Complementary type mos semiconductor device - Google Patents

Complementary type mos semiconductor device

Info

Publication number
JPS5723259A
JPS5723259A JP9721580A JP9721580A JPS5723259A JP S5723259 A JPS5723259 A JP S5723259A JP 9721580 A JP9721580 A JP 9721580A JP 9721580 A JP9721580 A JP 9721580A JP S5723259 A JPS5723259 A JP S5723259A
Authority
JP
Japan
Prior art keywords
well
substrate
region
fet
high concentration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9721580A
Other languages
Japanese (ja)
Other versions
JPS5944784B2 (en
Inventor
Yukimasa Uchida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55097215A priority Critical patent/JPS5944784B2/en
Publication of JPS5723259A publication Critical patent/JPS5723259A/en
Publication of JPS5944784B2 publication Critical patent/JPS5944784B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H01L27/0921—Means for preventing a bipolar, e.g. thyristor, action between the different transistor regions, e.g. Latchup prevention

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Element Separation (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent parasitic effect of a minute CMOS device by a method wherein an FET is formed on the substrate and the well region, while a doped poly- silicon wiring is provided in the well boundary part to form a high concentration region of the same conductivity type on the well. CONSTITUTION:For instance, the P-type substrate 22 is provided with an N-well 23 of phosphor concentration 8X10<15>/cm<2>, a minute FET is formed on the substrate 22 and the well 23 to be made into a CMOS1. Each FET is of Si gate type, while the inverse conductivity type source-drain regions are formed to be shallow about 0.5mum by ion injection. The boundary part between the well 23 and the substrate 22 is provided with a high concentration phosphor-droped polysilicon wiring 31 and having this as the diffusion source an N<+> region 30 of abut 1mum depth is formed. Also the substrate 22 is provided with a P-region 35 for preventing inversion. Thereby the layer resistance of the well 23 can be made low, and the potential inside of the well can be fixed thus making the latchup phenomenon hard to arise so as to make the device highly reliable.
JP55097215A 1980-07-16 1980-07-16 Complementary MOS semiconductor device Expired JPS5944784B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55097215A JPS5944784B2 (en) 1980-07-16 1980-07-16 Complementary MOS semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55097215A JPS5944784B2 (en) 1980-07-16 1980-07-16 Complementary MOS semiconductor device

Publications (2)

Publication Number Publication Date
JPS5723259A true JPS5723259A (en) 1982-02-06
JPS5944784B2 JPS5944784B2 (en) 1984-11-01

Family

ID=14186394

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55097215A Expired JPS5944784B2 (en) 1980-07-16 1980-07-16 Complementary MOS semiconductor device

Country Status (1)

Country Link
JP (1) JPS5944784B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0113521A2 (en) 1982-11-26 1984-07-18 Fuji Photo Film Co., Ltd. Light-sensitive lithographic printing plate precursor
JPS61137360A (en) * 1984-12-10 1986-06-25 Nec Corp Complementary mos integrated circuit device
EP0680091A1 (en) * 1994-04-13 1995-11-02 Winbond Electronics Corporation Reduced latch-up CMOS device and method of fabrication
EP1356927A2 (en) 2002-04-22 2003-10-29 Fuji Photo Film Co., Ltd. Plate-making system of light-sensitive lithographic printing plate and plate-making method
JP2007109873A (en) * 2005-10-13 2007-04-26 Seiko Epson Corp Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0113521A2 (en) 1982-11-26 1984-07-18 Fuji Photo Film Co., Ltd. Light-sensitive lithographic printing plate precursor
JPS61137360A (en) * 1984-12-10 1986-06-25 Nec Corp Complementary mos integrated circuit device
EP0680091A1 (en) * 1994-04-13 1995-11-02 Winbond Electronics Corporation Reduced latch-up CMOS device and method of fabrication
EP1356927A2 (en) 2002-04-22 2003-10-29 Fuji Photo Film Co., Ltd. Plate-making system of light-sensitive lithographic printing plate and plate-making method
JP2007109873A (en) * 2005-10-13 2007-04-26 Seiko Epson Corp Semiconductor device

Also Published As

Publication number Publication date
JPS5944784B2 (en) 1984-11-01

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