JPS57130448A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57130448A
JPS57130448A JP1646481A JP1646481A JPS57130448A JP S57130448 A JPS57130448 A JP S57130448A JP 1646481 A JP1646481 A JP 1646481A JP 1646481 A JP1646481 A JP 1646481A JP S57130448 A JPS57130448 A JP S57130448A
Authority
JP
Japan
Prior art keywords
layer
film
substrate
crystalinity
single crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1646481A
Other languages
Japanese (ja)
Inventor
Teruo Kusaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1646481A priority Critical patent/JPS57130448A/en
Publication of JPS57130448A publication Critical patent/JPS57130448A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76237Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Local Oxidation Of Silicon (AREA)

Abstract

PURPOSE:To obtain a dielectric isolation substrate in which thickness of an island type single crystal layer to form a circuit element therein is made to differ by a method wherein impurity ions are implanted inside of the single crystal Si substrate, heat treatment is performed, and after an insulating film is formed inside in condition that an Si layer having crystalinity is made to exist on the suface, an epitaxial layer is made to grow on the whole surface. CONSTITUTION:An SiO2 film 2 is adhered on the surface of the single crystal Si substrate 1 having the <100> axis, and photo etching is performed to form a U-shaped groove 3 is the substrate 1. Then O2 ions or N2 ions are implanted into the whole surface containing the groove to form an ion implanted layer 7 under a surface layer leaving the surface layer 8 having crystalinity to exist on the surface, heat treatment is performed to mak a dielectric isolation film 4 to be generated, and damage in the layer 8 is annealed to make crystalinity to be restored. After then, only the surface layer parts of the film 4 and the layer 8 are etched slightly to form the clean surface, an epitaxial layer 9 is made to grow on the whole surface, grinding is performed up to the prescribed thickness, and the island region having different thicknesses on the groove 3 and the other resion is obtained on the film 4.
JP1646481A 1981-02-06 1981-02-06 Manufacture of semiconductor device Pending JPS57130448A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1646481A JPS57130448A (en) 1981-02-06 1981-02-06 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1646481A JPS57130448A (en) 1981-02-06 1981-02-06 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57130448A true JPS57130448A (en) 1982-08-12

Family

ID=11916968

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1646481A Pending JPS57130448A (en) 1981-02-06 1981-02-06 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57130448A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4672187A (en) * 1984-10-16 1987-06-09 Mitsubishi Denki Kabushiki Kaisha Focusing error detecting device in head assembly for optical disc
JPH01302739A (en) * 1988-05-30 1989-12-06 Toshiba Corp Dielectric isolation semiconductor device and manufacture thereof
US5001075A (en) * 1989-04-03 1991-03-19 Motorola Fabrication of dielectrically isolated semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50113176A (en) * 1974-02-13 1975-09-05

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50113176A (en) * 1974-02-13 1975-09-05

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4672187A (en) * 1984-10-16 1987-06-09 Mitsubishi Denki Kabushiki Kaisha Focusing error detecting device in head assembly for optical disc
JPH01302739A (en) * 1988-05-30 1989-12-06 Toshiba Corp Dielectric isolation semiconductor device and manufacture thereof
US5001075A (en) * 1989-04-03 1991-03-19 Motorola Fabrication of dielectrically isolated semiconductor device

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