JPS57211749A - Manufacture of dielectric separating substrate - Google Patents

Manufacture of dielectric separating substrate

Info

Publication number
JPS57211749A
JPS57211749A JP9720881A JP9720881A JPS57211749A JP S57211749 A JPS57211749 A JP S57211749A JP 9720881 A JP9720881 A JP 9720881A JP 9720881 A JP9720881 A JP 9720881A JP S57211749 A JPS57211749 A JP S57211749A
Authority
JP
Japan
Prior art keywords
single crystal
substrate
thermal expansion
insulating film
nitrogen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9720881A
Other languages
Japanese (ja)
Inventor
Teruo Kusaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP9720881A priority Critical patent/JPS57211749A/en
Publication of JPS57211749A publication Critical patent/JPS57211749A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76245—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using full isolation by porous oxide silicon, i.e. FIPOS techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To avoid occurrence of faults due to thermal expansion by injecting atoms such as nitrogen which forms an insulating film having larger thermal expansion coefficient in comparison with an Si single crystal and atoms such as oxygen which forms an insulating film having smaller thermal expansion coefficient, thereby forming insulating films. CONSTITUTION:In a silicon single crystal substrate 1, e.g. nitrogen ions are impanted, and a nitrogen ion implanted layer is formed. Oxygen ions are subsequently implanted, and an oxygen ion implanted layer is formed at approximately the same location. Then the substrate is heat-treated at 1,100-1,200 deg.C, and the ion implanted layers are made to be a silicon oxide insulated film 2 and a silicon nitride insulating film 4. The single crystal surface layer which is left on said films is finished so as to obtain the mirror surface. Thereafter, a silicon single crystal layer 3 is epitaxially grown, and the dielectric separating substrate is obtained.
JP9720881A 1981-06-23 1981-06-23 Manufacture of dielectric separating substrate Pending JPS57211749A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9720881A JPS57211749A (en) 1981-06-23 1981-06-23 Manufacture of dielectric separating substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9720881A JPS57211749A (en) 1981-06-23 1981-06-23 Manufacture of dielectric separating substrate

Publications (1)

Publication Number Publication Date
JPS57211749A true JPS57211749A (en) 1982-12-25

Family

ID=14186197

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9720881A Pending JPS57211749A (en) 1981-06-23 1981-06-23 Manufacture of dielectric separating substrate

Country Status (1)

Country Link
JP (1) JPS57211749A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4863878A (en) * 1987-04-06 1989-09-05 Texas Instruments Incorporated Method of making silicon on insalator material using oxygen implantation
US4948742A (en) * 1987-09-08 1990-08-14 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a semiconductor device
US5143858A (en) * 1990-04-02 1992-09-01 Motorola, Inc. Method of fabricating buried insulating layers
US5266502A (en) * 1990-04-03 1993-11-30 Olympus Optical Co., Ltd. STM memory medium
US5395771A (en) * 1992-03-31 1995-03-07 Sharp Kabushiki Kaisha Graded implantation of oxygen and/or nitrogen constituents to define buried isolation region in semiconductor devices
US5585304A (en) * 1991-06-13 1996-12-17 Agency Industrial Science Method of making semiconductor device with multiple transparent layers

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4863878A (en) * 1987-04-06 1989-09-05 Texas Instruments Incorporated Method of making silicon on insalator material using oxygen implantation
US4948742A (en) * 1987-09-08 1990-08-14 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a semiconductor device
US5143858A (en) * 1990-04-02 1992-09-01 Motorola, Inc. Method of fabricating buried insulating layers
US5266502A (en) * 1990-04-03 1993-11-30 Olympus Optical Co., Ltd. STM memory medium
US5585304A (en) * 1991-06-13 1996-12-17 Agency Industrial Science Method of making semiconductor device with multiple transparent layers
US5395771A (en) * 1992-03-31 1995-03-07 Sharp Kabushiki Kaisha Graded implantation of oxygen and/or nitrogen constituents to define buried isolation region in semiconductor devices

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