JP3051807B2 - Insulated gate field effect semiconductor device and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulated gate field effect semiconductor device and a method of manufacturing the same, and more particularly to an insulated gate field effect semiconductor device which can be manufactured by a low-temperature process and a method of manufacturing the same. .

[0002]

2. Description of the Related Art In recent years, by using a glass substrate,
In a low-temperature process of about 600 ° C., thin-film transistors (hereinafter referred to as T
FT).

When poly-Si or amorphous Si is used for a channel semiconductor layer of a TFT and an SiO ₂ film is used for a gate insulating film, a heat treatment temperature at the time of manufacturing the TFT is about 60 ° C.
0 ° C. or less. For this reason, in order to form the SiO ₂ film as the gate insulating film, the plasma C that can be formed at a low temperature can be used.
VD method (for example, Journal of Applied Physics Vol.60 (9)
p3136 (1986)), remote plasma CVD (for example, J
ounal of Vacuum Science Technology A5 (4) p2231 (19
87)), APCVD method, LPCVD method, sputtering method
(For example, IEEE Trans.Electron Devices 135 (12) p3104
(1989)) and the like. However, since the SiO ₂ film obtained by these methods is not dense, it causes a reduction in the reliability of the TFT.

As a method for densifying these SiO ₂ films, there are high-temperature annealing at about 900 ° C. and lamp annealing in an N ₂ atmosphere. A high quality gate insulating film cannot be obtained.

Further, a technique for obtaining a highly reliable transistor which is resistant to hot carrier injection by nitriding an SiO ₂ film has been reported (for example, IEEE Trans. Electron).
Devices ED-29 p498 (1982)), however, requires a high temperature of 900 ° C. or more to perform nitriding.

[0006]

However, the gate insulating film manufactured by the above method is manufactured at a relatively high temperature, or when formed at a low temperature of 600 ° C. or less, a dense and high quality film cannot be obtained. Since a large amount of traps are contained in the SiO ₂ film, TFT characteristics are adversely affected. In addition, since these traps cause hot electron injection, there is a problem with respect to the reliability of the device. Further, the interface state density is high due to the low temperature formation, and it is difficult to form a good interface. On the other hand, TFTs at low temperature due to thermal distortion etc.
There is also a strong demand for fabrication.

The present invention has been made in view of such a problem, and reduces the interface state density by reducing the density of the interface state by densifying the SiO ₂ film near the interface and reconstructing the network of interface atoms. An object of the present invention is to form a gate insulating film resistant to hot electron injection by introducing a SiON layer into the gate insulating film and obtain a high-quality gate insulating film at a relatively low temperature.

[0008]

According to a first aspect of the present invention, there is provided an insulated gate type field effect semiconductor device according to the present invention, wherein a poly-Si layer formed on an insulating substrate and a poly-Si layer formed on the poly-Si layer are formed.
An insulated gate field effect semiconductor device including an insulated gate layer including an iON layer and an SiO ₂ layer formed on the SiON layer, and a gate electrode formed on the insulated gate layer
And the SiON layer formed on the poly-Si layer is S
A thin film obtained by plasma nitriding the iO ₂ film,
The thickness of the SiON layer is 1 nm or more and 10 nm or less .

According to a second aspect of the present invention, there is provided an insulated gate field effect semiconductor device comprising a poly-Si formed on an insulating substrate.
Layer, a SiON layer formed on the poly-Si layer, and the Si layer.
An insulated gate layer comprising an SiO ₂ layer formed on the ON layer, a gate electrode formed on the insulated gate layer, and a source region and a drain region on the surface of the poly-Si layer, forming a TFT. Insulated gate field effect semiconductor device
Wherein the SiON layer formed on the poly-Si layer is
It is a thin film obtained by plasma nitriding SiO ₂ film
The thickness of the SiON layer is 1 nm or more and 10 nm or less.
It is characterized by that .

[0010]

[0011] manufacturing method of an insulated gate field effect semiconductor device of the present invention according to claim 3, poly-Si on insulation substrate
Forming a layer, and forming a first SiO ₂ layer on the poly-Si layer.
Forming a layer, plasma nitriding the first SiO ₂ layer to form a SiON layer, forming a _second SiO ₂ layer on the SiON layer, and forming a second SiO ₂ layer on the second SiO ₂ layer. Forming a gate electrode by forming a conductive film.

[0012]

According to the present invention, after an extremely thin (about 1 to 10 nm) insulating film is formed, plasma nitriding is performed with a plasma of a gas containing N (nitrogen) so that the insulating film in the vicinity of the interface becomes dense. And the rearrangement of interface atoms, and the three-coordinate N reduces the interface state density and obtains a good interface, so that it is possible to obtain TFT characteristics with high mobility, low Vth, and low S coefficient. . Further, since the SiON layer near the interface is resistant to hot electron injection, TF having excellent reliability is provided.
T can be obtained.

In the present invention, the step of manufacturing the SiO ₂ film as the gate insulating film in the manufacturing process is divided into three steps, and first, an extremely thin (about 1 to 10 nm most preferable) Si
An O ₂ film is formed on the channel semiconductor, and then the Si film is formed by plasma of a gas containing N atoms such as N ₂ (for example, NH ₃ , N ₂ O, etc.).
Plasma treatment is performed from above O ₂ . Finally, a necessary SiO ₂ film is formed to form a gate insulating film. At this time, the initial Si
If the O ₂ film thickness is too thick (normally 10 nm or more), the effect of the plasma treatment on the SiO ₂ film near the interface is small, and if the O ₂ film thickness is too thin (normally 1 nm or less), damage to the channel semiconductor by the plasma becomes a problem. There is an optimum film thickness range according to the above condition.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for manufacturing a TFT according to an embodiment of the present invention will be described with reference to the drawings. Although a poly-Si film is used as a channel semiconductor here, amorphous Si, single-crystal Si, SiG
It is also possible to use e and the like. In the following embodiments, a TFT will be described. However, it is apparent that the TFT can be simply used as a gate insulating film of a capacitor by not forming a source and a drain described later. Further, an impurity can be appropriately introduced into the poly-Si film just below the gate insulating film in order to adjust Vth or the like.

First, as shown in FIG.
An amorphous Si film is formed on a glass substrate 1 having a high strain point temperature capable of withstanding a heat treatment at a temperature of about 450 ° C. by a LPCVD method using a Si ₂ H ₆ gas. This amorphous Si film is annealed at 600 ° C. for about 20 hours in an N ₂ atmosphere to obtain a poly-Si film by solid phase growth, and to form an island in a desired shape by etching, thereby forming the semiconductor layer 2.

Next, as shown in FIG. 1B, an SiO ₂ film 3 serving as a gate insulating film is formed on the semiconductor layer 2 by a remote plasma CVD method to a thickness of about 1 to 10 nm, and in this embodiment, 5 nm. Form a film. The film forming conditions by the remote plasma CVD method are a substrate temperature of 300 ° C. and a reaction pressure of 0.2 To.
rr, SiH ₄ flow rate 1 sccm, O ₂ flow rate 50 sccm,
RF power was set to 200 W. At this time, the method of forming the SiO ₂ film 3 is not limited to the remote plasma CVD method, but may be a plasma CVD method, an ECRCVD method, if a low-temperature film formation is possible.
LPCVD, APCVD or the like may be used. In addition, SiO
_When the thickness of the _second film 3 is 10 nm or more, the effect of the plasma treatment described later is small, and therefore, it is preferably 10 nm or less. Further, the range of the film thickness varies depending on the plasma processing apparatus and processing conditions, but if it is too thin as 1 nm or less, damage to the semiconductor layer 2 is caused. If it is too thick as 10 nm or more, the interface of N (nitrogen) (the semiconductor layer 2 Is not diffused to the interface between the SiO ₂ film 3 and the plasma-treated SiO ₂ film 3, thereby reducing the effect of the plasma treatment. Therefore, the thickness of the SiO ₂ film 3 is preferably 1 nm or more and 10 nm or less.

[0017] Next, as shown in FIG. 1 (c), followed by 10 minutes, the plasma treatment (where N ₂ plasma N ₂
Although using a gas, such as in particular a gas as long as the gas containing N such as N ₂ O and NH ₃ is not limited) to, SiO ₂
The film 3 is an SiON film. Here, the entire SiO ₂ film 3 does not need to be changed to the SiON film. At this time, the conditions of the plasma processing are a substrate temperature of 300 ° C. and a reaction pressure of 0.
5 Torr, N ₂ flow rate 100 sccm, the power density 0.
The test was performed at 1 W / cm ² . The plasma processing temperature is 6
The temperature may be at most 00 ° C. Although the plasma processing is performed by a parallel plate plasma CVD apparatus here, the plasma processing can be performed by a remote plasma CVD apparatus or an ECRCVD apparatus.

Next, as shown in FIG. 1 (d), SiO ₂
The film 3 ′ is formed to have a thickness of about 90 to 100 nm,
A gate insulating film composed of a SiO ₂ film 3 and a SiO ₂ film 3 ′ having a thickness of nm and formed by a remote plasma CVD apparatus and subjected to plasma processing is formed.

Next, as shown in FIG. 1E, a polysilicon Si film having a thickness of about 250 nm is formed on the glass substrate 1 and is patterned into a desired shape to form the gate electrode 4. This is self-aligned with an impurity element (phosphorus in the case of Nch, boron in the case of Pch) of 1 × 10 ¹⁵ ion /
The source and drain of a TFT (not shown) are formed by ion-implanting and activating at about cm ² and about 40 keV. Then, simultaneously with this step, the resistance of the gate electrode 4 is reduced by impurity ion implantation.
An interlayer insulating film 5 made of a SiO ₂ film having a thickness of about nm is formed.

Finally, as shown in FIG. 1F, after a contact hole is formed in the interlayer insulating film 5 on the source and the drain, a lead electrode 6 made of, for example, aluminum is formed to complete the TFT.

The characteristics of the TFT thus manufactured by dividing the gate insulating film into three steps are shown in the following table.

[0022]

[Table 1]

Here, as a comparative example, the characteristics of a TFT manufactured by forming an SiO ₂ film by a remote plasma CVD method without plasma processing are also shown. Here, the equivalent film thickness of the gate insulating film of the TFT used as the comparative example and the gate insulating film of the TFT manufactured by performing the plasma treatment are equal. As is clear from the table, the mobility, Vth, and S coefficient are higher and lower than those of the TFT characteristics in which the gate insulating film is formed of the SiO ₂ film to which no plasma treatment is applied.
h, shows a low S coefficient, indicating an improvement in the interface structure.

FIG. 2 shows the gate applied electric field strength of 8 MV / c.
m, TDDB characteristics at an atmospheric temperature of 150 ° C. As is clear from this figure, the TDDB characteristic of the gate insulating film subjected to the plasma treatment shows an excellent value as compared with the characteristic not subjected to the plasma treatment. Has become. Therefore, it can be seen that the TFT subjected to the plasma treatment is excellent not only in characteristics but also in reliability.

[0025]

According to the present invention, N over the ultrathin SiO ₂
Is treated with a plasma of a gas containing
The densification of the iO ₂ layer and the reconstitution of interface atoms were performed, and 3
By reducing the interface state density by introducing coordination N, TFT characteristics such as mobility, Vth, and S coefficient can be improved.

Further, the formation of the SiON layer in the interface layer makes it resistant to hot electron injection, so that a highly reliable TFT can be obtained.

[Brief description of the drawings]

FIG. 1 shows a gate insulating film and a TF according to an embodiment of the present invention.
FIG. 5 is a process cross-sectional view illustrating a method of manufacturing T.

FIG. 2 is a graph showing TDDB characteristics of gate insulating films manufactured according to examples of the present invention and comparative examples.

[Explanation of symbols]

1 SiO ₂ film 3 and the glass substrate 2 the semiconductor layer 3 plasma process' SiO ₂ film 4 gate electrode 5 interlayer insulating film 6 lead electrode

Claims (3)

(57) [Claims] A poly-Si layer formed on an insulating substrate;
An insulated gate layer including a SiON layer formed on the poly-Si layer and a SiO ₂ layer formed on the SiON layer;
Absolute with a gate electrode formed on the insulating gate layer
An edge gate type field effect semiconductor device, comprising:
The upper SiON layer is formed by plasma nitriding SiO ₂ film.
The SiON layer has a thickness of 1
An insulated gate field effect semiconductor device having a thickness of not less than 10 nm and not more than 10 nm . 2. A poly-Si layer formed on an insulating substrate,
An insulated gate layer including a SiON layer formed on the poly-Si layer and a SiO ₂ layer formed on the SiON layer;
A gate electrode formed on the insulated gate layer; a source region and a drain region on the surface of the poly-Si layer;
Insulated gate type field effect semiconductor device forming T
The SiON layer formed on the poly-Si layer is SiO ₂
The film is a plasma-nitrided thin film,
The thickness of the ON layer is not less than 1 nm and not more than 10 nm.
Insulated gate field effect semiconductor device. 3. A process for forming a poly-Si layer on an insulating substrate.
Forming a first SiO ₂ layer on the poly-Si layer
And plasma nitriding the first SiO ₂ layer to form an SiON layer
And forming a _second SiO ₂ layer on the SiON layer
And forming a conductive film on the second SiO ₂ layer,
Forming a gate electrode.
A method for manufacturing a gate type field effect semiconductor device.