JPS55146936A - Treatment of semiconductor film - Google Patents
Treatment of semiconductor filmInfo
- Publication number
- JPS55146936A JPS55146936A JP5422279A JP5422279A JPS55146936A JP S55146936 A JPS55146936 A JP S55146936A JP 5422279 A JP5422279 A JP 5422279A JP 5422279 A JP5422279 A JP 5422279A JP S55146936 A JPS55146936 A JP S55146936A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- defect
- single crystal
- etching
- ion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 239000013078 crystal Substances 0.000 abstract 5
- 238000000137 annealing Methods 0.000 abstract 3
- 238000005530 etching Methods 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 2
- 229910021417 amorphous silicon Inorganic materials 0.000 abstract 1
- 230000007547 defect Effects 0.000 abstract 1
- 238000010438 heat treatment Methods 0.000 abstract 1
- 230000003647 oxidation Effects 0.000 abstract 1
- 238000007254 oxidation reaction Methods 0.000 abstract 1
- 229910052594 sapphire Inorganic materials 0.000 abstract 1
- 239000010980 sapphire Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Abstract
PURPOSE:To obtain a defect-free semiconductor layer, by driving ion into single crystal semiconductor film on a dielectric body, providing heat treatment on it and removing the surface. CONSTITUTION:By providing a single crystal epitaxial layer 2, which has (110) crystallized surface, on a sapphire substrate 1 having a particular crystallized surface, and driving into the surface Si ion in such a manner that it has its center at the depth of approximately 0.2mu, a single crystal 3 is left on the surface and an amorphous Si layer 4 is formed. If it is annealed, a layer having a depth of approximately 500Angstrom from the surface becomes the single crystal 3 having crystal defect, but deeper section becomes a defect-free layer 10. By removing the layer 3 by etching, however, it is possible to obtain an SOS substrate 12 having a defect-free layer. Further, it is also possible to execute oxidation treatment after annealing and to remove this oxide film by etching. Or, it may be possible, after annealing, to drive the ion shallower than the first one and execute etching after another annealing.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5422279A JPS55146936A (en) | 1979-05-04 | 1979-05-04 | Treatment of semiconductor film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5422279A JPS55146936A (en) | 1979-05-04 | 1979-05-04 | Treatment of semiconductor film |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55146936A true JPS55146936A (en) | 1980-11-15 |
Family
ID=12964500
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5422279A Pending JPS55146936A (en) | 1979-05-04 | 1979-05-04 | Treatment of semiconductor film |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55146936A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59502047A (en) * | 1982-11-15 | 1984-12-06 | ヒユ−ズ・エアクラフト・カンパニ− | Semiconductor epitaxial phase and growth method with controlled defect concentration cross section for mixed epitaxial semiconductors on insulating mixed substrates |
JPS6184075A (en) * | 1984-09-18 | 1986-04-28 | イギリス国 | Photovoltaic solar cell |
JPS63142655A (en) * | 1986-11-26 | 1988-06-15 | エイ・ティ・アンド・ティ・コーポレーション | Manufacture of device containing buried sio2 layer |
EP1037272A1 (en) * | 1997-06-19 | 2000-09-20 | Asahi Kasei Kogyo Kabushiki Kaisha | Soi substrate and process for preparing the same, and semiconductor device and process for preparing the same |
KR100972605B1 (en) * | 2008-03-19 | 2010-07-28 | 동국대학교 산학협력단 | Method for preparing a silicon on sapphire thin film and the silicon on sapphire thin film prepared by the same |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5344170A (en) * | 1976-10-05 | 1978-04-20 | Fujitsu Ltd | Production of semiconductor device |
-
1979
- 1979-05-04 JP JP5422279A patent/JPS55146936A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5344170A (en) * | 1976-10-05 | 1978-04-20 | Fujitsu Ltd | Production of semiconductor device |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59502047A (en) * | 1982-11-15 | 1984-12-06 | ヒユ−ズ・エアクラフト・カンパニ− | Semiconductor epitaxial phase and growth method with controlled defect concentration cross section for mixed epitaxial semiconductors on insulating mixed substrates |
JPS6184075A (en) * | 1984-09-18 | 1986-04-28 | イギリス国 | Photovoltaic solar cell |
JPS63142655A (en) * | 1986-11-26 | 1988-06-15 | エイ・ティ・アンド・ティ・コーポレーション | Manufacture of device containing buried sio2 layer |
EP1037272A1 (en) * | 1997-06-19 | 2000-09-20 | Asahi Kasei Kogyo Kabushiki Kaisha | Soi substrate and process for preparing the same, and semiconductor device and process for preparing the same |
US6528387B1 (en) | 1997-06-19 | 2003-03-04 | Asahi Kasei Kabushiki Kaisha | SOI substrate and process for preparing the same, and semiconductor device and process for preparing the same |
EP1037272A4 (en) * | 1997-06-19 | 2004-07-28 | Asahi Chemical Ind | Soi substrate and process for preparing the same, and semiconductor device and process for preparing the same |
KR100972605B1 (en) * | 2008-03-19 | 2010-07-28 | 동국대학교 산학협력단 | Method for preparing a silicon on sapphire thin film and the silicon on sapphire thin film prepared by the same |
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