JPS5687339A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5687339A
JPS5687339A JP16426379A JP16426379A JPS5687339A JP S5687339 A JPS5687339 A JP S5687339A JP 16426379 A JP16426379 A JP 16426379A JP 16426379 A JP16426379 A JP 16426379A JP S5687339 A JPS5687339 A JP S5687339A
Authority
JP
Japan
Prior art keywords
film
si3n4
substrate
selectively
intrusion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16426379A
Other languages
Japanese (ja)
Inventor
Kunio Aomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP16426379A priority Critical patent/JPS5687339A/en
Publication of JPS5687339A publication Critical patent/JPS5687339A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76227—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials the dielectric materials being obtained by full chemical transformation of non-dielectric materials, such as polycristalline silicon, metals

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To form a fine insulator for isolation having no intrusion in transverse direction by a method wherein a film oxide and film nitride are formed on an Si film surface which is selectively formed on a surface of a semiconductor substrate, and then changed to oxides by forming Si on the exposed substrate surface. CONSTITUTION:An Si3N4 film is selectively placed on the Si substrate 31 and formed with the Si film over the whole surface. A polycrystal 38 produced on the film nitride is selectively removed to leave a single crystal 32 behind. Heat-oxidized SiO2 film 39 and Si3N4 film are formed on the surface of the single crystalline Si film 32, and the part of the substrate surface on which the Si3N4 film is formed at first is exposed to form an Si film 302 thereon. The Si film 302 is oxidized to be changed an Si film 35 and made an isolation insulating film. At this time, the Si film 302 is allowed to be formed thin so as to make a flat degree better. Whereby the intrusion into the isolation insulating film in transverse direction is removed and particularly, the fine insulating film for a bipolar IC is formed.
JP16426379A 1979-12-18 1979-12-18 Manufacture of semiconductor device Pending JPS5687339A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16426379A JPS5687339A (en) 1979-12-18 1979-12-18 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16426379A JPS5687339A (en) 1979-12-18 1979-12-18 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5687339A true JPS5687339A (en) 1981-07-15

Family

ID=15789759

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16426379A Pending JPS5687339A (en) 1979-12-18 1979-12-18 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5687339A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2547954A1 (en) * 1983-06-21 1984-12-28 Efcis PROCESS FOR PRODUCING ISOLATED SEMICONDUCTOR COMPONENTS IN A SEMICONDUCTOR WAFER
US4843025A (en) * 1987-05-25 1989-06-27 Matsushita Electronics Corporation Method of fabricating trench cell capacitors on a semocondcutor substrate
US5087586A (en) * 1991-07-03 1992-02-11 Micron Technology, Inc. Process for creating fully-recessed field isolation regions by oxidizing a selectively-grown epitaxial silicon layer
US5202284A (en) * 1989-12-01 1993-04-13 Hewlett-Packard Company Selective and non-selective deposition of Si1-x Gex on a Si subsrate that is partially masked with SiO2

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2547954A1 (en) * 1983-06-21 1984-12-28 Efcis PROCESS FOR PRODUCING ISOLATED SEMICONDUCTOR COMPONENTS IN A SEMICONDUCTOR WAFER
US4843025A (en) * 1987-05-25 1989-06-27 Matsushita Electronics Corporation Method of fabricating trench cell capacitors on a semocondcutor substrate
US5202284A (en) * 1989-12-01 1993-04-13 Hewlett-Packard Company Selective and non-selective deposition of Si1-x Gex on a Si subsrate that is partially masked with SiO2
US5087586A (en) * 1991-07-03 1992-02-11 Micron Technology, Inc. Process for creating fully-recessed field isolation regions by oxidizing a selectively-grown epitaxial silicon layer

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