JPS5565438A - Semiconductor substrate treatment - Google Patents

Semiconductor substrate treatment

Info

Publication number
JPS5565438A
JPS5565438A JP13969678A JP13969678A JPS5565438A JP S5565438 A JPS5565438 A JP S5565438A JP 13969678 A JP13969678 A JP 13969678A JP 13969678 A JP13969678 A JP 13969678A JP S5565438 A JPS5565438 A JP S5565438A
Authority
JP
Japan
Prior art keywords
layer
film
omission
substrate
sio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13969678A
Other versions
JPH0235455B2 (en
Inventor
Seiji Kawato
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP53139696A priority Critical patent/JPH0235455B2/ja
Publication of JPS5565438A publication Critical patent/JPS5565438A/en
Publication of JPH0235455B2 publication Critical patent/JPH0235455B2/ja
Anticipated expiration legal-status Critical
Application status is Expired - Lifetime legal-status Critical

Links

Abstract

PURPOSE: To effectively prevent omission generating inside the substrate by first forming crystal omission layer on the surface region of semiconductor substrate, then changing it into an oxide layer by only the prescribed thickness followed by etching to remove it.
CONSTITUTION: SiO2 film 5 is attached to an N-type Si substrate 1, a window is opened in the prescribed region, from said window the impurities are diffused to form the P-type source and drain regions 6, 7. Next, from the surface the ions such as Si+, Ar+, Cl+ are irradiated to generate a shallow damage layer 9 on the whole surface of substrate 1 including the regions 6, 7 to change it by anealing in inert gas into the secondary omission layer 10, and to make here getter omission generating cores and metallic impurities. Thereafter the film 5 is removed to change the layer 10 into the SiO2 film 11 by performing high pressure oxidation, which is again removed by etching to be newly coated with gate SiO2 film 12. Next, thereon as normally, gate electrode metal is provided to make MOSFET.
COPYRIGHT: (C)1980,JPO&Japio
JP53139696A 1978-11-13 1978-11-13 Expired - Lifetime JPH0235455B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53139696A JPH0235455B2 (en) 1978-11-13 1978-11-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53139696A JPH0235455B2 (en) 1978-11-13 1978-11-13

Publications (2)

Publication Number Publication Date
JPS5565438A true JPS5565438A (en) 1980-05-16
JPH0235455B2 JPH0235455B2 (en) 1990-08-10

Family

ID=15251279

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53139696A Expired - Lifetime JPH0235455B2 (en) 1978-11-13 1978-11-13

Country Status (1)

Country Link
JP (1) JPH0235455B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6218777A (en) * 1985-07-17 1987-01-27 Agency Of Ind Science & Technol Manufacture of josephson junction
US5098852A (en) * 1989-07-05 1992-03-24 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device by mega-electron volt ion implantation

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5119966A (en) * 1974-08-09 1976-02-17 Shirikon Materiaru Inc Handotaiueehaosaiseisuruhoho
JPS5380157A (en) * 1976-12-24 1978-07-15 Fujitsu Ltd Manufacture of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5119966A (en) * 1974-08-09 1976-02-17 Shirikon Materiaru Inc Handotaiueehaosaiseisuruhoho
JPS5380157A (en) * 1976-12-24 1978-07-15 Fujitsu Ltd Manufacture of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6218777A (en) * 1985-07-17 1987-01-27 Agency Of Ind Science & Technol Manufacture of josephson junction
US5098852A (en) * 1989-07-05 1992-03-24 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor device by mega-electron volt ion implantation

Also Published As

Publication number Publication date
JPH0235455B2 (en) 1990-08-10

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