JPH06252116A - Formation of game insulating film - Google Patents

Formation of game insulating film

Info

Publication number
JPH06252116A
JPH06252116A JP3230293A JP3230293A JPH06252116A JP H06252116 A JPH06252116 A JP H06252116A JP 3230293 A JP3230293 A JP 3230293A JP 3230293 A JP3230293 A JP 3230293A JP H06252116 A JPH06252116 A JP H06252116A
Authority
JP
Japan
Prior art keywords
insulating film
gate insulating
forming
layer
single crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3230293A
Other languages
Japanese (ja)
Inventor
Kouki Nonaka
功樹 野中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP3230293A priority Critical patent/JPH06252116A/en
Publication of JPH06252116A publication Critical patent/JPH06252116A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To form a gate insulating film having excellent characteristics, such as the breakdown field intensity, TDDB, etc. CONSTITUTION:After exposing the clean surface of a single-crystal Si substrate 11 by removing an unnecessary layer 12, such as a contaminated layer, natural oxide film, etc., on the substrate 11, the substrate 11 is transferred to a process for forming an insulating film 13 and the film 13 is formed on the substrate 11 while the surface of the substrate 11 is maintained in a clean state. Since the existence of the unnecessary layer 12, such as the contaminated layer, natural oxide film, etc., is completely eliminated from the process for forming the gate insulating film 13, the characteristics of the gate insulating film 13, such as the breakdown field intensity, TDDB, etc., of the film 13 are remarkably improved.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は微細化されたMOS集積
回路に用いられるゲート絶縁膜の形成方法に関するもの
である。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a gate insulating film used in a miniaturized MOS integrated circuit.

【0002】[0002]

【従来の技術】従来、ゲート絶縁膜形成は、洗浄槽で必
要な前洗浄を行った後、高温酸化炉内でゲート絶縁膜を
形成するという方法が行われている。
2. Description of the Related Art Conventionally, a gate insulating film has been formed by performing necessary pre-cleaning in a cleaning tank and then forming the gate insulating film in a high temperature oxidation furnace.

【0003】[0003]

【発明が解決しようとする課題】しかし、従来のゲート
絶縁膜形成方法においては、洗浄工程で一旦汚染層、自
然酸化膜等の不用層を除去した後、高温酸化炉内でゲー
ト絶縁膜形成が開始されるまでの間に、再び単結晶Si
基板上に自然酸化膜等の不用層が形成され、ゲート絶縁
膜の膜質が低下するという問題点があった。
However, in the conventional method for forming a gate insulating film, the gate insulating film is formed in a high temperature oxidation furnace after once removing unnecessary layers such as a contaminated layer and a natural oxide film in a cleaning process. By the time it is started, single crystal Si
There is a problem that an unnecessary layer such as a natural oxide film is formed on the substrate and the quality of the gate insulating film is deteriorated.

【0004】[0004]

【課題を解決するための手段】上記課題を解決するため
に本発明は、単結晶Si基板上の汚染層、自然酸化膜等
の不用層を除去し、清浄な単結晶Si基板表面を露出さ
せた後、表面を清浄な単結晶Siの状態に保ちながらゲ
ート絶縁膜形成工程に移行し、ゲート絶縁膜形成を行っ
た。
In order to solve the above problems, the present invention removes a contaminated layer on a single crystal Si substrate, an unnecessary layer such as a natural oxide film, and exposes a clean single crystal Si substrate surface. After that, the process proceeded to the gate insulating film forming step while keeping the surface in a state of clean single crystal Si, and the gate insulating film was formed.

【0005】[0005]

【作用】微細化されたMOS集積回路、特にサブミクロ
ンの設計ルールで設計されたMOS集積回路において
は、膜厚200Å以下の非常に薄いゲート絶縁膜が用い
られる。このように非常に薄いゲート絶縁膜の場合、そ
の形成前に数10Å以下の極めて薄い層ではあっても、
自然酸化膜等の不用層が残存していた場合は、ゲート絶
縁膜の特性に影響を与える。
In a miniaturized MOS integrated circuit, especially a MOS integrated circuit designed by the submicron design rule, a very thin gate insulating film having a film thickness of 200 Å or less is used. In the case of such an extremely thin gate insulating film, even if it is an extremely thin layer of several 10 Å or less before its formation,
If an unnecessary layer such as a natural oxide film remains, it affects the characteristics of the gate insulating film.

【0006】汚染層、自然酸化膜等の不用層は、洗浄液
中、大気中等で意図されないままに形成される為、汚染
に対する厳密な管理や膜質、膜厚に対する正確な制御は
非常に困難である。このような自然酸化膜等の不用層の
存在は、ゲート絶縁膜形成後の特性を低下させるものと
なる。汚染層、自然酸化膜等の存在そのものをゲート絶
縁膜形成過程から完全に排除する事により、破壊電界強
度、TDDB特性等の膜特性も大幅に向上する。
Since the contaminated layer and the unnecessary layer such as the natural oxide film are formed unintentionally in the cleaning liquid, in the atmosphere, etc., it is very difficult to strictly control the contamination and accurately control the film quality and the film thickness. . The presence of such an unnecessary layer such as a natural oxide film deteriorates the characteristics after the gate insulating film is formed. By completely eliminating the existence itself of the contaminated layer, the natural oxide film and the like from the process of forming the gate insulating film, the film properties such as the breakdown electric field strength and the TDDB property are significantly improved.

【0007】[0007]

【実施例】図1(a)〜(c)は本発明のゲート絶縁膜
の形成方法の工程順の概略図を示す断面図である。図1
(a)において11は単結晶Si基板、12は汚染層、
自然酸化膜等の不用層を表す。図1(b)は不用層が除
去され清浄な単結晶Si基板表面が露出している様子を
表している。
1 (a) to 1 (c) are sectional views showing schematic views in the order of steps of a method for forming a gate insulating film according to the present invention. Figure 1
In (a), 11 is a single crystal Si substrate, 12 is a contamination layer,
Indicates an unnecessary layer such as a natural oxide film. FIG. 1B shows a state in which the unnecessary layer is removed and the clean single crystal Si substrate surface is exposed.

【0008】図1(c)は清浄な単結晶Si基板表面に
ゲート絶縁膜13がその形成過程において、不用層12
の存在を完全に排除した状態で形成された様子を表して
いる。
FIG. 1 (c) shows a structure in which the gate insulating film 13 is formed on the surface of a clean single crystal Si substrate when the unnecessary layer 12 is formed.
It shows a state in which the existence of is completely eliminated.

【0009】[0009]

【発明の効果】以上、詳細に説明したように本発明によ
るゲート絶縁膜の形成方法は、汚染層、自然酸化膜等の
不用層による影響を排し、ゲート絶縁膜の特性を大幅に
改善する事を可能にする優れた特徴を有する。
As described above in detail, the method of forming a gate insulating film according to the present invention eliminates the influence of an unwanted layer such as a contaminated layer or a natural oxide film, and greatly improves the characteristics of the gate insulating film. It has excellent features that make things possible.

【図面の簡単な説明】[Brief description of drawings]

【図1】(a)、(b)、(c)は本発明のゲート絶縁
膜の形成方法の工程順の概略を示す断面図である。
1A, 1B, and 1C are cross-sectional views schematically showing the order of steps of a method for forming a gate insulating film according to the present invention.

【符号の説明】[Explanation of symbols]

11 単結晶Si基板 12 汚染層、自然酸化膜等の不用層 13 ゲート絶縁膜 11 Single crystal Si substrate 12 Contamination layer, unnecessary layer such as natural oxide film 13 Gate insulating film

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 MOSトランジスタに用いられるゲート
絶縁膜の形成方法において、単結晶Si基板上に存在す
る汚染層、自然酸化膜等の不用層を除去し、清浄な単結
晶Si基板表面を露出させる工程を含み、清浄な単結晶
Si基板表面が露出された状態を保持しながらゲート絶
縁膜を形成する工程に移行する事を特徴とするゲート絶
縁膜の形成方法。
1. A method for forming a gate insulating film used in a MOS transistor, wherein a contamination layer existing on a single crystal Si substrate, an unnecessary layer such as a natural oxide film, is removed to expose a clean single crystal Si substrate surface. A method of forming a gate insulating film, comprising the step of forming a gate insulating film while maintaining a state in which a clean single crystal Si substrate surface is exposed.
【請求項2】 前記、汚染層、自然酸化膜等の不用層の
除去方法として、真空又は減圧雰囲気中で高温熱処理す
る工程を含む事を特徴とする特許請求の範囲第1項記載
の不用層の除去方法。
2. The unnecessary layer according to claim 1, wherein the method for removing the unwanted layer such as the contaminated layer and the natural oxide film includes a step of performing a high temperature heat treatment in a vacuum or reduced pressure atmosphere. Removal method.
【請求項3】 前記、汚染層、自然酸化膜等の不用層の
除去方法として、水素等の還元作用を有する雰囲気、又
はその減圧雰囲気中で高温熱処理する工程を含む事を特
徴とする特許請求の範囲第1項記載の不用層の除去方
法。
3. The method for removing the contaminated layer, the unnecessary layer such as a natural oxide film, includes a step of performing high temperature heat treatment in an atmosphere having a reducing action such as hydrogen, or in a reduced pressure atmosphere thereof. 5. The method for removing an unnecessary layer according to claim 1.
【請求項4】 前記、清浄な単結晶Si基板表面が露出
された状態を保持しながらゲート絶縁膜を形成する工程
に移行する方法として、外気と遮断された同一チャンバ
ー内にて不用層の除去からゲート絶縁膜形成までの一連
の工程を行う事を特徴とする特許請求の範囲第1項記載
のゲート絶縁膜の形成方法。
4. As a method of shifting to the step of forming a gate insulating film while maintaining the state where the clean single crystal Si substrate surface is exposed, removal of an unnecessary layer in the same chamber shielded from the outside air. The method for forming a gate insulating film according to claim 1, wherein a series of steps from the step of forming the gate insulating film to the step of forming the gate insulating film are performed.
【請求項5】 前記、清浄な単結晶Si基板表面が露出
された状態を保持しながらゲート絶縁膜を形成する工程
に移行する方法として、外気と遮断された複数のチャン
バーと、各チャンバー間におけるウエハ搬送機構を有す
る装置内において、不用層除去からゲート絶縁膜形成ま
での一連の工程を行う事を特徴とする特許請求の範囲第
1項記載のゲート絶縁膜の形成方法。
5. As a method for shifting to the step of forming a gate insulating film while maintaining the state where the clean single crystal Si substrate surface is exposed, as a method, a plurality of chambers isolated from outside air and between the chambers are provided. The method for forming a gate insulating film according to claim 1, wherein a series of steps from removal of the unnecessary layer to formation of the gate insulating film are performed in an apparatus having a wafer transfer mechanism.
JP3230293A 1993-02-22 1993-02-22 Formation of game insulating film Pending JPH06252116A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3230293A JPH06252116A (en) 1993-02-22 1993-02-22 Formation of game insulating film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3230293A JPH06252116A (en) 1993-02-22 1993-02-22 Formation of game insulating film

Publications (1)

Publication Number Publication Date
JPH06252116A true JPH06252116A (en) 1994-09-09

Family

ID=12355155

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3230293A Pending JPH06252116A (en) 1993-02-22 1993-02-22 Formation of game insulating film

Country Status (1)

Country Link
JP (1) JPH06252116A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000091577A (en) * 1998-08-26 2000-03-31 Texas Instr Inc <Ti> Method of forming game oxide film
WO2001061760A1 (en) * 2000-02-15 2001-08-23 Matsushita Electric Industrial Co., Ltd. Method of manufacturing thin-film transistor, and liquid-crystal display

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000091577A (en) * 1998-08-26 2000-03-31 Texas Instr Inc <Ti> Method of forming game oxide film
WO2001061760A1 (en) * 2000-02-15 2001-08-23 Matsushita Electric Industrial Co., Ltd. Method of manufacturing thin-film transistor, and liquid-crystal display
US6716768B2 (en) 2000-02-15 2004-04-06 Matsushita Electric Industrial Co., Ltd. Method of manufacturing thin-film transistor, and liquid-crystal display

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